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author | Gabe Black <gabeblack@google.com> | 2018-05-24 01:37:55 -0700 |
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committer | Gabe Black <gabeblack@google.com> | 2018-08-08 10:09:54 +0000 |
commit | 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (patch) | |
tree | 7b6faaacb4574a555e561534aa4a8508c0624c32 /src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp | |
parent | 7235d3b5211d0ba8f528d930a4c1e7ad62eec51a (diff) | |
download | gem5-16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f.tar.xz |
systemc: Import tests from the Accellera systemc distribution.
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp')
-rw-r--r-- | src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp | 158 |
1 files changed, 158 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp b/src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp new file mode 100644 index 000000000..191358d9d --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp @@ -0,0 +1,158 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + cgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/* Filename seqgen.h */ +/* This is the interface file for asynchronous process 'seqgen' */ + +SC_MODULE( seqgen ) +{ + SC_HAS_PROCESS( seqgen ); + + sc_in<bool> clock_i; + sc_out<int> data_o; + + // Constructor + seqgen( sc_module_name NAME, + sc_signal<bool>& CLOCK_I, + sc_signal<int>& DATA_O ) + { + clock_i(CLOCK_I); + data_o(DATA_O); + SC_THREAD( entry ); + sensitive << clock_i; + } + + // Functionality of process + void entry(); +}; + + +/* Filename seqgen.cc */ +/* This is the implementation file for asynchronous process 'seqgen' */ + +void seqgen::entry() +{ + // Initialization code can go here + int i = 17; + wait(); + + while (true) { // Infinite loop encompassing functionality + if (clock_i.posedge()) { + // Generate output only on positive edge of clock + data_o.write(i); + i = ((i * i) % 1019) - 9; + } + wait(); + } +} + + +// Interface and implementation files for +// Asynchronous block for code generation + +SC_MODULE( codegen ) +{ + SC_HAS_PROCESS( codegen ); + + sc_in<int> data_i; + sc_out<int> code_o; + + int sum, num; + + // Constructor + codegen( sc_module_name NAME, + sc_signal<int>& DATA_I, + sc_signal<int>& CODE_O ) + { + data_i(DATA_I); + code_o(CODE_O); + SC_METHOD( entry ); + sensitive << data_i; + + sum = 0; + num = 0; + } + + // Process functionality + void entry(); +}; + +void codegen::entry() +{ + // Simple code generation routine + sum += data_i.read(); + num++; + code_o.write(sum % num); +} + +void testbench(const sc_signal<int>& data, + const sc_signal<int>& code, + sc_signal<bool>& clock) +{ + int i; + + sc_start(0, SC_NS); + for (i=0; i<100; i++) { + sc_start( 10, SC_NS ); + clock.write(1); + sc_start( 10, SC_NS ); + clock.write(0); + char buf[BUFSIZ]; + sprintf( buf, "Data = %4d\tCode = %4d", data.read(), code.read() ); + cout << buf << endl; + } +} + +int +sc_main(int ac, char *av[]) +{ + sc_signal<bool> clock("Clock"); + sc_signal<int> data("Data"); + sc_signal<int> code("Code"); + + clock = 0; + data = 0; + code = 0; + + seqgen S("S", clock, data); + codegen C("C", data, code); + + testbench(data, code, clock); + return 0; +} |