systemc: Import tests from the Accellera systemc distribution.

Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

3 files changed, 460 insertions, 0 deletions

diff --git a/src/systemc/tests/systemc/misc/stars/star111004/COMPILE b/src/systemc/tests/systemc/misc/stars/star111004/COMPILE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/stars/star111004/COMPILE
diff --git a/src/systemc/tests/systemc/misc/stars/star111004/io_controller.h b/src/systemc/tests/systemc/misc/stars/star111004/io_controller.h
new file mode 100644
index 000000000..a63274904
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/stars/star111004/io_controller.h
@@ -0,0 +1,191 @@
+/*****************************************************************************
+
+  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+  more contributor license agreements.  See the NOTICE file distributed
+  with this work for additional information regarding copyright ownership.
+  Accellera licenses this file to you under the Apache License, Version 2.0
+  (the "License"); you may not use this file except in compliance with the
+  License.  You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+  implied.  See the License for the specific language governing
+  permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+  io_controller.h -- 
+
+  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+  changes you are making here.
+
+      Name, Affiliation, Date:
+  Description of Modification:
+
+ *****************************************************************************/
+
+/*############################################################################
+#  Siemens AG                        copyright 2000
+#                                    All Rights Reserved
+#
+#  File name : io_controller.h
+# 
+#  Title     : I/O-Controller
+#  
+#  Purpose   : definitions for I/O-Controller-module
+#
+#  Author    : Hannes Muhr
+#              PSE EZE MSA
+#
+##############################################################################
+#  Modification History :
+#
+#   
+##############################################################################*/
+
+#ifndef IO_CONTROLLER_INC
+#define IO_CONTROLLER_INC
+
+#ifdef LOGGING
+#include <fstream>
+#endif
+#include "systemc.h"
+//#include "mii_if.h"
+//#include "mbdatm.h"   
+
+// class semaphore {
+   
+//    bool value;
+   
+//    public:
+//       semaphore();
+//       void P();
+//       void V();
+//       bool get_value();
+// };
+
+//void sc_trace(sc_trace_file *, const semaphore&, const std::string&);
+
+#ifdef LOGGING
+/* stream for logging */
+extern ofstream flog;
+#endif
+
+#define MII_FIFO_SIZE 400
+#define SCAN_INTERVAL 200000   // 200 us
+#define NS *1e-9
+
+SC_MODULE(io_controller_m){ 
+
+   /* ports */
+   sc_in_clk clk_i486_if;
+   
+   sc_out<sc_uint<30> > addr30_o;
+   sc_inout<sc_uint<32> > data32_i;
+   sc_out<sc_uint<32> > data32_o;
+   sc_out<bool> ads_n_o;
+   sc_out<bool> wr_n_o;
+   sc_in<bool> rdy_n_i;
+   sc_in<bool> ar_i;
+   sc_in<bool> res_n_i;
+   
+   sc_out<sc_uint<4> > mii_data4_o;
+   sc_out<bool> mii_en_o;
+   sc_in<sc_uint<4> > mii_data4_i;
+   sc_in<bool> mii_en_i;
+   sc_in<bool> mii_coll_det;
+   sc_in_clk clk_mii;
+   
+   /* signals */
+   sc_signal<sc_uint<32> > mux_data32;
+   sc_signal<sc_uint<32> > in_fifo_data32;
+   sc_signal<sc_uint<32> > out_fifo_data32;
+   sc_signal<sc_uint<32> > control_data32;
+   sc_signal<bool> out_fifo_en;
+   sc_signal<bool> out_fifo_act;
+   sc_signal<bool> in_fifo_en;
+   sc_signal<bool> control_en;
+   sc_signal<bool> out_fifo_reset;
+   
+   /* variables */
+   sc_uint<32> addr_tx_frame_ptr;
+   sc_uint<32> rx_ptr_array;
+   sc_signal<bool> value;
+   
+   void P();
+   void V();
+   bool get_value();
+   //   semaphore sem;
+   
+   /* modules */
+//    mux_m *mux;
+//    shifter_m *shifter;
+//    out_fifo_m *out_fifo;
+//    in_fifo_m *in_fifo;
+   
+   SC_CTOR(io_controller_m){ 
+      
+      SC_CTHREAD(control_read, clk_i486_if.pos());
+      
+//       mux = new mux_m("mux");
+//       mux->clk(clk_mii);
+//       mux->data4_o(mii_data4_o);
+//       mux->data32_i(mux_data32);
+//       mux->en_i(out_fifo_act);
+//       mux->en_o(mii_en_o);
+      
+//       shifter = new shifter_m("shifter");
+//       shifter->clk(clk_mii);
+//       shifter->data32_o(in_fifo_data32);
+//       shifter->data4_i(mii_data4_i);
+//       shifter->en_i(mii_en_i);
+//       shifter->en_o(in_fifo_en);
+      
+//       out_fifo = new out_fifo_m("out_fifo");
+//       out_fifo->clk_out(clk_mii);
+//       out_fifo->clk_in(clk_i486_if);
+//       out_fifo->data32_o(mux_data32);
+//       out_fifo->data32_i(out_fifo_data32);
+//       out_fifo->en_i(out_fifo_en);
+//       out_fifo->act_o(out_fifo_act);
+//       out_fifo->reset(out_fifo_reset);
+      
+//       in_fifo = new in_fifo_m("in_fifo");
+//       in_fifo->clk_out(clk_i486_if);
+//       in_fifo->clk_in(clk_mii);
+//       in_fifo->data32_o(control_data32);
+//       in_fifo->data32_i(in_fifo_data32);
+//       in_fifo->en_i(in_fifo_en);
+//       in_fifo->en_o(control_en);
+      
+//       /* Initialize */
+//       in_fifo_data32 = (sc_uint<32>) 0;
+//       mux_data32 = (sc_uint<32>) 0;
+//       out_fifo_en = 0;
+//       out_fifo_act = 0;      
+//       //en_o = 0;
+//       in_fifo_en = 0;
+//       control_en = 0;
+//       out_fifo_reset = 0;
+      
+   } 
+   void control_write();
+   void control_read();
+   sc_uint<32> read_from_memory(sc_uint<32>);
+   void write_into_memory(sc_uint<32>, sc_uint<32>);
+
+}; 
+
+#endif
+
diff --git a/src/systemc/tests/systemc/misc/stars/star111004/star111004.cpp b/src/systemc/tests/systemc/misc/stars/star111004/star111004.cpp
new file mode 100644
index 000000000..152c050d3
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/stars/star111004/star111004.cpp
@@ -0,0 +1,269 @@
+/*****************************************************************************
+
+  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+  more contributor license agreements.  See the NOTICE file distributed
+  with this work for additional information regarding copyright ownership.
+  Accellera licenses this file to you under the Apache License, Version 2.0
+  (the "License"); you may not use this file except in compliance with the
+  License.  You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+  implied.  See the License for the specific language governing
+  permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+  star111004.cpp -- 
+
+  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+  changes you are making here.
+
+      Name, Affiliation, Date:
+  Description of Modification:
+
+ *****************************************************************************/
+
+/*############################################################################
+#  Siemens AG                        copyright 2000
+#                                    All Rights Reserved
+#
+#  File name : io_controller.cpp
+# 
+#  Title     : I/O-Controller
+#  
+#  Purpose   : functionality for I/O-Controller-module 
+#
+#  Author    : Hannes Muhr
+#              PSE EZE MSA
+#
+##############################################################################
+#  Modification History :
+#
+#   
+##############################################################################*/
+
+#include "systemc.h"
+#include "io_controller.h"
+
+#define MII_FRAME_SIZE 400
+
+// ::semaphore(){
+   
+//    value = false;
+// }
+
+void io_controller_m::P(){
+
+   while (value) wait();
+   value = true;
+}
+         
+void io_controller_m::V(){
+
+   /*if (!value) {
+      cerr << "V-operation on semaphore that is not P'd\n";
+      exit(-1);
+   }*/
+   value = false;
+}
+
+bool io_controller_m::get_value(){
+   
+   return value;
+}
+
+/*void sc_trace(sc_trace_file *tf, const semaphore& sem, const std::string& str){
+   
+   sc_trace(tf, sem.get_value(), str);
+}*/
+         
+sc_uint<32> io_controller_m::read_from_memory(sc_uint<32> mp){
+
+   // read from mbdatm-memory over i486-IF
+   
+   addr30_o = mp >> 2;
+   ads_n_o = 0;
+   wr_n_o = 0;
+   wait();
+   ads_n_o = 1;
+   do { wait(); } while (rdy_n_i == 1);
+   sc_uint<32> data = data32_i.read();
+   wr_n_o = 1;
+   addr30_o = 0;
+   return data;      
+}
+
+void io_controller_m::write_into_memory(sc_uint<32> mp, sc_uint<32> data){
+
+   addr30_o = mp >> 2;
+   ads_n_o = 0;
+   wr_n_o = 1;
+   wait();
+   ads_n_o = 1;
+   data32_o = data;
+   do { wait(); } while (rdy_n_i == 1);
+   wr_n_o = 1;
+   addr30_o = 0;
+   data32_o = 0;
+}
+
+void io_controller_m::control_write(){
+   sc_uint<32> word_cnt;
+   
+   if (!res_n_i.read()){
+      do { wait(); } while (!res_n_i);
+   
+      // initialize
+      
+      // wait for 1. AR (HWS-Daten)
+      do { wait(); } while (!ar_i);
+      sc_uint<32> hws = data32_i.read();
+      
+      wait();
+
+      // wait for 2. AR (ACB-Pointer)
+      do { wait(); } while (!ar_i);
+      addr_tx_frame_ptr = data32_i.read();
+      
+   } 
+  /* else if (mii_coll_det){
+      out_fifo_reset = 1;
+      out_fifo_en = 0;
+      out_fifo_data32 = (sc_uint<32>) 0;
+      
+      // reset i486-IF
+      addr30_o = 0;
+      data32_io = 0;
+      ads_n_o = 1;
+      wr_n_o = 1; 
+   
+      // release Semaphore if it is set
+      sem.V();
+      
+      wait();
+      out_fifo_reset = 0;
+   }*/
+   
+   while(true){
+      // normally Attention Request - Signal from MBDATM
+      // would wake up IO-Controller to read data from the memory,
+      // but the model from Hr. Wahl said: wait for some ms !!!
+      
+     // wait(unsigned ((SCAN_INTERVAL NS)/40e-9));
+      //do { wait(); } while (ar_i);
+      
+      #ifdef LOGGING
+         flog << sc_time_stamp()<<": "<<name()<<"::control_write - Attention Request" << endl;
+      #endif
+   
+      P();
+      sc_uint<32> tx_frame_ptr = read_from_memory(addr_tx_frame_ptr);
+      if (tx_frame_ptr != 0)
+         word_cnt = read_from_memory(tx_frame_ptr+(MII_FIFO_SIZE+1)*4);
+      V();
+      
+      // check, if frame available and frame is full (word_cnt == MII_FRAME_SIZE)
+      
+      while (tx_frame_ptr != 0 && word_cnt == MII_FRAME_SIZE){
+         #ifdef LOGGING
+            flog << sc_time_stamp()<<": "<<name()<<"::control_write - writing mii_frame into out_fifo" << endl;
+         #endif
+         
+         
+         for (int i = 0; i<MII_FIFO_SIZE; i++){
+            // reading from i486-IF and writing into
+            // out_fifo is mixed, so read_from_memory could not be applied
+            
+            P();
+            sc_uint<32> data = read_from_memory(tx_frame_ptr+i*4);
+            V();
+            
+            out_fifo_en = 1;
+            out_fifo_data32 = data;
+            wait();
+            out_fifo_en = 0;
+            
+         }
+         
+         while (out_fifo_act.read() != 0) wait(2);
+         
+         // write 0xFFFFFFFF (>MII_FRAME_SIZE) into tx_frame_ptr 
+         // to signal software in mbdatm that io-controller has 
+         // read out the frames and sent successfully
+         P();
+         write_into_memory(tx_frame_ptr+(MII_FIFO_SIZE+1)*4, 0xFFFFFFFF);
+         V();
+         
+         // read next frame_pointer and word_cnt from MBDATM
+         P();
+         tx_frame_ptr = read_from_memory(tx_frame_ptr+MII_FIFO_SIZE*4);
+         if (tx_frame_ptr != 0)
+            word_cnt = read_from_memory(tx_frame_ptr+(MII_FIFO_SIZE+1)*4);
+         V();
+         
+         
+      }
+      
+   }
+}
+
+void io_controller_m::control_read(){
+
+  int arr_ptr = 0;
+   
+   while (true){
+      do { wait(); } while (!control_en);
+      #ifdef LOGGING
+         flog << sc_time_stamp()<<": "<<name()<<"::control_read " << endl;
+      #endif
+      
+      // read rx_frame_ptr from MBDATM
+      P();
+      sc_uint<32> rx_frame_ptr = read_from_memory(rx_ptr_array+arr_ptr*4);
+      V();
+      /*if (rx_frame_ptr == 0){
+         cerr << "\nIO-Controller has read NULL-ptr from rx_array in MBDATM\n";
+         cerr << "MBDATM did not fill rx_array fast enough\n";
+         exit(-1);
+      }*/
+      if (++arr_ptr == MII_FIFO_SIZE)
+         arr_ptr = 0;
+      
+      // write data from in_fifo into MBDATM-memory
+      for (int i = 0; i < MII_FIFO_SIZE-1; i++){
+         sc_uint<32> d = control_data32.read();
+         // grab the semaphore
+         P();
+         write_into_memory(rx_frame_ptr + i*4, d);
+         // release semaphore
+         V();
+         do { wait(); } while (!control_en);
+         
+      }
+      // separate last loop because we don't want to wait for
+      // another control_en at this time
+      sc_uint<32> d = control_data32.read();
+      P();
+      write_into_memory(rx_frame_ptr + (MII_FIFO_SIZE-1)*4, d);
+      V();
+      
+      // write 0xFFFFFFFF into word_cnt from frame
+      // to indicate the software (MBDATM) that frame has been filled
+      P();
+      write_into_memory(rx_frame_ptr + (MII_FIFO_SIZE+1)*4, 0xFFFFFFFF);
+      V();
+   }
+}
+