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author | Gabe Black <gabeblack@google.com> | 2018-05-24 01:37:55 -0700 |
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committer | Gabe Black <gabeblack@google.com> | 2018-08-08 10:09:54 +0000 |
commit | 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (patch) | |
tree | 7b6faaacb4574a555e561534aa4a8508c0624c32 /src/systemc/tests/systemc/tracing/wif_trace/test01 | |
parent | 7235d3b5211d0ba8f528d930a4c1e7ad62eec51a (diff) | |
download | gem5-16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f.tar.xz |
systemc: Import tests from the Accellera systemc distribution.
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/tests/systemc/tracing/wif_trace/test01')
-rw-r--r-- | src/systemc/tests/systemc/tracing/wif_trace/test01/golden/test01.awif | 141 | ||||
-rw-r--r-- | src/systemc/tests/systemc/tracing/wif_trace/test01/test01.cpp | 118 |
2 files changed, 259 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test01/golden/test01.awif b/src/systemc/tests/systemc/tracing/wif_trace/test01/golden/test01.awif new file mode 100644 index 000000000..0b2dc346c --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test01/golden/test01.awif @@ -0,0 +1,141 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Bool" BIT variable ; +start_trace O0 ; +declare O1 "SC_Logic" MVL variable ; +start_trace O1 ; +declare O2 "SC_BV" BIT 0 3 variable ; +start_trace O2 ; +declare O3 "SC_LV" MVL 0 3 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0101" ; +assign O3 "0101" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "0110" ; +assign O3 "0110" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0111" ; +assign O3 "0111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "1000" ; +assign O3 "1000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "1001" ; +assign O3 "1001" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O3 "1010" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test01/test01.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test01/test01.cpp new file mode 100644 index 000000000..0ad3a2913 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test01/test01.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in<bool> clk; + + bool obj1; + sc_logic obj2; + sc_bv<4> obj3; + sc_lv<4> obj4; + + proc1( sc_module_name NAME, + sc_signal<bool>& CLK) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = "0000"; + obj4 = "0000"; + } + + void entry(); +}; + +void proc1::entry() +{ + sc_bv<4> bv; + sc_lv<4> sv; + int i = 5; + wait(); + while(true) { + bv = i; + sv = i++; + obj1 = 0; + obj2 = 1; + obj3 = "0000"; + obj4 = "1111"; + wait(); + obj1 = 1; + obj2 = 0; + obj3 = "1010"; + obj4 = "1011"; + wait(); + obj3 = bv; + obj4 = sv; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal<bool> clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test01"); + tf->set_time_unit( 1, SC_PS ); + // @@@@ ((wif_trace_file *) tf)->sc_set_wif_time_unit(-12); + sc_trace(tf, P1.obj1, "Bool"); + sc_trace(tf, P1.obj2, "SC_Logic"); + sc_trace(tf, P1.obj3, "SC_BV"); + sc_trace(tf, P1.obj4, "SC_LV"); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} |