systemc: Import tests from the Accellera systemc distribution.

Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

1 files changed, 1204 insertions, 0 deletions

diff --git a/src/systemc/tests/tlm/endian_conv/golden/test_endian_conv.log b/src/systemc/tests/tlm/endian_conv/golden/test_endian_conv.log
new file mode 100644
index 000000000..356868498
--- /dev/null
+++ b/src/systemc/tests/tlm/endian_conv/golden/test_endian_conv.log
@@ -0,0 +1,1204 @@
+SystemC Simulation
+
+TLM-2 Endianness Conversion Helper Functions Tester
+March 2008
+January 2012 Updated to read from endian_conv/input.txt
+
+0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 0
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 16
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 0
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111111111111111, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 0
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 16
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 1
+
+Converted Transaction
+  Addr = 0
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111111111111111, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 16
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 16
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 2
+
+Converted Transaction
+  Addr = 16
+  Len = 16
+  Txn data pointer = changed
+  Byte enable length = 0
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = klmnghijstuvopqrxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 16
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 4
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 16
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 16
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111111111111111, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxx89ab4567ghijcdefxxxx
+
+4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+Pool status: 
+Pool status: (16,16) 
+Pool status: (16,16) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 16
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 4
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 16
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 1
+
+Converted Transaction
+  Addr = 16
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111111111111111, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxx89ab4567ghijcdefxxxx
+
+5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 0
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 16
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 2
+
+Converted Transaction
+  Addr = 0
+  Len = 16
+  Txn data pointer = changed
+  Byte enable length = 0
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx
+
+6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 0
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 1111000011110000
+  Byte enable length = 16
+  Streaming width = 16
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 0
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000111100001111, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 4567xxxxcdefxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 0
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 1111000011110000
+  Byte enable length = 16
+  Streaming width = 16
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 1
+
+Converted Transaction
+  Addr = 0
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000111100001111, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 4567xxxxcdefxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 16
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 1111000011110000
+  Byte enable length = 16
+  Streaming width = 16
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 2
+
+Converted Transaction
+  Addr = 16
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000111100001111, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = klmnxxxxstuvxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 16
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 4
+  Byte enables = 1111000000001111
+  Byte enable length = 16
+  Streaming width = 16
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 16
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000111111110000, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxxxx4567ghijxxxxxxxx
+
+3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 16
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 4
+  Byte enables = 1111000000001111
+  Byte enable length = 16
+  Streaming width = 16
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 1
+
+Converted Transaction
+  Addr = 16
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000111111110000, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxxxx4567ghijxxxxxxxx
+
+4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+Pool status: (32,32) 
+Pool status: (32,32) (32,32) 
+Pool status: (32,32) (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 0
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 1111000000001111
+  Byte enable length = 16
+  Streaming width = 16
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 2
+
+Converted Transaction
+  Addr = 0
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000111111110000, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxx0123cdefxxxxxxxxxxxxxxxxxxxxxxxx
+
+5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 20
+  Len = 4
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 16
+  Len = 8
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 11110000, changed
+  Byte enable length = 8
+  Streaming width = 8
+
+Memory States after Transaction
+  initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 20
+  Len = 4
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 1
+
+Converted Transaction
+  Addr = 16
+  Len = 4
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111, changed
+  Byte enable length = 4
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 20
+  Len = 4
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 3
+
+Converted Transaction
+  Addr = 16
+  Len = 4
+  Txn data pointer = unchanged
+  Byte enable length = 0
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 28
+  Len = 4
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 4
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 24
+  Len = 8
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 11110000, changed
+  Byte enable length = 8
+  Streaming width = 8
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx
+
+2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 28
+  Len = 4
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 4
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 1
+
+Converted Transaction
+  Addr = 24
+  Len = 4
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111, changed
+  Byte enable length = 4
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx
+
+3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 28
+  Len = 4
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 4
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 3
+
+Converted Transaction
+  Addr = 24
+  Len = 4
+  Txn data pointer = unchanged
+  Byte enable length = 0
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx
+
+4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+Pool status: (32,32) 
+Pool status: (32,32) (32,32) 
+Pool status: (32,32) (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 21
+  Len = 2
+  Bus Width = 8
+  Data Word = 2
+  Initiator offset = 0
+  Byte enables = 11
+  Byte enable length = 2
+  Streaming width = 2
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 16
+  Len = 8
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 01100000, changed
+  Byte enable length = 8
+  Streaming width = 8
+
+Memory States after Transaction
+  initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 21
+  Len = 2
+  Bus Width = 8
+  Data Word = 2
+  Initiator offset = 0
+  Byte enables = 11
+  Byte enable length = 2
+  Streaming width = 2
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 1
+
+Converted Transaction
+  Addr = 16
+  Len = 3
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 011, changed
+  Byte enable length = 3
+  Streaming width = 3
+
+Memory States after Transaction
+  initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 21
+  Len = 2
+  Bus Width = 8
+  Data Word = 2
+  Initiator offset = 0
+  Byte enables = 11
+  Byte enable length = 2
+  Streaming width = 2
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 3
+
+Converted Transaction
+  Addr = 17
+  Len = 2
+  Txn data pointer = unchanged
+  Byte enables and byte enable pointer = 11, unchanged
+  Byte enable length = 2
+  Streaming width = 2
+
+Memory States after Transaction
+  initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 0
+  Len = 4
+  Bus Width = 4
+  Data Word = 4
+  Initiator offset = 25
+  Byte enables = 1111
+  Byte enable length = 4
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 0
+  Len = 4
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111, changed
+  Byte enable length = 4
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+
+1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 0
+  Len = 4
+  Bus Width = 4
+  Data Word = 4
+  Initiator offset = 25
+  Byte enables = 1111
+  Byte enable length = 4
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 1
+
+Converted Transaction
+  Addr = 0
+  Len = 4
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1111, changed
+  Byte enable length = 4
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+
+2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 0
+  Len = 4
+  Bus Width = 4
+  Data Word = 4
+  Initiator offset = 25
+  Byte enables = 1111
+  Byte enable length = 4
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 3
+
+Converted Transaction
+  Addr = 0
+  Len = 4
+  Txn data pointer = unchanged
+  Byte enables and byte enable pointer = 1111, unchanged
+  Byte enable length = 4
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+
+3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 13
+  Len = 14
+  Bus Width = 8
+  Data Word = 2
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 14
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 24
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 111000001111111100000111, changed
+  Byte enable length = 24
+  Streaming width = 24
+
+Memory States after Transaction
+  initiator = 9an8lmjkhivgtuxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+Pool status: (32,32) 
+Pool status: (32,32) (32,32) 
+Pool status: (32,32) (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 5
+  Len = 4
+  Bus Width = 4
+  Data Word = 1
+  Initiator offset = 25
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 4
+  Len = 8
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 11100001, changed
+  Byte enable length = 8
+  Streaming width = 8
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxrqpxxxxsxxxxxxxxxxxxxxxxxxxxxxxx
+
+5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 10
+  Len = 12
+  Bus Width = 4
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 111100001111
+  Byte enable length = 12
+  Streaming width = 12
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1100001111000011, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 15
+  Len = 8
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 25
+  Byte enables = 00001111
+  Byte enable length = 8
+  Streaming width = 8
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000000001111000, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxtuvwxxxxxxxxxxxxxxx
+
+0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 13
+  Len = 14
+  Bus Width = 8
+  Data Word = 2
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 14
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 1
+
+Converted Transaction
+  Addr = 8
+  Len = 24
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 111000001111111100000111, changed
+  Byte enable length = 24
+  Streaming width = 24
+
+Memory States after Transaction
+  initiator = 9an8lmjkhivgtuxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 5
+  Len = 4
+  Bus Width = 4
+  Data Word = 1
+  Initiator offset = 25
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 4
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 1
+
+Converted Transaction
+  Addr = 4
+  Len = 8
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 11100001, changed
+  Byte enable length = 8
+  Streaming width = 8
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxrqpxxxxsxxxxxxxxxxxxxxxxxxxxxxxx
+
+2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 10
+  Len = 12
+  Bus Width = 4
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 111100001111
+  Byte enable length = 12
+  Streaming width = 12
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 1
+
+Converted Transaction
+  Addr = 8
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1100001111000011, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 15
+  Len = 8
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 25
+  Byte enables = 00001111
+  Byte enable length = 8
+  Streaming width = 8
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 1
+
+Converted Transaction
+  Addr = 8
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 0000000001111000, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxtuvwxxxxxxxxxxxxxxx
+
+4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: 
+Pool status: (32,32) 
+Pool status: (32,32) (32,32) 
+Pool status: (32,32) (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 13
+  Len = 14
+  Bus Width = 8
+  Data Word = 2
+  Initiator offset = 0
+  Byte enables = x
+  Byte enable length = 0
+  Streaming width = 2
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 56
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 01100000011000000110000001100000011000000110000001100000, changed
+  Byte enable length = 56
+  Streaming width = 8
+
+Memory States after Transaction
+  initiator = 9a9a9a9a9a9a9axxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 5
+  Len = 4
+  Bus Width = 4
+  Data Word = 1
+  Initiator offset = 25
+  Byte enables = 1101
+  Byte enable length = 4
+  Streaming width = 2
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 4
+  Len = 8
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 01100100, changed
+  Byte enable length = 8
+  Streaming width = 4
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz
+  target = xxxxxspxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+
+6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 10
+  Len = 12
+  Bus Width = 4
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 11110000
+  Byte enable length = 8
+  Streaming width = 12
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1100001111000011, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 15
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 25
+  Byte enables = 00001111
+  Byte enable length = 8
+  Streaming width = 30
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 24
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 000000000111100001111000, changed
+  Byte enable length = 24
+  Streaming width = 24
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxtuvwxxxx1234xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+
+1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = R
+  Addr = 10
+  Len = 12
+  Bus Width = 4
+  Data Word = 4
+  Initiator offset = 0
+  Byte enables = 11110000
+  Byte enable length = 8
+  Streaming width = 15
+  Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Target memory = 0123456789abcdefghijklmnopqrstuvwxyz
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 16
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 1100001111000011, changed
+  Byte enable length = 16
+  Streaming width = 16
+
+Memory States after Transaction
+  initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx
+  target = 0123456789abcdefghijklmnopqrstuvwxyz
+
+2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+enter initiator memory state = (2048 characters)
+enter target memory state = (2048 characters)
+enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)
+Initiator Intent
+  Cmd = W
+  Addr = 15
+  Len = 16
+  Bus Width = 8
+  Data Word = 4
+  Initiator offset = 25
+  Byte enables = 00001111
+  Byte enable length = 8
+  Streaming width = 16
+  Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
+  Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+  Converter = 0
+
+Converted Transaction
+  Addr = 8
+  Len = 24
+  Txn data pointer = changed
+  Byte enables and byte enable pointer = 000000000111100001111000, changed
+  Byte enable length = 24
+  Streaming width = 24
+
+Memory States after Transaction
+  initiator = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz
+  target = xxxxxxxxxxxxxxxxxtuvwxxxx1234xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+
+3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s
+Pool status: (32,32) 
+Pool status: (32,32) (32,32) 
+Pool status: (32,32) (32,32) (32,32) 
+Pool status: (24,24) (32,32) (32,32) (32,32) 
+Pool status: (24,24) (32,32) (32,32) (32,32) 
+Pool status: (56,56) (24,24) (32,32) (32,32) (32,32) 
+Pool status: (18,18) (56,56) (24,24) (32,32) (32,32) (32,32) 
+Pool status: (20,20) (18,18) (56,56) (24,24) (32,32) (32,32) (32,32)