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| author | Ian Jiang <ianjiang.ict@gmail.com> | 2019-10-31 14:27:35 +0800 |
|---|---|---|
| committer | Ian Jiang <ianjiang.ict@gmail.com> | 2019-11-25 01:26:08 +0000 |
| commit | bee784dee932f66cefc702971a01a35f3436e929 (patch) | |
| tree | b1026306f7e7d1201a04eadca7f2d58f3edf813c /src/systemc | |
| parent | 27b5e32e94cf79c065a49d184b5a0dcad83399c3 (diff) | |
| download | gem5-bee784dee932f66cefc702971a01a35f3436e929.tar.xz | |
arch-riscv: Fix disassembling of operand list for compressed instructions
In disassembling compressed instructions, the original Gem5 gives needless
operands, such as register or immediate. This patch fixes the problem.
- Existing formats fixed: CIOp, CJOp, CBOp and Jump.
- New formats added: CIAddi4spnOp (for c.addi4spn only) and CompressedROp (with
templates CBasicDeclare and CBasicExecute)
Change-Id: Ic293836983256a59d3a7aca091c8184b410516a4
Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22566
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Alec Roelke <alec.roelke@gmail.com>
Maintainer: Alec Roelke <alec.roelke@gmail.com>
Diffstat (limited to 'src/systemc')
0 files changed, 0 insertions, 0 deletions