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author | Prakash Ramrakhyani <Prakash.Ramrakhyani@arm.com> | 2010-10-01 16:04:00 -0500 |
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committer | Prakash Ramrakhyani <Prakash.Ramrakhyani@arm.com> | 2010-10-01 16:04:00 -0500 |
commit | 9792bbc32400f522830ff8d92209c672d12440f3 (patch) | |
tree | 3ff0914c7f9fbde791317460bb48fa33c920d104 /src/unittest | |
parent | 521d68c82a2399bfe32f282aa58708103369b99c (diff) | |
download | gem5-9792bbc32400f522830ff8d92209c672d12440f3.tar.xz |
ARM: Fix some subtle bugs in the GIC
The GIC code can write to the registers with 8, 16, or 32 byte
accesses which could set/clear different numbers of interrupts.
Diffstat (limited to 'src/unittest')
0 files changed, 0 insertions, 0 deletions