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authorGabe Black <gblack@eecs.umich.edu>2011-10-30 00:32:54 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-10-30 00:32:54 -0700
commit5b433568f05c6f1b093628c2a90f8383abfc1168 (patch)
treebac68683155956bf1a71697f71c810a6a37414f0 /src
parentca36c01f7e515d8042b141c7912e0f090b121e6e (diff)
downloadgem5-5b433568f05c6f1b093628c2a90f8383abfc1168.tar.xz
SE/FS: Build the base process class in FS.
Diffstat (limited to 'src')
-rw-r--r--src/cpu/inorder/cpu.cc2
-rw-r--r--src/cpu/inorder/thread_state.hh11
-rw-r--r--src/cpu/o3/cpu.cc2
-rw-r--r--src/cpu/o3/thread_state.hh13
-rw-r--r--src/cpu/simple_thread.cc27
-rw-r--r--src/cpu/thread_state.cc18
-rw-r--r--src/cpu/thread_state.hh10
-rw-r--r--src/mem/page_table.cc18
-rw-r--r--src/mem/page_table.hh10
-rw-r--r--src/mem/translating_port.cc16
-rw-r--r--src/mem/translating_port.hh11
-rw-r--r--src/sim/SConscript4
-rw-r--r--src/sim/process.cc14
-rw-r--r--src/sim/process.hh11
-rw-r--r--src/sim/process_impl.hh12
-rw-r--r--src/sim/syscall_emul.hh1
16 files changed, 36 insertions, 144 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 07a013afc..cfc083718 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -267,7 +267,7 @@ InOrderCPU::InOrderCPU(Params *params)
#if FULL_SYSTEM
// SMT is not supported in FS mode yet.
assert(numThreads == 1);
- thread[tid] = new Thread(this, 0);
+ thread[tid] = new Thread(this, 0, NULL);
#else
if (tid < (ThreadID)params->workload.size()) {
DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n",
diff --git a/src/cpu/inorder/thread_state.hh b/src/cpu/inorder/thread_state.hh
index 227097569..e4fe76491 100644
--- a/src/cpu/inorder/thread_state.hh
+++ b/src/cpu/inorder/thread_state.hh
@@ -48,8 +48,8 @@ class FunctionProfile;
class ProfileNode;
#else
class FunctionalMemory;
-class Process;
#endif
+class Process;
/**
* Class that has various thread state, such as the status, the
@@ -76,24 +76,15 @@ class InOrderThreadState : public ThreadState {
*/
bool trapPending;
-#if FULL_SYSTEM
- InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num)
- : ThreadState(reinterpret_cast<BaseCPU*>(_cpu), _thread_num),
- cpu(_cpu), inSyscall(0), trapPending(0), lastGradIsBranch(false)
- { }
-#else
InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num,
Process *_process)
: ThreadState(reinterpret_cast<BaseCPU*>(_cpu), _thread_num,
_process),
cpu(_cpu), inSyscall(0), trapPending(0), lastGradIsBranch(false)
{ }
-#endif
-#if !FULL_SYSTEM
/** Handles the syscall. */
void syscall(int64_t callnum) { process->syscall(callnum, tc); }
-#endif
#if FULL_SYSTEM
void dumpFuncProfile();
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 441bd4389..371e4d53c 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -357,7 +357,7 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
#if FULL_SYSTEM
// SMT is not supported in FS mode yet.
assert(this->numThreads == 1);
- this->thread[tid] = new Thread(this, 0);
+ this->thread[tid] = new Thread(this, 0, NULL);
#else
if (tid < params->workload.size()) {
DPRINTF(O3CPU, "Workload[%i] process is %#x",
diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh
index 1171053b9..40e5c049b 100644
--- a/src/cpu/o3/thread_state.hh
+++ b/src/cpu/o3/thread_state.hh
@@ -75,11 +75,11 @@ struct O3ThreadState : public ThreadState {
*/
bool trapPending;
-#if FULL_SYSTEM
- O3ThreadState(O3CPU *_cpu, int _thread_num)
- : ThreadState(_cpu, _thread_num),
+ O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process)
+ : ThreadState(_cpu, _thread_num, _process),
cpu(_cpu), inSyscall(0), trapPending(0)
{
+#if FULL_SYSTEM
if (cpu->params()->profile) {
profile = new FunctionProfile(cpu->params()->system->kernelSymtab);
Callback *cb =
@@ -93,13 +93,8 @@ struct O3ThreadState : public ThreadState {
static ProfileNode dummyNode;
profileNode = &dummyNode;
profilePC = 3;
- }
-#else
- O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process)
- : ThreadState(_cpu, _thread_num, _process),
- cpu(_cpu), inSyscall(0), trapPending(0)
- { }
#endif
+ }
/** Pointer to the ThreadContext of this thread. */
ThreadContext *tc;
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index 2f629c2e1..6b9f60402 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -62,11 +62,20 @@
using namespace std;
// constructor
-#if FULL_SYSTEM
+#if !FULL_SYSTEM
+SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
+ TheISA::TLB *_itb, TheISA::TLB *_dtb)
+ : ThreadState(_cpu, _thread_num, _process),
+ cpu(_cpu), itb(_itb), dtb(_dtb)
+{
+ clearArchRegs();
+ tc = new ProxyThreadContext<SimpleThread>(this);
+}
+#else
SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
TheISA::TLB *_itb, TheISA::TLB *_dtb,
bool use_kernel_stats)
- : ThreadState(_cpu, _thread_num),
+ : ThreadState(_cpu, _thread_num, NULL),
cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb)
{
@@ -93,24 +102,10 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
if (use_kernel_stats)
kernelStats = new TheISA::Kernel::Statistics(system);
}
-#else
-SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
- TheISA::TLB *_itb, TheISA::TLB *_dtb)
- : ThreadState(_cpu, _thread_num, _process),
- cpu(_cpu), itb(_itb), dtb(_dtb)
-{
- clearArchRegs();
- tc = new ProxyThreadContext<SimpleThread>(this);
-}
-
#endif
SimpleThread::SimpleThread()
-#if FULL_SYSTEM
- : ThreadState(NULL, -1)
-#else
: ThreadState(NULL, -1, NULL)
-#endif
{
tc = new ProxyThreadContext<SimpleThread>(this);
}
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index 342574083..cce9d8015 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -42,32 +42,24 @@
#include "cpu/quiesce_event.hh"
#endif
-#if FULL_SYSTEM
-ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid)
-#else
ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
-#endif
: numInst(0), numLoad(0), _status(ThreadContext::Halted),
baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
#if FULL_SYSTEM
profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
kernelStats(NULL),
-#else
- process(_process),
#endif
- port(NULL), virtPort(NULL), physPort(NULL), funcExeInst(0),
- storeCondFailures(0)
+ process(_process), port(NULL), virtPort(NULL), physPort(NULL),
+ funcExeInst(0), storeCondFailures(0)
{
}
ThreadState::~ThreadState()
{
-#if !FULL_SYSTEM
if (port) {
delete port->getPeer();
delete port;
}
-#endif
}
void
@@ -164,11 +156,7 @@ ThreadState::getMemPort()
/* Use this port to for syscall emulation writes to memory. */
port = new TranslatingPort(csprintf("%s-%d-funcport", baseCpu->name(),
- _threadId),
-#if !FULL_SYSTEM
- process,
-#endif
- TranslatingPort::NextPage);
+ _threadId), process, TranslatingPort::NextPage);
connectToMemFunc(port);
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index 1087c27c2..10b87f02c 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -36,11 +36,8 @@
#include "cpu/base.hh"
#include "cpu/profile.hh"
#include "cpu/thread_context.hh"
-
-#if !FULL_SYSTEM
#include "mem/mem_object.hh"
#include "sim/process.hh"
-#endif
#if FULL_SYSTEM
class EndQuiesceEvent;
@@ -66,11 +63,7 @@ class TranslatingPort;
struct ThreadState {
typedef ThreadContext::Status Status;
-#if FULL_SYSTEM
- ThreadState(BaseCPU *cpu, ThreadID _tid);
-#else
ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
-#endif
~ThreadState();
@@ -185,10 +178,9 @@ struct ThreadState {
EndQuiesceEvent *quiesceEvent;
TheISA::Kernel::Statistics *kernelStats;
+#endif
protected:
-#else
Process *process;
-#endif
TranslatingPort *port;
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index a2d566d0c..c260ba2d4 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -52,15 +52,9 @@
using namespace std;
using namespace TheISA;
-PageTable::PageTable(
-#if !FULL_SYSTEM
- Process *_process,
-#endif
- Addr _pageSize)
- : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize)))
-#if !FULL_SYSTEM
- , process(_process)
-#endif
+PageTable::PageTable(Process *_process, Addr _pageSize)
+ : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
+ process(_process)
{
assert(isPowerOf2(pageSize));
pTableCache[0].vaddr = 0;
@@ -89,11 +83,9 @@ PageTable::allocate(Addr vaddr, int64_t size)
vaddr);
}
-#if !FULL_SYSTEM
pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
process->system->new_page());
updateCache(vaddr, pTable[vaddr]);
-#endif
}
}
@@ -204,9 +196,7 @@ PageTable::serialize(std::ostream &os)
PTableItr iter = pTable.begin();
PTableItr end = pTable.end();
while (iter != end) {
-#if !FULL_SYSTEM
os << "\n[" << csprintf("%s.Entry%d", process->name(), count) << "]\n";
-#endif
paramOut(os, "vaddr", iter->first);
iter->second.serialize(os);
@@ -226,7 +216,6 @@ PageTable::unserialize(Checkpoint *cp, const std::string &section)
pTable.clear();
while (i < count) {
-#if !FULL_SYSTEM
TheISA::TlbEntry *entry;
Addr vaddr;
@@ -235,7 +224,6 @@ PageTable::unserialize(Checkpoint *cp, const std::string &section)
entry->unserialize(cp, csprintf("%s.Entry%d", process->name(), i));
pTable[vaddr] = *entry;
++i;
-#endif
}
}
diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index 37bc808e7..36fe88490 100644
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -47,9 +47,7 @@
#include "mem/request.hh"
#include "sim/serialize.hh"
-#if !FULL_SYSTEM
class Process;
-#endif
/**
* Page Table Declaration.
@@ -71,17 +69,11 @@ class PageTable
const Addr pageSize;
const Addr offsetMask;
-#if !FULL_SYSTEM
Process *process;
-#endif
public:
- PageTable(
-#if !FULL_SYSTEM
- Process *_process,
-#endif
- Addr _pageSize = TheISA::VMPageSize);
+ PageTable(Process *_process, Addr _pageSize = TheISA::VMPageSize);
~PageTable();
diff --git a/src/mem/translating_port.cc b/src/mem/translating_port.cc
index 260871874..6a383a2bb 100644
--- a/src/mem/translating_port.cc
+++ b/src/mem/translating_port.cc
@@ -33,27 +33,17 @@
#include "arch/isa_traits.hh"
#include "base/chunk_generator.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "mem/page_table.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
-#if !FULL_SYSTEM
#include "sim/process.hh"
-#endif
using namespace TheISA;
-TranslatingPort::TranslatingPort(const std::string &_name,
-#if !FULL_SYSTEM
- Process *p,
-#endif
+TranslatingPort::TranslatingPort(const std::string &_name, Process *p,
AllocType alloc)
- : FunctionalPort(_name),
-#if !FULL_SYSTEM
- pTable(p->pTable), process(p),
-#endif
- allocating(alloc)
+ : FunctionalPort(_name), pTable(p->pTable), process(p), allocating(alloc)
{ }
TranslatingPort::~TranslatingPort()
@@ -99,11 +89,9 @@ TranslatingPort::tryWriteBlob(Addr addr, uint8_t *p, int size)
VMPageSize);
} else if (allocating == NextPage) {
// check if we've accessed the next page on the stack
-#if !FULL_SYSTEM
if (!process->fixupStackFault(gen.addr()))
panic("Page table fault when accessing virtual address %#x "
"during functional write\n", gen.addr());
-#endif
} else {
return false;
}
diff --git a/src/mem/translating_port.hh b/src/mem/translating_port.hh
index dffcac766..438d8fe61 100644
--- a/src/mem/translating_port.hh
+++ b/src/mem/translating_port.hh
@@ -32,13 +32,10 @@
#ifndef __MEM_TRANSLATING_PROT_HH__
#define __MEM_TRANSLATING_PROT_HH__
-#include "config/full_system.hh"
#include "mem/port.hh"
class PageTable;
-#if !FULL_SYSTEM
class Process;
-#endif
class TranslatingPort : public FunctionalPort
{
@@ -51,17 +48,11 @@ class TranslatingPort : public FunctionalPort
private:
PageTable *pTable;
-#if !FULL_SYSTEM
Process *process;
-#endif
AllocType allocating;
public:
- TranslatingPort(const std::string &_name,
-#if !FULL_SYSTEM
- Process *p,
-#endif
- AllocType alloc);
+ TranslatingPort(const std::string &_name, Process *p, AllocType alloc);
virtual ~TranslatingPort();
bool tryReadBlob(Addr addr, uint8_t *p, int size);
diff --git a/src/sim/SConscript b/src/sim/SConscript
index 041c3ac10..d9d8ded24 100644
--- a/src/sim/SConscript
+++ b/src/sim/SConscript
@@ -48,8 +48,10 @@ Source('simulate.cc')
Source('stat_control.cc')
if env['TARGET_ISA'] != 'no':
+ SimObject('Process.py')
SimObject('System.py')
Source('faults.cc')
+ Source('process.cc')
Source('pseudo_inst.cc')
Source('system.cc')
@@ -57,9 +59,7 @@ if env['FULL_SYSTEM']:
Source('arguments.cc')
elif env['TARGET_ISA'] != 'no':
Source('tlb.cc')
- SimObject('Process.py')
- Source('process.cc')
Source('syscall_emul.cc')
DebugFlag('Checkpoint')
diff --git a/src/sim/process.cc b/src/sim/process.cc
index 62b9b7002..f28b1f1ca 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -77,15 +77,6 @@
using namespace std;
using namespace TheISA;
-//
-// The purpose of this code is to fake the loader & syscall mechanism
-// when there's no OS: thus there's no resone to use it in FULL_SYSTEM
-// mode when we do have an OS
-//
-#if FULL_SYSTEM
-#error "process.cc not compatible with FULL_SYSTEM"
-#endif
-
// current number of allocated processes
int num_processes = 0;
@@ -579,6 +570,7 @@ LiveProcess::LiveProcess(LiveProcessParams * params, ObjectFile *_objFile)
void
LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
{
+#if !FULL_SYSTEM
num_syscalls++;
SyscallDesc *desc = getDesc(callnum);
@@ -586,6 +578,7 @@ LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
fatal("Syscall %d out of range", callnum);
desc->doSyscall(callnum, this, tc);
+#endif
}
IntReg
@@ -611,6 +604,7 @@ LiveProcess::create(LiveProcessParams * params)
"executables are supported!\n Please recompile your "
"executable as a static binary and try again.\n");
+#if !FULL_SYSTEM
#if THE_ISA == ALPHA_ISA
if (objFile->getArch() != ObjectFile::Alpha)
fatal("Object file architecture does not match compiled ISA (Alpha).");
@@ -721,7 +715,7 @@ LiveProcess::create(LiveProcessParams * params)
#else
#error "THE_ISA not set"
#endif
-
+#endif
if (process == NULL)
fatal("Unknown error creating process object.");
diff --git a/src/sim/process.hh b/src/sim/process.hh
index d48b1b463..82879c0e6 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -32,15 +32,6 @@
#ifndef __PROCESS_HH__
#define __PROCESS_HH__
-//
-// The purpose of this code is to fake the loader & syscall mechanism
-// when there's no OS: thus there's no reason to use it in FULL_SYSTEM
-// mode when we do have an OS.
-//
-#include "config/full_system.hh"
-
-#if !FULL_SYSTEM
-
#include <string>
#include <vector>
@@ -317,6 +308,4 @@ class LiveProcess : public Process
};
-#endif // !FULL_SYSTEM
-
#endif // __PROCESS_HH__
diff --git a/src/sim/process_impl.hh b/src/sim/process_impl.hh
index b5333858c..944c55ec0 100644
--- a/src/sim/process_impl.hh
+++ b/src/sim/process_impl.hh
@@ -32,15 +32,6 @@
#ifndef __SIM_PROCESS_IMPL_HH__
#define __SIM_PROCESS_IMPL_HH__
-//
-// The purpose of this code is to fake the loader & syscall mechanism
-// when there's no OS: thus there's no reason to use it in FULL_SYSTEM
-// mode when we do have an OS.
-//
-#include "config/full_system.hh"
-
-#if !FULL_SYSTEM
-
#include <string>
#include <vector>
@@ -69,7 +60,4 @@ copyStringArray(std::vector<std::string> &strings,
memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(AddrType));
}
-
-#endif // !FULL_SYSTEM
-
#endif
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index d119adc24..aff66ae9c 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -65,6 +65,7 @@
#include "mem/translating_port.hh"
#include "sim/byteswap.hh"
#include "sim/process.hh"
+#include "sim/syscallreturn.hh"
#include "sim/system.hh"
///