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authorAndreas Sandberg <andreas.sandberg@arm.com>2018-05-18 12:52:08 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2018-06-14 12:53:13 +0000
commit8c45a7f8d3d4fb595169e28f1e0f9e8822e361c4 (patch)
tree725d0f67375f1cbbe8901efa17e0a94a823e4fe6 /src
parent31791727d3ec6aed00557dbb4770637df67c473d (diff)
downloadgem5-8c45a7f8d3d4fb595169e28f1e0f9e8822e361c4.tar.xz
dev-arm: Remove deprecated GIC test interfaces
Change-Id: I4c5203b216387d9a4f041c7a00caea926e5cfca6 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10810
Diffstat (limited to 'src')
-rw-r--r--src/dev/arm/gic_pl390.cc42
-rw-r--r--src/dev/arm/gic_pl390.hh12
2 files changed, 0 insertions, 54 deletions
diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc
index 4818be6c9..f918f7783 100644
--- a/src/dev/arm/gic_pl390.cc
+++ b/src/dev/arm/gic_pl390.cc
@@ -76,7 +76,6 @@ Pl390::Pl390(const Params *p)
cpuSgiPending {}, cpuSgiActive {},
cpuSgiPendingExt {}, cpuSgiActiveExt {},
cpuPpiPending {}, cpuPpiActive {},
- irqEnable(false),
pendingDelayedInterrupts(0)
{
for (int x = 0; x < CPU_MAX; x++) {
@@ -916,7 +915,6 @@ Pl390::serialize(CheckpointOut &cp) const
SERIALIZE_ARRAY(cpuSgiPendingExt, CPU_MAX);
SERIALIZE_ARRAY(cpuPpiActive, CPU_MAX);
SERIALIZE_ARRAY(cpuPpiPending, CPU_MAX);
- SERIALIZE_SCALAR(irqEnable);
SERIALIZE_SCALAR(gem5ExtensionsEnabled);
for (uint32_t i=0; i < bankedRegs.size(); ++i) {
@@ -959,7 +957,6 @@ Pl390::unserialize(CheckpointIn &cp)
UNSERIALIZE_ARRAY(cpuSgiPendingExt, CPU_MAX);
UNSERIALIZE_ARRAY(cpuPpiActive, CPU_MAX);
UNSERIALIZE_ARRAY(cpuPpiPending, CPU_MAX);
- UNSERIALIZE_SCALAR(irqEnable);
// Handle checkpoints from before we drained the GIC to prevent
// in-flight interrupts.
@@ -998,42 +995,3 @@ Pl390Params::create()
{
return new Pl390(this);
}
-
-/* Functions for debugging and testing */
-void
-Pl390::driveSPI(uint32_t spiVect)
-{
- DPRINTF(GIC, "Received SPI Vector:%x Enable: %d\n", spiVect, irqEnable);
- getPendingInt(0, 1) |= spiVect;
- if (irqEnable && enabled) {
- updateIntState(-1);
- }
-}
-
-void
-Pl390::driveIrqEn( bool state)
-{
- irqEnable = state;
- DPRINTF(GIC, " Enabling Irq\n");
- updateIntState(-1);
-}
-
-void
-Pl390::driveLegIRQ(bool state)
-{
- if (irqEnable && !(!enabled && cpuEnabled[0])) {
- if (state) {
- DPRINTF(GIC, "Driving Legacy Irq\n");
- platform->intrctrl->post(0, ArmISA::INT_IRQ, 0);
- }
- else platform->intrctrl->clear(0, ArmISA::INT_IRQ, 0);
- }
-}
-
-void
-Pl390::driveLegFIQ(bool state)
-{
- if (state)
- platform->intrctrl->post(0, ArmISA::INT_FIQ, 0);
- else platform->intrctrl->clear(0, ArmISA::INT_FIQ, 0);
-}
diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh
index 58d84346d..dc45d25d7 100644
--- a/src/dev/arm/gic_pl390.hh
+++ b/src/dev/arm/gic_pl390.hh
@@ -320,9 +320,6 @@ class Pl390 : public BaseGic, public BaseGicRegisters
uint32_t cpuPpiPending[CPU_MAX];
uint32_t cpuPpiActive[CPU_MAX];
- /** IRQ Enable Used for debug */
- bool irqEnable;
-
/** software generated interrupt
* @param data data to decode that indicates which cpus to interrupt
*/
@@ -392,15 +389,6 @@ class Pl390 : public BaseGic, public BaseGicRegisters
void sendPPInt(uint32_t num, uint32_t cpu) override;
void clearPPInt(uint32_t num, uint32_t cpu) override;
- public: // Test & debug intefaces
- /** @{ */
- /* Various functions fer testing and debugging */
- void driveSPI(uint32_t spi);
- void driveLegIRQ(bool state);
- void driveLegFIQ(bool state);
- void driveIrqEn(bool state);
- /** @} */
-
protected:
/** Handle a read to the distributor portion of the GIC
* @param pkt packet to respond to