python: Move more code into m5.util allow SCons to use that code.

Get rid of misc.py and just stick misc things in __init__.py
Move utility functions out of SCons files and into m5.util
Move utility type stuff from m5/__init__.py to m5/util/__init__.py
Remove buildEnv from m5 and allow access only from m5.defines
Rename AddToPath to addToPath while we're moving it to m5.util
Rename read_command to readCommand while we're moving it
Rename compare_versions to compareVersions while we're moving it.

--HG--
rename : src/python/m5/convert.py => src/python/m5/util/convert.py
rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py

33 files changed, 323 insertions, 360 deletions

diff --git a/src/SConscript b/src/SConscript
index d96922b49..687709ac1 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -49,7 +49,7 @@ Import('*')
 # Children need to see the environment
 Export('env')
 
-build_env = dict([(opt, env[opt]) for opt in export_vars])
+build_env = [(opt, env[opt]) for opt in export_vars]
 
 ########################################################################
 # Code for adding source files of various types
@@ -266,6 +266,8 @@ for opt in export_vars:
 # Prevent any SimObjects from being added after this point, they
 # should all have been added in the SConscripts above
 #
+SimObject.fixed = True
+
 class DictImporter(object):
     '''This importer takes a dictionary of arbitrary module names that
     map to arbitrary filenames.'''
@@ -283,7 +285,7 @@ class DictImporter(object):
         self.installed = set()
 
     def find_module(self, fullname, path):
-        if fullname == 'defines':
+        if fullname == 'm5.defines':
             return self
 
         if fullname == 'm5.objects':
@@ -293,7 +295,7 @@ class DictImporter(object):
             return None
 
         source = self.modules.get(fullname, None)
-        if source is not None and exists(source.snode.abspath):
+        if source is not None and fullname.startswith('m5.objects'):
             return self
 
         return None
@@ -308,8 +310,8 @@ class DictImporter(object):
             mod.__path__ = fullname.split('.')
             return mod
 
-        if fullname == 'defines':
-            mod.__dict__['buildEnv'] = build_env
+        if fullname == 'm5.defines':
+            mod.__dict__['buildEnv'] = m5.util.SmartDict(build_env)
             return mod
 
         source = self.modules[fullname]
@@ -321,15 +323,18 @@ class DictImporter(object):
 
         return mod
 
+import m5.SimObject
+import m5.params
+
+m5.SimObject.clear()
+m5.params.clear()
+
 # install the python importer so we can grab stuff from the source
 # tree itself.  We can't have SimObjects added after this point or
 # else we won't know about them for the rest of the stuff.
-SimObject.fixed = True
 importer = DictImporter(PySource.modules)
 sys.meta_path[0:0] = [ importer ]
 
-import m5
-
 # import all sim objects so we can populate the all_objects list
 # make sure that we're working with a list, then let's sort it
 for modname in SimObject.modnames:
@@ -346,6 +351,12 @@ all_enums = m5.params.allEnums
 all_params = {}
 for name,obj in sorted(sim_objects.iteritems()):
     for param in obj._params.local.values():
+        # load the ptype attribute now because it depends on the
+        # current version of SimObject.allClasses, but when scons
+        # actually uses the value, all versions of
+        # SimObject.allClasses will have been loaded
+        param.ptype
+
         if not hasattr(param, 'swig_decl'):
             continue
         pname = param.ptype_str
@@ -365,13 +376,24 @@ depends = [ PySource.modules[dep].tnode for dep in module_depends ]
 #
 
 # Generate Python file containing a dict specifying the current
-# build_env flags.
+# buildEnv flags.
 def makeDefinesPyFile(target, source, env):
-    f = file(str(target[0]), 'w')
     build_env, hg_info = [ x.get_contents() for x in source ]
-    print >>f, "buildEnv = %s" % build_env
-    print >>f, "hgRev = '%s'" % hg_info
-    f.close()
+
+    code = m5.util.code_formatter()
+    code("""
+import m5.internal
+import m5.util
+
+buildEnv = m5.util.SmartDict($build_env)
+hgRev = '$hg_info'
+
+compileDate = m5.internal.core.compileDate
+for k,v in m5.internal.core.__dict__.iteritems():
+    if k.startswith('flag_'):
+        setattr(buildEnv, k[5:], v)
+""")
+    code.write(str(target[0]))
 
 defines_info = [ Value(build_env), Value(env['HG_INFO']) ]
 # Generate a file with all of the compile options in it
diff --git a/src/arch/mips/BISystem.py b/src/arch/mips/BISystem.py
index dd4e4fe25..a6e4091f2 100755
--- a/src/arch/mips/BISystem.py
+++ b/src/arch/mips/BISystem.py
@@ -28,10 +28,11 @@
 #
 # Authors: Jaidev Patwardhan
 
-from m5 import build_env
+from m5.defines import buildEnv
+
 from System import *
 
-if build_env['FULL_SYSTEM']:
+if buildEnv['FULL_SYSTEM']:
     class BareIronMipsSystem(MipsSystem):
         type = 'BareIronMipsSystem'
         system_type = 34
diff --git a/src/arch/mips/MipsCPU.py b/src/arch/mips/MipsCPU.py
index 81c6bdacf..48ee4171c 100644
--- a/src/arch/mips/MipsCPU.py
+++ b/src/arch/mips/MipsCPU.py
@@ -29,12 +29,13 @@
 # Authors: Jaidev Patwardhan
 #          Korey Sewell
 
-from m5.SimObject import SimObject
+from m5.defines import buildEnv
 from m5.params import *
+
 from BaseCPU import BaseCPU
 
 class BaseMipsCPU(BaseCPU)
-    if build_env['TARGET_ISA'] == 'mips':
+    if buildEnv['TARGET_ISA'] == 'mips':
         CP0_IntCtl_IPTI = Param.Unsigned(0,"No Description")
         CP0_IntCtl_IPPCI = Param.Unsigned(0,"No Description")
         CP0_SrsCtl_HSS = Param.Unsigned(0,"No Description")
diff --git a/src/arch/mips/MipsSystem.py b/src/arch/mips/MipsSystem.py
index c3dcf4e0b..d271bd387 100644
--- a/src/arch/mips/MipsSystem.py
+++ b/src/arch/mips/MipsSystem.py
@@ -28,10 +28,10 @@
 #
 # Authors: Jaidev Patwardhan
 
-from m5.SimObject import SimObject
+from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
+
 from System import System
 
 class MipsSystem(System):
@@ -42,7 +42,7 @@ class MipsSystem(System):
     system_type = Param.UInt64("Type of system we are emulating")
     system_rev = Param.UInt64("Revision of system we are emulating")
 
-if build_env['FULL_SYSTEM']:
+if buildEnv['FULL_SYSTEM']:
     class LinuxMipsSystem(MipsSystem):
         type = 'LinuxMipsSystem'
         system_type = 34
diff --git a/src/arch/x86/X86TLB.py b/src/arch/x86/X86TLB.py
index 15b03fd33..9f7dc43b3 100644
--- a/src/arch/x86/X86TLB.py
+++ b/src/arch/x86/X86TLB.py
@@ -53,13 +53,14 @@
 #
 # Authors: Gabe Black
 
-from MemObject import MemObject
+from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
+
 from BaseTLB import BaseTLB
+from MemObject import MemObject
 
-if build_env['FULL_SYSTEM']:
+if buildEnv['FULL_SYSTEM']:
     class X86PagetableWalker(MemObject):
         type = 'X86PagetableWalker'
         cxx_class = 'X86ISA::Walker'
@@ -70,6 +71,6 @@ class X86TLB(BaseTLB):
     type = 'X86TLB'
     cxx_class = 'X86ISA::TLB'
     size = Param.Int(64, "TLB size")
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         walker = Param.X86PagetableWalker(\
                 X86PagetableWalker(), "page table walker")
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 4661375ba..75114053e 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -26,36 +26,38 @@
 #
 # Authors: Nathan Binkert
 
-from MemObject import MemObject
+import sys
+
+from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
+
 from Bus import Bus
 from InstTracer import InstTracer
 from ExeTracer import ExeTracer
-import sys
+from MemObject import MemObject
 
 default_tracer = ExeTracer()
 
-if build_env['TARGET_ISA'] == 'alpha':
+if buildEnv['TARGET_ISA'] == 'alpha':
     from AlphaTLB import AlphaDTB, AlphaITB
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         from AlphaInterrupts import AlphaInterrupts
-elif build_env['TARGET_ISA'] == 'sparc':
+elif buildEnv['TARGET_ISA'] == 'sparc':
     from SparcTLB import SparcTLB
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         from SparcInterrupts import SparcInterrupts
-elif build_env['TARGET_ISA'] == 'x86':
+elif buildEnv['TARGET_ISA'] == 'x86':
     from X86TLB import X86TLB
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         from X86LocalApic import X86LocalApic
-elif build_env['TARGET_ISA'] == 'mips':
+elif buildEnv['TARGET_ISA'] == 'mips':
     from MipsTLB import MipsTLB
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         from MipsInterrupts import MipsInterrupts
-elif build_env['TARGET_ISA'] == 'arm':
+elif buildEnv['TARGET_ISA'] == 'arm':
     from ArmTLB import ArmTLB
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         from ArmInterrupts import ArmInterrupts
 
 class BaseCPU(MemObject):
@@ -76,47 +78,47 @@ class BaseCPU(MemObject):
     do_statistics_insts = Param.Bool(True,
         "enable statistics pseudo instructions")
 
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         profile = Param.Latency('0ns', "trace the kernel stack")
         do_quiesce = Param.Bool(True, "enable quiesce instructions")
     else:
         workload = VectorParam.Process("processes to run")
 
-    if build_env['TARGET_ISA'] == 'sparc':
+    if buildEnv['TARGET_ISA'] == 'sparc':
         dtb = Param.SparcTLB(SparcTLB(), "Data TLB")
         itb = Param.SparcTLB(SparcTLB(), "Instruction TLB")
-        if build_env['FULL_SYSTEM']:
+        if buildEnv['FULL_SYSTEM']:
             interrupts = Param.SparcInterrupts(
                 SparcInterrupts(), "Interrupt Controller")
-    elif build_env['TARGET_ISA'] == 'alpha':
+    elif buildEnv['TARGET_ISA'] == 'alpha':
         dtb = Param.AlphaTLB(AlphaDTB(), "Data TLB")
         itb = Param.AlphaTLB(AlphaITB(), "Instruction TLB")
-        if build_env['FULL_SYSTEM']:
+        if buildEnv['FULL_SYSTEM']:
             interrupts = Param.AlphaInterrupts(
                 AlphaInterrupts(), "Interrupt Controller")
-    elif build_env['TARGET_ISA'] == 'x86':
+    elif buildEnv['TARGET_ISA'] == 'x86':
         dtb = Param.X86TLB(X86TLB(), "Data TLB")
         itb = Param.X86TLB(X86TLB(), "Instruction TLB")
-        if build_env['FULL_SYSTEM']:
+        if buildEnv['FULL_SYSTEM']:
             _localApic = X86LocalApic(pio_addr=0x2000000000000000)
             interrupts = \
                 Param.X86LocalApic(_localApic, "Interrupt Controller")
-    elif build_env['TARGET_ISA'] == 'mips':
+    elif buildEnv['TARGET_ISA'] == 'mips':
         dtb = Param.MipsTLB(MipsTLB(), "Data TLB")
         itb = Param.MipsTLB(MipsTLB(), "Instruction TLB")
-        if build_env['FULL_SYSTEM']:
+        if buildEnv['FULL_SYSTEM']:
             interrupts = Param.MipsInterrupts(
                     MipsInterrupts(), "Interrupt Controller")
-    elif build_env['TARGET_ISA'] == 'arm':
+    elif buildEnv['TARGET_ISA'] == 'arm':
         UnifiedTLB = Param.Bool(True, "Is this a Unified TLB?")
         dtb = Param.ArmTLB(ArmTLB(), "Data TLB")
         itb = Param.ArmTLB(ArmTLB(), "Instruction TLB")
-        if build_env['FULL_SYSTEM']:
+        if buildEnv['FULL_SYSTEM']:
             interrupts = Param.ArmInterrupts(
                     ArmInterrupts(), "Interrupt Controller")
     else:
         print "Don't know what TLB to use for ISA %s" % \
-            build_env['TARGET_ISA']
+            buildEnv['TARGET_ISA']
         sys.exit(1)
 
     max_insts_all_threads = Param.Counter(0,
@@ -139,7 +141,7 @@ class BaseCPU(MemObject):
     tracer = Param.InstTracer(default_tracer, "Instruction tracer")
 
     _mem_ports = []
-    if build_env['TARGET_ISA'] == 'x86' and build_env['FULL_SYSTEM']:
+    if buildEnv['TARGET_ISA'] == 'x86' and buildEnv['FULL_SYSTEM']:
         _mem_ports = ["itb.walker.port",
                       "dtb.walker.port",
                       "interrupts.pio",
@@ -157,7 +159,7 @@ class BaseCPU(MemObject):
         self.icache_port = ic.cpu_side
         self.dcache_port = dc.cpu_side
         self._mem_ports = ['icache.mem_side', 'dcache.mem_side']
-        if build_env['TARGET_ISA'] == 'x86' and build_env['FULL_SYSTEM']:
+        if buildEnv['TARGET_ISA'] == 'x86' and buildEnv['FULL_SYSTEM']:
             self._mem_ports += ["itb.walker_port", "dtb.walker_port"]
 
     def addTwoLevelCacheHierarchy(self, ic, dc, l2c):
@@ -168,7 +170,7 @@ class BaseCPU(MemObject):
         self.l2cache.cpu_side = self.toL2Bus.port
         self._mem_ports = ['l2cache.mem_side']
 
-    if build_env['TARGET_ISA'] == 'mips':
+    if buildEnv['TARGET_ISA'] == 'mips':
         CP0_IntCtl_IPTI = Param.Unsigned(0,"No Description")
         CP0_IntCtl_IPPCI = Param.Unsigned(0,"No Description")
         CP0_SrsCtl_HSS = Param.Unsigned(0,"No Description")
diff --git a/src/cpu/CheckerCPU.py b/src/cpu/CheckerCPU.py
index bff9af62d..132254413 100644
--- a/src/cpu/CheckerCPU.py
+++ b/src/cpu/CheckerCPU.py
@@ -27,7 +27,6 @@
 # Authors: Nathan Binkert
 
 from m5.params import *
-from m5 import build_env
 from BaseCPU import BaseCPU
 
 class CheckerCPU(BaseCPU):
diff --git a/src/cpu/inorder/InOrderCPU.py b/src/cpu/inorder/InOrderCPU.py
index 9faadc68c..a0b0466a7 100644
--- a/src/cpu/inorder/InOrderCPU.py
+++ b/src/cpu/inorder/InOrderCPU.py
@@ -28,7 +28,6 @@
 
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
 from BaseCPU import BaseCPU
 
 class InOrderCPU(BaseCPU):
diff --git a/src/cpu/memtest/MemTest.py b/src/cpu/memtest/MemTest.py
index 629fd4877..8e1b3a8d0 100644
--- a/src/cpu/memtest/MemTest.py
+++ b/src/cpu/memtest/MemTest.py
@@ -29,7 +29,6 @@
 from MemObject import MemObject
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
 
 class MemTest(MemObject):
     type = 'MemTest'
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index 56e537ad2..3f2210e44 100644
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -26,21 +26,21 @@
 #
 # Authors: Kevin Lim
 
+from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
 from BaseCPU import BaseCPU
 from FUPool import *
 
-if build_env['USE_CHECKER']:
+if buildEnv['USE_CHECKER']:
     from O3Checker import O3Checker
 
 class DerivO3CPU(BaseCPU):
     type = 'DerivO3CPU'
     activity = Param.Unsigned(0, "Initial count")
 
-    if build_env['USE_CHECKER']:
-        if not build_env['FULL_SYSTEM']:
+    if buildEnv['USE_CHECKER']:
+        if not buildEnv['FULL_SYSTEM']:
             checker = Param.BaseCPU(O3Checker(workload=Parent.workload,
                                               exitOnError=False,
                                               updateOnError=True,
diff --git a/src/cpu/o3/O3Checker.py b/src/cpu/o3/O3Checker.py
index edc6dc9b6..d0c4ce537 100644
--- a/src/cpu/o3/O3Checker.py
+++ b/src/cpu/o3/O3Checker.py
@@ -27,7 +27,6 @@
 # Authors: Nathan Binkert
 
 from m5.params import *
-from m5 import build_env
 from BaseCPU import BaseCPU
 
 class O3Checker(BaseCPU):
diff --git a/src/cpu/ozone/OzoneCPU.py b/src/cpu/ozone/OzoneCPU.py
index 37386898d..2c7b8475f 100644
--- a/src/cpu/ozone/OzoneCPU.py
+++ b/src/cpu/ozone/OzoneCPU.py
@@ -26,11 +26,11 @@
 #
 # Authors: Kevin Lim
 
+from m5.defines import buildEnv
 from m5.params import *
-from m5 import build_env
 from BaseCPU import BaseCPU
 
-if build_env['USE_CHECKER']:
+if buildEnv['USE_CHECKER']:
     from OzoneChecker import OzoneChecker
 
 class DerivOzoneCPU(BaseCPU):
@@ -38,7 +38,7 @@ class DerivOzoneCPU(BaseCPU):
 
     numThreads = Param.Unsigned("number of HW thread contexts")
 
-    if build_env['USE_CHECKER']:
+    if buildEnv['USE_CHECKER']:
         checker = Param.BaseCPU("Checker CPU")
 
     icache_port = Port("Instruction Port")
diff --git a/src/cpu/ozone/OzoneChecker.py b/src/cpu/ozone/OzoneChecker.py
index bfa39ead9..bbe46db18 100644
--- a/src/cpu/ozone/OzoneChecker.py
+++ b/src/cpu/ozone/OzoneChecker.py
@@ -27,7 +27,6 @@
 # Authors: Nathan Binkert
 
 from m5.params import *
-from m5 import build_env
 from BaseCPU import BaseCPU
 
 class OzoneChecker(BaseCPU):
diff --git a/src/cpu/ozone/SimpleOzoneCPU.py b/src/cpu/ozone/SimpleOzoneCPU.py
index 93603092b..d4620cd8e 100644
--- a/src/cpu/ozone/SimpleOzoneCPU.py
+++ b/src/cpu/ozone/SimpleOzoneCPU.py
@@ -26,8 +26,8 @@
 #
 # Authors: Kevin Lim
 
+from m5.defines import buildEnv
 from m5.params import *
-from m5 import build_env
 from BaseCPU import BaseCPU
 
 class SimpleOzoneCPU(BaseCPU):
@@ -35,7 +35,7 @@ class SimpleOzoneCPU(BaseCPU):
 
     numThreads = Param.Unsigned("number of HW thread contexts")
 
-    if not build_env['FULL_SYSTEM']:
+    if not buildEnv['FULL_SYSTEM']:
         mem = Param.FunctionalMemory(NULL, "memory")
 
     width = Param.Unsigned("Width")
diff --git a/src/cpu/simple/AtomicSimpleCPU.py b/src/cpu/simple/AtomicSimpleCPU.py
index b7174bb43..3d72f4098 100644
--- a/src/cpu/simple/AtomicSimpleCPU.py
+++ b/src/cpu/simple/AtomicSimpleCPU.py
@@ -27,7 +27,6 @@
 # Authors: Nathan Binkert
 
 from m5.params import *
-from m5 import build_env
 from BaseSimpleCPU import BaseSimpleCPU
 
 class AtomicSimpleCPU(BaseSimpleCPU):
diff --git a/src/cpu/simple/TimingSimpleCPU.py b/src/cpu/simple/TimingSimpleCPU.py
index ce6839241..6b83c41aa 100644
--- a/src/cpu/simple/TimingSimpleCPU.py
+++ b/src/cpu/simple/TimingSimpleCPU.py
@@ -27,7 +27,6 @@
 # Authors: Nathan Binkert
 
 from m5.params import *
-from m5 import build_env
 from BaseSimpleCPU import BaseSimpleCPU
 
 class TimingSimpleCPU(BaseSimpleCPU):
diff --git a/src/dev/Uart.py b/src/dev/Uart.py
index 5135a064d..9254dc695 100644
--- a/src/dev/Uart.py
+++ b/src/dev/Uart.py
@@ -28,7 +28,6 @@
 
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
 from Device import BasicPioDevice
 
 class Uart(BasicPioDevice):
diff --git a/src/mem/Bus.py b/src/mem/Bus.py
index 0f113cc09..b3f6b2946 100644
--- a/src/mem/Bus.py
+++ b/src/mem/Bus.py
@@ -26,12 +26,12 @@
 #
 # Authors: Nathan Binkert
 
-from m5 import build_env
+from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
 from MemObject import MemObject
 
-if build_env['FULL_SYSTEM']:
+if buildEnv['FULL_SYSTEM']:
     from Device import BadAddr
 
 class Bus(MemObject):
diff --git a/src/python/SConscript b/src/python/SConscript
index bb892f376..935986a12 100644
--- a/src/python/SConscript
+++ b/src/python/SConscript
@@ -38,7 +38,6 @@ PySource('', 'importer.py')
 PySource('m5', 'm5/__init__.py')
 PySource('m5', 'm5/SimObject.py')
 PySource('m5', 'm5/config.py')
-PySource('m5', 'm5/convert.py')
 PySource('m5', 'm5/core.py')
 PySource('m5', 'm5/debug.py')
 PySource('m5', 'm5/event.py')
@@ -47,18 +46,18 @@ PySource('m5', 'm5/options.py')
 PySource('m5', 'm5/params.py')
 PySource('m5', 'm5/proxy.py')
 PySource('m5', 'm5/simulate.py')
-PySource('m5', 'm5/smartdict.py')
 PySource('m5', 'm5/stats.py')
 PySource('m5', 'm5/ticks.py')
 PySource('m5', 'm5/trace.py')
 PySource('m5.util', 'm5/util/__init__.py')
 PySource('m5.util', 'm5/util/attrdict.py')
 PySource('m5.util', 'm5/util/code_formatter.py')
+PySource('m5.util', 'm5/util/convert.py')
 PySource('m5.util', 'm5/util/grammar.py')
 PySource('m5.util', 'm5/util/jobfile.py')
-PySource('m5.util', 'm5/util/misc.py')
 PySource('m5.util', 'm5/util/multidict.py')
 PySource('m5.util', 'm5/util/orderdict.py')
+PySource('m5.util', 'm5/util/smartdict.py')
 
 SwigSource('m5.internal', 'swig/core.i')
 SwigSource('m5.internal', 'swig/debug.i')
diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 8ef22be4e..0e0ffaea9 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -31,47 +31,24 @@ import math
 import sys
 import types
 
-import proxy
-import m5
-from util import *
-
-# These utility functions have to come first because they're
-# referenced in params.py... otherwise they won't be defined when we
-# import params below, and the recursive import of this file from
-# params.py will not find these names.
-def isSimObject(value):
-    return isinstance(value, SimObject)
-
-def isSimObjectClass(value):
-    return issubclass(value, SimObject)
-
-def isSimObjectSequence(value):
-    if not isinstance(value, (list, tuple)) or len(value) == 0:
-        return False
-
-    for val in value:
-        if not isNullPointer(val) and not isSimObject(val):
-            return False
-
-    return True
+try:
+    import pydot
+except:
+    pydot = False
 
-def isSimObjectOrSequence(value):
-    return isSimObject(value) or isSimObjectSequence(value)
+import m5
+from m5.util import *
 
 # Have to import params up top since Param is referenced on initial
 # load (when SimObject class references Param to create a class
 # variable, the 'name' param)...
-from params import *
+from m5.params import *
 # There are a few things we need that aren't in params.__all__ since
 # normal users don't need them
-from params import ParamDesc, VectorParamDesc, isNullPointer, SimObjVector
-from proxy import *
+from m5.params import ParamDesc, VectorParamDesc, isNullPointer, SimObjVector
 
-noDot = False
-try:
-    import pydot
-except:
-    noDot = True
+from m5.proxy import *
+from m5.proxy import isproxy
 
 #####################################################################
 #
@@ -141,7 +118,7 @@ class MetaSimObject(type):
     # and only allow "private" attributes to be passed to the base
     # __new__ (starting with underscore).
     def __new__(mcls, name, bases, dict):
-        assert name not in allClasses
+        assert name not in allClasses, "SimObject %s already present" % name
 
         # Copy "private" attributes, functions, and classes to the
         # official dict.  Everything else goes in _init_dict to be
@@ -678,7 +655,7 @@ class SimObject(object):
     def unproxy_all(self):
         for param in self._params.iterkeys():
             value = self._values.get(param)
-            if value != None and proxy.isproxy(value):
+            if value != None and isproxy(value):
                 try:
                     value = value.unproxy(self)
                 except:
@@ -749,8 +726,8 @@ class SimObject(object):
         for param in param_names:
             value = self._values.get(param)
             if value is None:
-                m5.fatal("%s.%s without default or user set value",
-                        self.path(), param)
+                fatal("%s.%s without default or user set value",
+                      self.path(), param)
 
             value = value.getValue()
             if isinstance(self._params[param], VectorParamDesc):
@@ -886,6 +863,34 @@ def resolveSimObject(name):
     obj = instanceDict[name]
     return obj.getCCObject()
 
+def isSimObject(value):
+    return isinstance(value, SimObject)
+
+def isSimObjectClass(value):
+    return issubclass(value, SimObject)
+
+def isSimObjectSequence(value):
+    if not isinstance(value, (list, tuple)) or len(value) == 0:
+        return False
+
+    for val in value:
+        if not isNullPointer(val) and not isSimObject(val):
+            return False
+
+    return True
+
+def isSimObjectOrSequence(value):
+    return isSimObject(value) or isSimObjectSequence(value)
+
+baseClasses = allClasses.copy()
+baseInstances = instanceDict.copy()
+
+def clear():
+    global allClasses, instanceDict
+
+    allClasses = baseClasses.copy()
+    instanceDict = baseInstances.copy()
+
 # __all__ defines the list of symbols that get exported when
 # 'from config import *' is invoked.  Try to keep this reasonably
 # short to avoid polluting other namespaces.
diff --git a/src/python/m5/__init__.py b/src/python/m5/__init__.py
index c3512cd0d..9f9459ae8 100644
--- a/src/python/m5/__init__.py
+++ b/src/python/m5/__init__.py
@@ -25,106 +25,24 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 # Authors: Nathan Binkert
-#          Steve Reinhardt
 
-import os
-import sys
+# Import useful subpackages of M5, but *only* when run as an m5
+# script.  This is mostly to keep backward compatibility with existing
+# scripts while allowing new SCons code to operate properly.
 
-import smartdict
-
-# define a MaxTick parameter
-MaxTick = 2**63 - 1
-
-# define this here so we can use it right away if necessary
-
-def errorURL(prefix, s):
-    try:
-        import zlib
-        hashstr = "%x" % zlib.crc32(s)
-    except:
-        hashstr = "UnableToHash"
-    return "For more information see: http://www.m5sim.org/%s/%s" % \
-            (prefix, hashstr)
-
-
-# panic() should be called when something happens that should never
-# ever happen regardless of what the user does (i.e., an acutal m5
-# bug).
-def panic(fmt, *args):
-    print >>sys.stderr, 'panic:', fmt % args
-    print >>sys.stderr, errorURL('panic',fmt)
-    sys.exit(1)
-
-# fatal() should be called when the simulation cannot continue due to
-# some condition that is the user's fault (bad configuration, invalid
-# arguments, etc.) and not a simulator bug.
-def fatal(fmt, *args):
-    print >>sys.stderr, 'fatal:', fmt % args
-    print >>sys.stderr, errorURL('fatal',fmt)
-    sys.exit(1)
-
-# force scalars to one-element lists for uniformity
-def makeList(objOrList):
-    if isinstance(objOrList, list):
-        return objOrList
-    return [objOrList]
-
-# Prepend given directory to system module search path.  We may not
-# need this anymore if we can structure our config library more like a
-# Python package.
-def AddToPath(path):
-    # if it's a relative path and we know what directory the current
-    # python script is in, make the path relative to that directory.
-    if not os.path.isabs(path) and sys.path[0]:
-        path = os.path.join(sys.path[0], path)
-    path = os.path.realpath(path)
-    # sys.path[0] should always refer to the current script's directory,
-    # so place the new dir right after that.
-    sys.path.insert(1, path)
-
-# make a SmartDict out of the build options for our local use
-build_env = smartdict.SmartDict()
-
-# make a SmartDict out of the OS environment too
-env = smartdict.SmartDict()
-env.update(os.environ)
-
-# Since we have so many mutual imports in this package, we should:
-# 1. Put all intra-package imports at the *bottom* of the file, unless
-#    they're absolutely needed before that (for top-level statements
-#    or class attributes).  Imports of "trivial" packages that don't
-#    import other packages (e.g., 'smartdict') can be at the top.
-# 2. Never use 'from foo import *' on an intra-package import since
-#    you can get the wrong result if foo is only partially imported
-#    at the point you do that (i.e., because foo is in the middle of
-#    importing *you*).
 try:
     import internal
 except ImportError:
     internal = None
 
-try:
-    import defines
-    build_env.update(defines.buildEnv)
-except ImportError:
-    defines = None
-
 if internal:
-    defines.compileDate = internal.core.compileDate
-    for k,v in internal.core.__dict__.iteritems():
-        if k.startswith('flag_'):
-            setattr(defines, k[5:], v)
+    import SimObject
+    import core
+    import objects
+    import params
+    import stats
+    import util
 
     from event import *
-    from simulate import *
     from main import options, main
-    import stats
-    import core
-
-import SimObject
-import params
-
-try:
-    import objects
-except ImportError:
-    objects = None
+    from simulate import *
diff --git a/src/python/m5/environment.py b/src/python/m5/environment.py
deleted file mode 100644
index bea0bc1d0..000000000
--- a/src/python/m5/environment.py
+++ /dev/null
@@ -1,43 +0,0 @@
-# Copyright (c) 2005 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Nathan Binkert
-#          Steve Reinhardt
-
-import os
-
-# import the m5 compile options
-import defines
-
-# make a SmartDict out of the build options for our local use
-import smartdict
-build_env = smartdict.SmartDict()
-build_env.update(defines.m5_build_env)
-
-# make a SmartDict out of the OS environment too
-env = smartdict.SmartDict()
-env.update(os.environ)
-
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index 2a308ff09..29f8cc976 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -32,7 +32,7 @@ import os
 import socket
 import sys
 
-from util import attrdict
+from util import attrdict, fatal
 import config
 from options import OptionParser
 
diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index edd78fa28..3a3a30014 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -50,13 +50,10 @@ import re
 import sys
 import time
 
-import convert
 import proxy
 import ticks
 from util import *
 
-import SimObject
-
 def isSimObject(*args, **kwargs):
     return SimObject.isSimObject(*args, **kwargs)
 
@@ -711,32 +708,31 @@ class MetaEnum(MetaParamValue):
 
         super(MetaEnum, cls).__init__(name, bases, init_dict)
 
-    def __str__(cls):
-        return cls.__name__
-
     # Generate C++ class declaration for this enum type.
     # Note that we wrap the enum in a class/struct to act as a namespace,
     # so that the enum strings can be brief w/o worrying about collisions.
     def cxx_decl(cls):
-        code = "#ifndef __ENUM__%s\n" % cls
-        code += '#define __ENUM__%s\n' % cls
+        name = cls.__name__
+        code = "#ifndef __ENUM__%s\n" % name
+        code += '#define __ENUM__%s\n' % name
         code += '\n'
         code += 'namespace Enums {\n'
-        code += '    enum %s {\n' % cls
+        code += '    enum %s {\n' % name
         for val in cls.vals:
             code += '        %s = %d,\n' % (val, cls.map[val])
-        code += '        Num_%s = %d,\n' % (cls, len(cls.vals))
+        code += '        Num_%s = %d,\n' % (name, len(cls.vals))
         code += '    };\n'
-        code += '    extern const char *%sStrings[Num_%s];\n' % (cls, cls)
+        code += '    extern const char *%sStrings[Num_%s];\n' % (name, name)
         code += '}\n'
         code += '\n'
         code += '#endif\n'
         return code
 
     def cxx_def(cls):
-        code = '#include "enums/%s.hh"\n' % cls
+        name = cls.__name__
+        code = '#include "enums/%s.hh"\n' % name
         code += 'namespace Enums {\n'
-        code += '    const char *%sStrings[Num_%s] =\n' % (cls, cls)
+        code += '    const char *%sStrings[Num_%s] =\n' % (name, name)
         code += '    {\n'
         for val in cls.vals:
             code += '        "%s",\n' % val
@@ -1170,6 +1166,15 @@ class PortParamDesc(object):
     ptype_str = 'Port'
     ptype = Port
 
+baseEnums = allEnums.copy()
+baseParams = allParams.copy()
+
+def clear():
+    global allEnums, allParams
+
+    allEnums = baseEnums.copy()
+    allParams = baseParams.copy()
+
 __all__ = ['Param', 'VectorParam',
            'Enum', 'Bool', 'String', 'Float',
            'Int', 'Unsigned', 'Int8', 'UInt8', 'Int16', 'UInt16',
@@ -1184,3 +1189,5 @@ __all__ = ['Param', 'VectorParam',
            'Time',
            'NextEthernetAddr', 'NULL',
            'Port', 'VectorPort']
+
+import SimObject
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py
index 45992fe85..092bd0339 100644
--- a/src/python/m5/simulate.py
+++ b/src/python/m5/simulate.py
@@ -40,6 +40,9 @@ import SimObject
 import ticks
 import objects
 
+# define a MaxTick parameter
+MaxTick = 2**63 - 1
+
 # The final hook to generate .ini files.  Called from the user script
 # once the config is built.
 def instantiate(root):
diff --git a/src/python/m5/ticks.py b/src/python/m5/ticks.py
index 91834c9c8..181a65eba 100644
--- a/src/python/m5/ticks.py
+++ b/src/python/m5/ticks.py
@@ -41,7 +41,7 @@ def fixGlobalFrequency():
         print "Global frequency set at %d ticks per second" % int(tps)
 
 def setGlobalFrequency(ticksPerSecond):
-    import convert
+    from m5.util import convert
 
     global tps, tps_fixed
 
diff --git a/src/python/m5/trace.py b/src/python/m5/trace.py
index 17aa6196c..db239040a 100644
--- a/src/python/m5/trace.py
+++ b/src/python/m5/trace.py
@@ -48,5 +48,5 @@ def help():
         if flag == 'All':
             continue
         print "    %s: %s" % (flag, flags.descriptions[flag])
-        util.print_list(flags.compoundMap[flag], indent=8)
+        util.printList(flags.compoundMap[flag], indent=8)
         print
diff --git a/src/python/m5/util/__init__.py b/src/python/m5/util/__init__.py
index 3930c8b6f..7a674dd2d 100644
--- a/src/python/m5/util/__init__.py
+++ b/src/python/m5/util/__init__.py
@@ -1,4 +1,5 @@
-# Copyright (c) 2008 The Hewlett-Packard Development Company
+# Copyright (c) 2008-2009 The Hewlett-Packard Development Company
+# Copyright (c) 2004-2006 The Regents of The University of Michigan
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -26,14 +27,130 @@
 #
 # Authors: Nathan Binkert
 
+import os
+import re
+import sys
+
+import convert
+import jobfile
+
 from attrdict import attrdict, optiondict
 from code_formatter import code_formatter
-from misc import *
 from multidict import multidict
 from orderdict import orderdict
-import jobfile
+from smartdict import SmartDict
+
+# define this here so we can use it right away if necessary
+def errorURL(prefix, s):
+    try:
+        import zlib
+        hashstr = "%x" % zlib.crc32(s)
+    except:
+        hashstr = "UnableToHash"
+    return "For more information see: http://www.m5sim.org/%s/%s" % \
+            (prefix, hashstr)
+
+# panic() should be called when something happens that should never
+# ever happen regardless of what the user does (i.e., an acutal m5
+# bug).
+def panic(fmt, *args):
+    print >>sys.stderr, 'panic:', fmt % args
+    print >>sys.stderr, errorURL('panic',fmt)
+    sys.exit(1)
+
+# fatal() should be called when the simulation cannot continue due to
+# some condition that is the user's fault (bad configuration, invalid
+# arguments, etc.) and not a simulator bug.
+def fatal(fmt, *args):
+    print >>sys.stderr, 'fatal:', fmt % args
+    print >>sys.stderr, errorURL('fatal',fmt)
+    sys.exit(1)
+
+class Singleton(type):
+    def __call__(cls, *args, **kwargs):
+        if hasattr(cls, '_instance'):
+            return cls._instance
+
+        cls._instance = super(Singleton, cls).__call__(*args, **kwargs)
+        return cls._instance
+
+def addToPath(path):
+    """Prepend given directory to system module search path.  We may not
+    need this anymore if we can structure our config library more like a
+    Python package."""
+
+    # if it's a relative path and we know what directory the current
+    # python script is in, make the path relative to that directory.
+    if not os.path.isabs(path) and sys.path[0]:
+        path = os.path.join(sys.path[0], path)
+    path = os.path.realpath(path)
+    # sys.path[0] should always refer to the current script's directory,
+    # so place the new dir right after that.
+    sys.path.insert(1, path)
+
+# Apply method to object.
+# applyMethod(obj, 'meth', <args>) is equivalent to obj.meth(<args>)
+def applyMethod(obj, meth, *args, **kwargs):
+    return getattr(obj, meth)(*args, **kwargs)
 
-def print_list(items, indent=4):
+# If the first argument is an (non-sequence) object, apply the named
+# method with the given arguments.  If the first argument is a
+# sequence, apply the method to each element of the sequence (a la
+# 'map').
+def applyOrMap(objOrSeq, meth, *args, **kwargs):
+    if not isinstance(objOrSeq, (list, tuple)):
+        return applyMethod(objOrSeq, meth, *args, **kwargs)
+    else:
+        return [applyMethod(o, meth, *args, **kwargs) for o in objOrSeq]
+
+def compareVersions(v1, v2):
+    """helper function: compare arrays or strings of version numbers.
+    E.g., compare_version((1,3,25), (1,4,1)')
+    returns -1, 0, 1 if v1 is <, ==, > v2
+    """
+    def make_version_list(v):
+        if isinstance(v, (list,tuple)):
+            return v
+        elif isinstance(v, str):
+            return map(lambda x: int(re.match('\d+', x).group()), v.split('.'))
+        else:
+            raise TypeError
+
+    v1 = make_version_list(v1)
+    v2 = make_version_list(v2)
+    # Compare corresponding elements of lists
+    for n1,n2 in zip(v1, v2):
+        if n1 < n2: return -1
+        if n1 > n2: return  1
+    # all corresponding values are equal... see if one has extra values
+    if len(v1) < len(v2): return -1
+    if len(v1) > len(v2): return  1
+    return 0
+
+def crossproduct(items):
+    if len(items) == 1:
+        for i in items[0]:
+            yield (i,)
+    else:
+        for i in items[0]:
+            for j in crossproduct(items[1:]):
+                yield (i,) + j
+
+def flatten(items):
+    while items:
+        item = items.pop(0)
+        if isinstance(item, (list, tuple)):
+            items[0:0] = item
+        else:
+            yield item
+
+# force scalars to one-element lists for uniformity
+def makeList(objOrList):
+    if isinstance(objOrList, list):
+        return objOrList
+    return [objOrList]
+
+def printList(items, indent=4):
     line = ' ' * indent
     for i,item in enumerate(items):
         if len(line) + len(item) > 76:
@@ -45,3 +162,27 @@ def print_list(items, indent=4):
         else:
             line += item
             print line
+
+def readCommand(cmd, **kwargs):
+    """run the command cmd, read the results and return them
+    this is sorta like `cmd` in shell"""
+    from subprocess import Popen, PIPE, STDOUT
+
+    if isinstance(cmd, str):
+        cmd = cmd.split()
+
+    no_exception = 'exception' in kwargs
+    exception = kwargs.pop('exception', None)
+    
+    kwargs.setdefault('shell', False)
+    kwargs.setdefault('stdout', PIPE)
+    kwargs.setdefault('stderr', STDOUT)
+    kwargs.setdefault('close_fds', True)
+    try:
+        subp = Popen(cmd, **kwargs)
+    except Exception, e:
+        if no_exception:
+            return exception
+        raise
+
+    return subp.communicate()[0]
diff --git a/src/python/m5/convert.py b/src/python/m5/util/convert.py
index bb9e3e1f1..bb9e3e1f1 100644
--- a/src/python/m5/convert.py
+++ b/src/python/m5/util/convert.py
diff --git a/src/python/m5/util/jobfile.py b/src/python/m5/util/jobfile.py
index c830895f6..9c59778e5 100644
--- a/src/python/m5/util/jobfile.py
+++ b/src/python/m5/util/jobfile.py
@@ -28,9 +28,6 @@
 
 import sys
 
-from attrdict import optiondict
-from misc import crossproduct
-
 class Data(object):
     def __init__(self, name, desc, **kwargs):
         self.name = name
@@ -108,7 +105,8 @@ class Data(object):
                 yield key
 
     def optiondict(self):
-        result = optiondict()
+        import m5.util
+        result = m5.util.optiondict()
         for key in self:
             result[key] = self[key]
         return result
@@ -328,7 +326,9 @@ class Configuration(Data):
             optgroups = [ g.subopts() for g in groups ]
         if not optgroups:
             return
-        for options in crossproduct(optgroups):
+
+        import m5.util
+        for options in m5.util.crossproduct(optgroups):
             for opt in options:
                 cpt = opt._group._checkpoint
                 if not isinstance(cpt, bool) and cpt != opt:
diff --git a/src/python/m5/util/misc.py b/src/python/m5/util/misc.py
deleted file mode 100644
index 094e3ed9a..000000000
--- a/src/python/m5/util/misc.py
+++ /dev/null
@@ -1,87 +0,0 @@
-# Copyright (c) 2004-2006 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Steve Reinhardt
-#          Nathan Binkert
-
-#############################
-#
-# Utility classes & methods
-#
-#############################
-
-class Singleton(type):
-    def __call__(cls, *args, **kwargs):
-        if hasattr(cls, '_instance'):
-            return cls._instance
-
-        cls._instance = super(Singleton, cls).__call__(*args, **kwargs)
-        return cls._instance
-
-# Apply method to object.
-# applyMethod(obj, 'meth', <args>) is equivalent to obj.meth(<args>)
-def applyMethod(obj, meth, *args, **kwargs):
-    return getattr(obj, meth)(*args, **kwargs)
-
-# If the first argument is an (non-sequence) object, apply the named
-# method with the given arguments.  If the first argument is a
-# sequence, apply the method to each element of the sequence (a la
-# 'map').
-def applyOrMap(objOrSeq, meth, *args, **kwargs):
-    if not isinstance(objOrSeq, (list, tuple)):
-        return applyMethod(objOrSeq, meth, *args, **kwargs)
-    else:
-        return [applyMethod(o, meth, *args, **kwargs) for o in objOrSeq]
-
-def crossproduct(items):
-    if not isinstance(items, (list, tuple)):
-        raise AttributeError, 'crossproduct works only on sequences'
-
-    if not items:
-        yield None
-        return
-
-    current = items[0]
-    remainder = items[1:]
-
-    if not hasattr(current, '__iter__'):
-        current = [ current ]
-
-    for item in current:
-        for rem in crossproduct(remainder):
-            data = [ item ]
-            if rem:
-                data += rem
-            yield data
-
-def flatten(items):
-    if not isinstance(items, (list, tuple)):
-        yield items
-        return
-
-    for item in items:
-        for flat in flatten(item):
-            yield flat
diff --git a/src/python/m5/smartdict.py b/src/python/m5/util/smartdict.py
index d85dbd517..d85dbd517 100644
--- a/src/python/m5/smartdict.py
+++ b/src/python/m5/util/smartdict.py
diff --git a/src/sim/System.py b/src/sim/System.py
index 3b0bc1e46..06a54a78d 100644
--- a/src/sim/System.py
+++ b/src/sim/System.py
@@ -27,9 +27,10 @@
 # Authors: Nathan Binkert
 
 from m5.SimObject import SimObject
+from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
-from m5 import build_env
+
 from PhysicalMemory import *
 
 class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing']
@@ -40,7 +41,7 @@ class System(SimObject):
 
     physmem = Param.PhysicalMemory(Parent.any, "physical memory")
     mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in")
-    if build_env['FULL_SYSTEM']:
+    if buildEnv['FULL_SYSTEM']:
         abstract = True
         boot_cpu_frequency = Param.Frequency(Self.cpu[0].clock.frequency,
                                              "boot processor frequency")