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authorGabe Black <gblack@eecs.umich.edu>2011-09-18 23:26:39 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-09-18 23:26:39 -0700
commit9eda6b1d88a4bdd466964065dd6009bdcedfcb92 (patch)
tree6c237901f90bf90a95c1b070d25d7ccfbf2e9d67 /src
parentae62d97158c0908fca576a8c474ef8810e1d0420 (diff)
downloadgem5-9eda6b1d88a4bdd466964065dd6009bdcedfcb92.tar.xz
Pseudoinst: Add an initParam pseudo inst function.
Diffstat (limited to 'src')
-rw-r--r--src/arch/alpha/isa/decoder.isa2
-rw-r--r--src/arch/arm/isa/insts/m5ops.isa2
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa3
-rw-r--r--src/sim/pseudo_inst.cc6
-rw-r--r--src/sim/pseudo_inst.hh1
5 files changed, 10 insertions, 4 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index f0aa5a3fd..359c6b3b2 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -985,7 +985,7 @@ decode OPCODE default Unknown::unknown() {
PseudoInst::loadsymbol(xc->tcBase());
}}, No_OpClass, IsNonSpeculative);
0x30: initparam({{
- Ra = xc->tcBase()->getCpuPtr()->system->init_param;
+ Ra = PseudoInst::initParam(xc->tcBase());
}});
#endif
0x40: resetstats({{
diff --git a/src/arch/arm/isa/insts/m5ops.isa b/src/arch/arm/isa/insts/m5ops.isa
index 9bd1f4f01..e891a0a91 100644
--- a/src/arch/arm/isa/insts/m5ops.isa
+++ b/src/arch/arm/isa/insts/m5ops.isa
@@ -203,7 +203,7 @@ let {{
initparamCode = '''
#if FULL_SYSTEM
- Rt = xc->tcBase()->getCpuPtr()->system->init_param;
+ Rt = PseudoInst::initParam(xc->tcBase());
#endif
'''
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index 11cd6eeb1..f856f2d37 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -161,8 +161,7 @@
}}, IsNonSpeculative);
#if FULL_SYSTEM
0x30: m5initparam({{
- Rax = xc->tcBase()->getCpuPtr()->
- system->init_param;
+ Rax = PseudoInst::initParam(xc->tcBase());
}}, IsNonSpeculative);
0x31: m5loadsymbol({{
PseudoInst::loadsymbol(xc->tcBase());
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index eba7273c3..226495847 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -260,6 +260,12 @@ addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
debugSymbolTable->insert(addr,symbol);
}
+uint64_t
+initParam(ThreadContext *tc)
+{
+ return tc->getCpuPtr()->system->init_param;
+}
+
#endif
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index 25ecbc029..95ef0d187 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -56,6 +56,7 @@ uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
uint64_t offset);
void loadsymbol(ThreadContext *xc);
void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
+uint64_t initParam(ThreadContext *xc);
#endif
uint64_t rpns(ThreadContext *tc);