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authorGabe Black <gabeblack@google.com>2015-01-06 22:13:56 -0800
committerGabe Black <gabeblack@google.com>2015-01-06 22:13:56 -0800
commitcb181d6f916c85690f21b3e01f321614f00e8f4d (patch)
treef3a9645b0bc8a35e364c06c22e06a4f74662849b /src
parente979e8d75e12caee2b4b1ab3512d7f2fdba4fcdb (diff)
downloadgem5-cb181d6f916c85690f21b3e01f321614f00e8f4d.tar.xz
cpuid, x86: Revert "Enabling more features in CPUid"
That change enables CPUID bits for features that aren't implemented in gem5. If a simulated system tries to use those features because it was told it could, bad things can happen.
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/cpuid.cc18
1 files changed, 2 insertions, 16 deletions
diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc
index de11195e0..f3f9a82d7 100644
--- a/src/arch/x86/cpuid.cc
+++ b/src/arch/x86/cpuid.cc
@@ -96,15 +96,8 @@ namespace X86ISA {
stringToRegister(vendorString + 8));
break;
case FamilyModelSteppingBrandFeatures:
- /** Features Enabling
- * rdx, enabling most of the features except:
- * FXSR, FFXSR, Page1GB in EDX
- *
- * rcx, disabling most of the features except:
- * SSE4A, XOP, FMA4 in ECX
- */
result = CpuidResult(0x00020f51, 0x00000405,
- 0xe3d3fbff, 0x00010840);
+ 0xe3d3fbff, 0x00000001);
break;
case NameString1:
case NameString2:
@@ -160,15 +153,8 @@ namespace X86ISA {
stringToRegister(vendorString + 8));
break;
case FamilyModelStepping:
- /** Features Enabling
- * rdx, enabling most of the features except:
- * HTT in EDX
- *
- * rcx, disabling most of the features except:
- * SSE3, SSSE3, FMA, SSE41, XSAVE, AVX in ECX
- */
result = CpuidResult(0x00020f51, 0x00000805,
- 0xe7dbfbff, 0x14081201);
+ 0xe7dbfbff, 0x00000001);
break;
default:
warn("x86 cpuid: unimplemented function %u", funcNum);