diff options
| author | Gabe Black <gabeblack@google.com> | 2019-10-28 19:02:24 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-10-30 00:23:36 +0000 |
| commit | e7ab65eab205e4f43612300a24278035120cc195 (patch) | |
| tree | 6a0fcd8d0f8dae049cc234693046f5703bca22b7 /src | |
| parent | a8f6e6ceec37d96a1a5cc58e1304d3d1c11bc144 (diff) | |
| download | gem5-e7ab65eab205e4f43612300a24278035120cc195.tar.xz | |
x86: Remove TheISA from x86 devices.
This was really only in the PC platform class.
Change-Id: I5365d965ea335a7c45be9f80706a875b19ed0417
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22263
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/dev/x86/pc.cc | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc index 6746b5026..e37c95e57 100644 --- a/src/dev/x86/pc.cc +++ b/src/dev/x86/pc.cc @@ -40,7 +40,6 @@ #include "arch/x86/intmessage.hh" #include "arch/x86/x86_traits.hh" -#include "config/the_isa.hh" #include "cpu/intr_control.hh" #include "dev/x86/i82094aa.hh" #include "dev/x86/i8254.hh" @@ -48,9 +47,6 @@ #include "dev/x86/south_bridge.hh" #include "sim/system.hh" -using namespace std; -using namespace TheISA; - Pc::Pc(const Params *p) : Platform(p), system(p->system) { @@ -65,7 +61,7 @@ Pc::init() /* * Initialize the timer. */ - I8254 & timer = *southBridge->pit; + auto &timer = *southBridge->pit; //Timer 0, mode 2, no bcd, 16 bit count timer.writeControl(0x34); //Timer 0, latch command @@ -77,13 +73,13 @@ Pc::init() /* * Initialize the I/O APIC. */ - I82094AA & ioApic = *southBridge->ioApic; - I82094AA::RedirTableEntry entry = 0; - entry.deliveryMode = DeliveryMode::ExtInt; + X86ISA::I82094AA &ioApic = *southBridge->ioApic; + X86ISA::I82094AA::RedirTableEntry entry = 0; + entry.deliveryMode = X86ISA::DeliveryMode::ExtInt; entry.vector = 0x20; ioApic.writeReg(0x10, entry.bottomDW); ioApic.writeReg(0x11, entry.topDW); - entry.deliveryMode = DeliveryMode::Fixed; + entry.deliveryMode = X86ISA::DeliveryMode::Fixed; entry.vector = 0x24; ioApic.writeReg(0x18, entry.bottomDW); ioApic.writeReg(0x19, entry.topDW); |