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authorSteve Reinhardt <steve.reinhardt@amd.com>2009-04-21 08:17:10 -0700
committerSteve Reinhardt <steve.reinhardt@amd.com>2009-04-21 08:17:10 -0700
commiteb3b6935d3a4afc65be3ef16584be78572d4a39c (patch)
tree6c529cece77a8d0063bf37d54cb34baeecf325f8 /src
parent3083268d60ba28cf011eadd6d6e4f400e6686cc3 (diff)
downloadgem5-eb3b6935d3a4afc65be3ef16584be78572d4a39c.tar.xz
request: add PREFETCH flag.
Diffstat (limited to 'src')
-rw-r--r--src/mem/request.hh3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mem/request.hh b/src/mem/request.hh
index 5fa682f2b..aa8d56bc8 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -95,6 +95,8 @@ class Request : public FastAlloc
static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000;
/** This request is to a memory mapped register. */
static const FlagsType MMAPED_IPR = 0x00800000;
+ /** The request is a prefetch. */
+ static const FlagsType PREFETCH = 0x01000000;
/** These flags are *not* cleared when a Request object is reused
(assigned a new address). */
@@ -431,6 +433,7 @@ class Request : public FastAlloc
/** Accessor Function to Check Cacheability. */
bool isUncacheable() const { return flags.isSet(UNCACHEABLE); }
bool isInstFetch() const { return flags.isSet(INST_FETCH); }
+ bool isPrefetch() const { return flags.isSet(PREFETCH); }
bool isLLSC() const { return flags.isSet(LLSC); }
bool isLocked() const { return flags.isSet(LOCKED); }
bool isSwap() const { return flags.isSet(MEM_SWAP|MEM_SWAP_COND); }