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authorNathan Binkert <nate@binkert.org>2011-04-15 10:44:32 -0700
committerNathan Binkert <nate@binkert.org>2011-04-15 10:44:32 -0700
commiteddac53ff60c579eff28134bde84783fe36d6214 (patch)
tree9095c6b64a6fdabf4e0d00b2c8f2ca40ad495f49 /src
parentf946d7bcdb4d0b4327857d319dd4ecdd1c320d62 (diff)
downloadgem5-eddac53ff60c579eff28134bde84783fe36d6214.tar.xz
trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
Diffstat (limited to 'src')
-rwxr-xr-xsrc/SConscript258
-rw-r--r--src/arch/alpha/interrupts.hh2
-rw-r--r--src/arch/alpha/kernel_stats.cc1
-rw-r--r--src/arch/alpha/linux/process.cc1
-rw-r--r--src/arch/alpha/linux/system.cc1
-rw-r--r--src/arch/alpha/process.cc1
-rw-r--r--src/arch/alpha/remote_gdb.cc2
-rw-r--r--src/arch/alpha/stacktrace.hh1
-rw-r--r--src/arch/alpha/system.cc1
-rw-r--r--src/arch/alpha/tlb.cc1
-rw-r--r--src/arch/alpha/vtophys.cc1
-rw-r--r--src/arch/arm/faults.cc1
-rw-r--r--src/arch/arm/isa.cc2
-rw-r--r--src/arch/arm/isa.hh1
-rw-r--r--src/arch/arm/isa/includes.isa1
-rw-r--r--src/arch/arm/nativetrace.cc1
-rw-r--r--src/arch/arm/predecoder.cc1
-rw-r--r--src/arch/arm/process.cc1
-rw-r--r--src/arch/arm/remote_gdb.cc2
-rw-r--r--src/arch/arm/stacktrace.hh1
-rw-r--r--src/arch/arm/tlb.cc3
-rw-r--r--src/arch/arm/types.hh1
-rw-r--r--src/arch/mips/faults.cc1
-rw-r--r--src/arch/mips/isa.cc1
-rw-r--r--src/arch/mips/isa/includes.isa1
-rw-r--r--src/arch/mips/linux/process.cc1
-rw-r--r--src/arch/mips/locked_mem.hh1
-rw-r--r--src/arch/mips/process.cc1
-rw-r--r--src/arch/mips/stacktrace.hh1
-rw-r--r--src/arch/mips/tlb.cc2
-rw-r--r--src/arch/power/process.cc1
-rw-r--r--src/arch/power/stacktrace.hh1
-rw-r--r--src/arch/power/tlb.cc2
-rw-r--r--src/arch/sparc/interrupts.hh1
-rw-r--r--src/arch/sparc/isa.cc2
-rw-r--r--src/arch/sparc/isa/includes.isa1
-rw-r--r--src/arch/sparc/process.cc1
-rw-r--r--src/arch/sparc/remote_gdb.cc1
-rw-r--r--src/arch/sparc/stacktrace.hh1
-rw-r--r--src/arch/sparc/tlb.cc2
-rw-r--r--src/arch/sparc/ua2005.cc2
-rw-r--r--src/arch/sparc/vtophys.cc1
-rw-r--r--src/arch/x86/faults.cc2
-rw-r--r--src/arch/x86/insts/microregop.cc1
-rw-r--r--src/arch/x86/insts/static_inst.hh1
-rw-r--r--src/arch/x86/interrupts.cc1
-rw-r--r--src/arch/x86/isa/includes.isa1
-rw-r--r--src/arch/x86/nativetrace.cc1
-rw-r--r--src/arch/x86/pagetable_walker.cc1
-rw-r--r--src/arch/x86/predecoder.cc1
-rw-r--r--src/arch/x86/predecoder.hh1
-rw-r--r--src/arch/x86/process.cc1
-rw-r--r--src/arch/x86/stacktrace.hh1
-rw-r--r--src/arch/x86/tlb.cc1
-rw-r--r--src/arch/x86/vtophys.cc1
-rw-r--r--src/base/debug.cc135
-rw-r--r--src/base/debug.hh75
-rw-r--r--src/base/loader/aout_object.cc1
-rw-r--r--src/base/loader/ecoff_object.cc1
-rw-r--r--src/base/loader/elf_object.cc1
-rw-r--r--src/base/loader/raw_object.cc1
-rw-r--r--src/base/mysql.cc1
-rw-r--r--src/base/remote_gdb.cc2
-rw-r--r--src/base/trace.cc63
-rw-r--r--src/base/trace.hh20
-rw-r--r--src/base/vnc/vncserver.cc1
-rw-r--r--src/cpu/SConscript4
-rw-r--r--src/cpu/activity.cc1
-rw-r--r--src/cpu/base.cc1
-rw-r--r--src/cpu/base_dyn_inst_impl.hh2
-rw-r--r--src/cpu/exetrace.cc32
-rw-r--r--src/cpu/exetrace.hh6
-rw-r--r--src/cpu/inorder/cpu.cc4
-rw-r--r--src/cpu/inorder/first_stage.cc1
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.cc1
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.hh1
-rw-r--r--src/cpu/inorder/inorder_trace.cc3
-rw-r--r--src/cpu/inorder/pipeline_stage.cc5
-rw-r--r--src/cpu/inorder/reg_dep_map.cc1
-rw-r--r--src/cpu/inorder/resource.cc4
-rw-r--r--src/cpu/inorder/resource_pool.cc1
-rw-r--r--src/cpu/inorder/resource_sked.cc1
-rw-r--r--src/cpu/inorder/resources/agen_unit.cc1
-rw-r--r--src/cpu/inorder/resources/bpred_unit.cc3
-rw-r--r--src/cpu/inorder/resources/branch_predictor.cc2
-rw-r--r--src/cpu/inorder/resources/cache_unit.cc8
-rw-r--r--src/cpu/inorder/resources/decode_unit.cc3
-rw-r--r--src/cpu/inorder/resources/execution_unit.cc2
-rw-r--r--src/cpu/inorder/resources/fetch_seq_unit.cc2
-rw-r--r--src/cpu/inorder/resources/fetch_unit.cc5
-rw-r--r--src/cpu/inorder/resources/graduation_unit.cc1
-rw-r--r--src/cpu/inorder/resources/inst_buffer.cc2
-rw-r--r--src/cpu/inorder/resources/mult_div_unit.cc2
-rw-r--r--src/cpu/inorder/resources/use_def.cc2
-rw-r--r--src/cpu/inorder/thread_context.cc1
-rw-r--r--src/cpu/inteltrace.hh6
-rw-r--r--src/cpu/intr_control.cc1
-rw-r--r--src/cpu/nativetrace.cc1
-rw-r--r--src/cpu/o3/bpred_unit_impl.hh2
-rw-r--r--src/cpu/o3/commit_impl.hh4
-rw-r--r--src/cpu/o3/cpu.cc4
-rw-r--r--src/cpu/o3/decode_impl.hh2
-rw-r--r--src/cpu/o3/fetch_impl.hh2
-rw-r--r--src/cpu/o3/free_list.cc1
-rw-r--r--src/cpu/o3/free_list.hh2
-rw-r--r--src/cpu/o3/iew.hh1
-rw-r--r--src/cpu/o3/iew_impl.hh3
-rw-r--r--src/cpu/o3/inst_queue_impl.hh1
-rw-r--r--src/cpu/o3/lsq_impl.hh3
-rw-r--r--src/cpu/o3/lsq_unit.hh1
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh3
-rw-r--r--src/cpu/o3/mem_dep_unit.hh1
-rw-r--r--src/cpu/o3/mem_dep_unit_impl.hh1
-rw-r--r--src/cpu/o3/regfile.hh1
-rw-r--r--src/cpu/o3/rename_impl.hh2
-rw-r--r--src/cpu/o3/rename_map.cc1
-rw-r--r--src/cpu/o3/rob_impl.hh2
-rw-r--r--src/cpu/o3/scoreboard.cc1
-rw-r--r--src/cpu/o3/scoreboard.hh1
-rw-r--r--src/cpu/o3/store_set.cc1
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh1
-rw-r--r--src/cpu/pc_event.cc1
-rw-r--r--src/cpu/pred/2bit_local.cc1
-rw-r--r--src/cpu/pred/btb.cc1
-rw-r--r--src/cpu/quiesce_event.cc1
-rw-r--r--src/cpu/simple/atomic.cc2
-rw-r--r--src/cpu/simple/base.cc3
-rw-r--r--src/cpu/simple/timing.cc3
-rw-r--r--src/cpu/simple_thread.hh2
-rw-r--r--src/cpu/testers/directedtest/InvalidateGenerator.cc1
-rw-r--r--src/cpu/testers/directedtest/RubyDirectedTester.cc1
-rw-r--r--src/cpu/testers/directedtest/SeriesRequestGenerator.cc1
-rw-r--r--src/cpu/testers/memtest/memtest.cc1
-rw-r--r--src/cpu/testers/networktest/networktest.cc1
-rw-r--r--src/cpu/testers/rubytest/Check.cc1
-rw-r--r--src/cpu/testers/rubytest/CheckTable.cc1
-rw-r--r--src/cpu/testers/rubytest/RubyTester.cc1
-rw-r--r--src/cpu/thread_context.cc1
-rw-r--r--src/dev/alpha/backdoor.cc1
-rw-r--r--src/dev/alpha/tsunami_cchip.cc2
-rw-r--r--src/dev/alpha/tsunami_io.cc1
-rw-r--r--src/dev/alpha/tsunami_pchip.cc1
-rw-r--r--src/dev/copy_engine.cc1
-rw-r--r--src/dev/disk_image.cc2
-rw-r--r--src/dev/etherbus.cc2
-rw-r--r--src/dev/etherlink.cc2
-rw-r--r--src/dev/ethertap.cc2
-rw-r--r--src/dev/i8254xGBe.cc1
-rw-r--r--src/dev/i8254xGBe.hh2
-rw-r--r--src/dev/ide_ctrl.cc1
-rw-r--r--src/dev/ide_disk.cc1
-rw-r--r--src/dev/intel_8254_timer.cc1
-rw-r--r--src/dev/intel_8254_timer.hh1
-rw-r--r--src/dev/io_device.cc2
-rw-r--r--src/dev/isa_fake.cc1
-rw-r--r--src/dev/mc146818.cc1
-rw-r--r--src/dev/ns_gige.cc1
-rw-r--r--src/dev/pciconfigall.cc1
-rw-r--r--src/dev/pcidev.cc1
-rw-r--r--src/dev/simple_disk.cc2
-rw-r--r--src/dev/sinic.cc1
-rw-r--r--src/dev/sparc/iob.cc1
-rw-r--r--src/dev/sparc/mm_disk.cc1
-rw-r--r--src/dev/terminal.cc2
-rw-r--r--src/dev/uart8250.cc1
-rw-r--r--src/dev/x86/cmos.cc1
-rw-r--r--src/dev/x86/i8042.cc1
-rw-r--r--src/dev/x86/i82094aa.cc1
-rw-r--r--src/dev/x86/i8254.cc1
-rw-r--r--src/dev/x86/i8259.cc1
-rw-r--r--src/dev/x86/speaker.cc1
-rw-r--r--src/kern/linux/events.cc1
-rw-r--r--src/kern/linux/linux.cc1
-rw-r--r--src/kern/system_events.cc1
-rw-r--r--src/kern/tru64/tru64.hh1
-rw-r--r--src/kern/tru64/tru64_events.cc3
-rw-r--r--src/mem/bridge.cc1
-rw-r--r--src/mem/bus.cc3
-rw-r--r--src/mem/cache/base.cc1
-rw-r--r--src/mem/cache/base.hh2
-rw-r--r--src/mem/cache/cache_impl.hh2
-rw-r--r--src/mem/cache/mshr.cc1
-rw-r--r--src/mem/cache/prefetch/base.cc1
-rw-r--r--src/mem/cache/prefetch/ghb.cc1
-rw-r--r--src/mem/cache/prefetch/stride.cc1
-rw-r--r--src/mem/cache/tags/iic.cc3
-rw-r--r--src/mem/cache/tags/lru.cc1
-rw-r--r--src/mem/page_table.cc1
-rw-r--r--src/mem/physical.cc2
-rw-r--r--src/mem/port.cc1
-rw-r--r--src/mem/ruby/buffers/MessageBuffer.cc1
-rw-r--r--src/mem/ruby/common/NetDest.hh1
-rw-r--r--src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc1
-rw-r--r--src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc1
-rw-r--r--src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc1
-rw-r--r--src/mem/ruby/network/garnet/flexible-pipeline/Router.cc1
-rw-r--r--src/mem/ruby/network/simple/PerfectSwitch.cc1
-rw-r--r--src/mem/ruby/network/simple/Throttle.cc1
-rw-r--r--src/mem/ruby/network/simple/Topology.cc1
-rw-r--r--src/mem/ruby/system/CacheMemory.cc1
-rw-r--r--src/mem/ruby/system/DMASequencer.cc1
-rw-r--r--src/mem/ruby/system/DirectoryMemory.cc1
-rw-r--r--src/mem/ruby/system/RubyPort.cc2
-rw-r--r--src/mem/ruby/system/Sequencer.cc2
-rw-r--r--src/mem/ruby/system/SparseMemory.cc1
-rw-r--r--src/mem/slicc/symbols/StateMachine.py5
-rw-r--r--src/mem/tport.cc1
-rw-r--r--src/python/m5/debug.py62
-rw-r--r--src/python/m5/main.py31
-rw-r--r--src/python/m5/trace.py16
-rw-r--r--src/python/swig/debug.i52
-rw-r--r--src/python/swig/trace.i16
-rw-r--r--src/sim/eventq.cc1
-rw-r--r--src/sim/eventq.hh1
-rw-r--r--src/sim/faults.cc1
-rw-r--r--src/sim/pseudo_inst.cc3
-rw-r--r--src/sim/root.cc1
-rw-r--r--src/sim/sim_object.cc1
-rw-r--r--src/sim/syscall_emul.cc1
-rw-r--r--src/sim/syscall_emul.hh1
-rw-r--r--src/sim/system.cc1
221 files changed, 740 insertions, 340 deletions
diff --git a/src/SConscript b/src/SConscript
index 842044e4c..77dec89a9 100755
--- a/src/SConscript
+++ b/src/SConscript
@@ -198,21 +198,23 @@ Export('UnitTest')
########################################################################
#
-# Trace Flags
+# Debug Flags
#
-trace_flags = {}
-def TraceFlag(name, desc=None):
- if name in trace_flags:
+debug_flags = {}
+def DebugFlag(name, desc=None):
+ if name in debug_flags:
raise AttributeError, "Flag %s already specified" % name
- trace_flags[name] = (name, (), desc)
+ debug_flags[name] = (name, (), desc)
+TraceFlag = DebugFlag
def CompoundFlag(name, flags, desc=None):
- if name in trace_flags:
+ if name in debug_flags:
raise AttributeError, "Flag %s already specified" % name
compound = tuple(flags)
- trace_flags[name] = (name, compound, desc)
+ debug_flags[name] = (name, compound, desc)
+Export('DebugFlag')
Export('TraceFlag')
Export('CompoundFlag')
@@ -622,81 +624,16 @@ for swig in SwigSource.all:
MakeAction(makeEmbeddedSwigInit, Transform("EMBED SW")))
Source(init_file)
-def getFlags(source_flags):
- flagsMap = {}
- flagsList = []
- for s in source_flags:
- val = eval(s.get_contents())
- name, compound, desc = val
- flagsList.append(val)
- flagsMap[name] = bool(compound)
-
- for name, compound, desc in flagsList:
- for flag in compound:
- if flag not in flagsMap:
- raise AttributeError, "Trace flag %s not found" % flag
- if flagsMap[flag]:
- raise AttributeError, \
- "Compound flag can't point to another compound flag"
-
- flagsList.sort()
- return flagsList
-
-
-# Generate traceflags.py
-def traceFlagsPy(target, source, env):
- assert(len(target) == 1)
- code = code_formatter()
-
- allFlags = getFlags(source)
-
- code('basic = [')
- code.indent()
- for flag, compound, desc in allFlags:
- if not compound:
- code("'$flag',")
- code(']')
- code.dedent()
- code()
-
- code('compound = [')
- code.indent()
- code("'All',")
- for flag, compound, desc in allFlags:
- if compound:
- code("'$flag',")
- code("]")
- code.dedent()
- code()
-
- code("all = frozenset(basic + compound)")
- code()
-
- code('compoundMap = {')
- code.indent()
- all = tuple([flag for flag,compound,desc in allFlags if not compound])
- code("'All' : $all,")
- for flag, compound, desc in allFlags:
- if compound:
- code("'$flag' : $compound,")
- code('}')
- code.dedent()
- code()
-
- code('descriptions = {')
- code.indent()
- code("'All' : 'All flags',")
- for flag, compound, desc in allFlags:
- code("'$flag' : '$desc',")
- code("}")
- code.dedent()
-
- code.write(str(target[0]))
+#
+# Handle debug flags
+#
+def makeDebugFlagCC(target, source, env):
+ assert(len(target) == 1 and len(source) == 1)
-def traceFlagsCC(target, source, env):
- assert(len(target) == 1)
+ val = eval(source[0].get_contents())
+ name, compound, desc = val
+ compound = list(sorted(compound))
- allFlags = getFlags(source)
code = code_formatter()
# file header
@@ -705,75 +642,39 @@ def traceFlagsCC(target, source, env):
* DO NOT EDIT THIS FILE! Automatically generated
*/
-#include "base/traceflags.hh"
-
-using namespace Trace;
-
-const char *Trace::flagStrings[] =
-{''')
-
- code.indent()
- # The string array is used by SimpleEnumParam to map the strings
- # provided by the user to enum values.
- for flag, compound, desc in allFlags:
- if not compound:
- code('"$flag",')
-
- code('"All",')
- for flag, compound, desc in allFlags:
- if compound:
- code('"$flag",')
- code.dedent()
-
- code('''\
-};
-
-const int Trace::numFlagStrings = ${{len(allFlags) + 1}};
-
+#include "base/debug.hh"
''')
- # Now define the individual compound flag arrays. There is an array
- # for each compound flag listing the component base flags.
- all = tuple([flag for flag,compound,desc in allFlags if not compound])
- code('static const Flags AllMap[] = {')
- code.indent()
- for flag, compound, desc in allFlags:
- if not compound:
- code('$flag,')
- code.dedent()
- code('};')
+ for flag in compound:
+ code('#include "debug/$flag.hh"')
+ code()
+ code('namespace Debug {')
code()
- for flag, compound, desc in allFlags:
- if not compound:
- continue
- code('static const Flags ${flag}Map[] = {')
+ if not compound:
+ code('SimpleFlag $name("$name", "$desc");')
+ else:
+ code('CompoundFlag $name("$name", "$desc",')
code.indent()
- for flag in compound:
- code('$flag,')
- code('(Flags)-1')
+ last = len(compound) - 1
+ for i,flag in enumerate(compound):
+ if i != last:
+ code('$flag,')
+ else:
+ code('$flag);')
code.dedent()
- code('};')
- code()
- # Finally the compoundFlags[] array maps the compound flags
- # to their individual arrays/
- code('const Flags *Trace::compoundFlags[] = {')
- code.indent()
- code('AllMap,')
- for flag, compound, desc in allFlags:
- if compound:
- code('${flag}Map,')
- # file trailer
- code.dedent()
- code('};')
+ code()
+ code('} // namespace Debug')
code.write(str(target[0]))
-def traceFlagsHH(target, source, env):
- assert(len(target) == 1)
+def makeDebugFlagHH(target, source, env):
+ assert(len(target) == 1 and len(source) == 1)
+
+ val = eval(source[0].get_contents())
+ name, compound, desc = val
- allFlags = getFlags(source)
code = code_formatter()
# file header boilerplate
@@ -781,76 +682,43 @@ def traceFlagsHH(target, source, env):
/*
* DO NOT EDIT THIS FILE!
*
- * Automatically generated from traceflags.py
+ * Automatically generated by SCons
*/
-#ifndef __BASE_TRACE_FLAGS_HH__
-#define __BASE_TRACE_FLAGS_HH__
+#ifndef __DEBUG_${name}_HH__
+#define __DEBUG_${name}_HH__
-namespace Trace {
-
-enum Flags {''')
+namespace Debug {
+''')
- # Generate the enum. Base flags come first, then compound flags.
- idx = 0
- code.indent()
- for flag, compound, desc in allFlags:
- if not compound:
- code('$flag = $idx,')
- idx += 1
+ if compound:
+ code('class CompoundFlag;')
+ code('class SimpleFlag;')
- numBaseFlags = idx
- code('NumFlags = $idx,')
- code.dedent()
- code()
+ if compound:
+ code('extern CompoundFlag $name;')
+ for flag in compound:
+ code('extern SimpleFlag $flag;')
+ else:
+ code('extern SimpleFlag $name;')
- # put a comment in here to separate base from compound flags
code('''
-// The remaining enum values are *not* valid indices for Trace::flags.
-// They are "compound" flags, which correspond to sets of base
-// flags, and are used by changeFlag.''')
-
- code.indent()
- code('All = $idx,')
- idx += 1
- for flag, compound, desc in allFlags:
- if compound:
- code('$flag = $idx,')
- idx += 1
-
- numCompoundFlags = idx - numBaseFlags
- code('NumCompoundFlags = $numCompoundFlags')
- code.dedent()
-
- # trailer boilerplate
- code('''\
-}; // enum Flags
-
-// Array of strings for SimpleEnumParam
-extern const char *flagStrings[];
-extern const int numFlagStrings;
-
-// Array of arraay pointers: for each compound flag, gives the list of
-// base flags to set. Inidividual flag arrays are terminated by -1.
-extern const Flags *compoundFlags[];
-
-} // namespace Trace
+}
-#endif // __BASE_TRACE_FLAGS_HH__
+#endif // __DEBUG_${name}_HH__
''')
code.write(str(target[0]))
-flags = map(Value, trace_flags.values())
-env.Command('base/traceflags.py', flags,
- MakeAction(traceFlagsPy, Transform("TRACING", 0)))
-PySource('m5', 'base/traceflags.py')
+for name,flag in sorted(debug_flags.iteritems()):
+ n, compound, desc = flag
+ assert n == name
-env.Command('base/traceflags.hh', flags,
- MakeAction(traceFlagsHH, Transform("TRACING", 0)))
-env.Command('base/traceflags.cc', flags,
- MakeAction(traceFlagsCC, Transform("TRACING", 0)))
-Source('base/traceflags.cc')
+ env.Command('debug/%s.hh' % name, Value(flag),
+ MakeAction(makeDebugFlagHH, Transform("TRACING", 0)))
+ env.Command('debug/%s.cc' % name, Value(flag),
+ MakeAction(makeDebugFlagCC, Transform("TRACING", 0)))
+ Source('debug/%s.cc' % name)
# Embed python files. All .py files that have been indicated by a
# PySource() call in a SConscript need to be embedded into the M5
diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh
index cbaa8e9bf..ce3108d79 100644
--- a/src/arch/alpha/interrupts.hh
+++ b/src/arch/alpha/interrupts.hh
@@ -37,6 +37,8 @@
#include "base/compiler.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/Flow.hh"
+#include "debug/Interrupt.hh"
#include "params/AlphaInterrupts.hh"
#include "sim/sim_object.hh"
diff --git a/src/arch/alpha/kernel_stats.cc b/src/arch/alpha/kernel_stats.cc
index 70eeadd8e..c057e7f16 100644
--- a/src/arch/alpha/kernel_stats.cc
+++ b/src/arch/alpha/kernel_stats.cc
@@ -38,6 +38,7 @@
#include "arch/alpha/osfpal.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/Context.hh"
#include "kern/tru64/tru64_syscalls.hh"
#include "sim/system.hh"
diff --git a/src/arch/alpha/linux/process.cc b/src/arch/alpha/linux/process.cc
index 0e3c4ea37..97df1feca 100644
--- a/src/arch/alpha/linux/process.cc
+++ b/src/arch/alpha/linux/process.cc
@@ -34,6 +34,7 @@
#include "arch/alpha/isa_traits.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/SyscallVerbose.hh"
#include "kern/linux/linux.hh"
#include "sim/process.hh"
#include "sim/syscall_emul.hh"
diff --git a/src/arch/alpha/linux/system.cc b/src/arch/alpha/linux/system.cc
index e7440e003..6ca603a3b 100644
--- a/src/arch/alpha/linux/system.cc
+++ b/src/arch/alpha/linux/system.cc
@@ -48,6 +48,7 @@
#include "base/loader/symtab.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/Thread.hh"
#include "dev/platform.hh"
#include "kern/linux/events.hh"
#include "kern/linux/printk.hh"
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index 269a7bd63..637fbe065 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -35,6 +35,7 @@
#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
+#include "debug/Loader.hh"
#include "mem/page_table.hh"
#include "sim/byteswap.hh"
#include "sim/process_impl.hh"
diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc
index f05b448fa..82fd9c227 100644
--- a/src/arch/alpha/remote_gdb.cc
+++ b/src/arch/alpha/remote_gdb.cc
@@ -136,6 +136,8 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/GDBAcc.hh"
+#include "debug/GDBMisc.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
#include "sim/system.hh"
diff --git a/src/arch/alpha/stacktrace.hh b/src/arch/alpha/stacktrace.hh
index c09ab3576..669c65781 100644
--- a/src/arch/alpha/stacktrace.hh
+++ b/src/arch/alpha/stacktrace.hh
@@ -33,6 +33,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
+#include "debug/Stack.hh"
class ThreadContext;
diff --git a/src/arch/alpha/system.cc b/src/arch/alpha/system.cc
index 4964347fb..6a55ef8ae 100644
--- a/src/arch/alpha/system.cc
+++ b/src/arch/alpha/system.cc
@@ -37,6 +37,7 @@
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
+#include "debug/Loader.hh"
#include "mem/physical.hh"
#include "mem/vport.hh"
#include "params/AlphaSystem.hh"
diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index 6bcfffa3a..2c7e6732a 100644
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -40,6 +40,7 @@
#include "base/str.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/TLB.hh"
using namespace std;
diff --git a/src/arch/alpha/vtophys.cc b/src/arch/alpha/vtophys.cc
index 4a043d8d1..c51cddd11 100644
--- a/src/arch/alpha/vtophys.cc
+++ b/src/arch/alpha/vtophys.cc
@@ -37,6 +37,7 @@
#include "base/chunk_generator.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/VtoPhys.hh"
#include "mem/vport.hh"
using namespace std;
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index 4150adba6..03a65ea88 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -46,6 +46,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/Faults.hh"
namespace ArmISA
{
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 9988d431a..f7334ca9b 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -39,6 +39,8 @@
*/
#include "arch/arm/isa.hh"
+#include "debug/Arm.hh"
+#include "debug/MiscRegs.hh"
#include "sim/faults.hh"
#include "sim/stat_control.hh"
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 88d08e971..48840bf07 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -46,6 +46,7 @@
#include "arch/arm/registers.hh"
#include "arch/arm/tlb.hh"
#include "arch/arm/types.hh"
+#include "debug/Checkpoint.hh"
class ThreadContext;
class Checkpoint;
diff --git a/src/arch/arm/isa/includes.isa b/src/arch/arm/isa/includes.isa
index aebce0944..b54545e10 100644
--- a/src/arch/arm/isa/includes.isa
+++ b/src/arch/arm/isa/includes.isa
@@ -87,6 +87,7 @@ output exec {{
#endif
#include "base/cp_annotate.hh"
+#include "debug/Arm.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/sim_exit.hh"
diff --git a/src/arch/arm/nativetrace.cc b/src/arch/arm/nativetrace.cc
index 531a6ee2e..2dd225e80 100644
--- a/src/arch/arm/nativetrace.cc
+++ b/src/arch/arm/nativetrace.cc
@@ -44,6 +44,7 @@
#include "arch/arm/miscregs.hh"
#include "arch/arm/nativetrace.hh"
#include "cpu/thread_context.hh"
+#include "debug/ExecRegDelta.hh"
#include "params/ArmNativeTrace.hh"
#include "sim/byteswap.hh"
diff --git a/src/arch/arm/predecoder.cc b/src/arch/arm/predecoder.cc
index b87ca622e..a221f4e30 100644
--- a/src/arch/arm/predecoder.cc
+++ b/src/arch/arm/predecoder.cc
@@ -46,6 +46,7 @@
#include "arch/arm/utility.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/Predecoder.hh"
namespace ArmISA
{
diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc
index 61349192f..c3b02744e 100644
--- a/src/arch/arm/process.cc
+++ b/src/arch/arm/process.cc
@@ -48,6 +48,7 @@
#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
+#include "debug/Stack.hh"
#include "mem/page_table.hh"
#include "mem/translating_port.hh"
#include "sim/byteswap.hh"
diff --git a/src/arch/arm/remote_gdb.cc b/src/arch/arm/remote_gdb.cc
index 2a4680782..1303f6ffc 100644
--- a/src/arch/arm/remote_gdb.cc
+++ b/src/arch/arm/remote_gdb.cc
@@ -151,6 +151,8 @@
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "cpu/thread_state.hh"
+#include "debug/GDBAcc.hh"
+#include "debug/GDBMisc.hh"
#include "mem/page_table.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
diff --git a/src/arch/arm/stacktrace.hh b/src/arch/arm/stacktrace.hh
index 05fdb9e78..f88ed352b 100644
--- a/src/arch/arm/stacktrace.hh
+++ b/src/arch/arm/stacktrace.hh
@@ -33,6 +33,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
+#include "debug/Stack.hh"
class ThreadContext;
namespace ArmISA
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index ccbca3d9c..ca2b68b3b 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -53,6 +53,9 @@
#include "base/str.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/Checkpoint.hh"
+#include "debug/TLB.hh"
+#include "debug/TLBVerbose.hh"
#include "mem/page_table.hh"
#include "params/ArmTLB.hh"
#include "sim/process.hh"
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index 6bd449e3d..9e7c0ff7f 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -48,6 +48,7 @@
#include "base/hashmap.hh"
#include "base/misc.hh"
#include "base/types.hh"
+#include "debug/Predecoder.hh"
namespace ArmISA
{
diff --git a/src/arch/mips/faults.cc b/src/arch/mips/faults.cc
index 9bb945dba..652b5960c 100644
--- a/src/arch/mips/faults.cc
+++ b/src/arch/mips/faults.cc
@@ -36,6 +36,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/MipsPRA.hh"
#if !FULL_SYSTEM
#include "mem/page_table.hh"
diff --git a/src/arch/mips/isa.cc b/src/arch/mips/isa.cc
index 902574bac..6a525ed3a 100644
--- a/src/arch/mips/isa.cc
+++ b/src/arch/mips/isa.cc
@@ -35,6 +35,7 @@
#include "base/bitfield.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/MipsPRA.hh"
namespace MipsISA
{
diff --git a/src/arch/mips/isa/includes.isa b/src/arch/mips/isa/includes.isa
index b0d1aa748..73d751f6e 100644
--- a/src/arch/mips/isa/includes.isa
+++ b/src/arch/mips/isa/includes.isa
@@ -82,6 +82,7 @@ output exec {{
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
+#include "debug/MipsPRA.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/eventq.hh"
diff --git a/src/arch/mips/linux/process.cc b/src/arch/mips/linux/process.cc
index fa8e659b6..156d4ea05 100644
--- a/src/arch/mips/linux/process.cc
+++ b/src/arch/mips/linux/process.cc
@@ -35,6 +35,7 @@
#include "arch/mips/isa_traits.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/SyscallVerbose.hh"
#include "kern/linux/linux.hh"
#include "sim/eventq.hh"
#include "sim/process.hh"
diff --git a/src/arch/mips/locked_mem.hh b/src/arch/mips/locked_mem.hh
index 1cc08ee3d..60df8252a 100644
--- a/src/arch/mips/locked_mem.hh
+++ b/src/arch/mips/locked_mem.hh
@@ -40,6 +40,7 @@
#include "arch/registers.hh"
#include "base/misc.hh"
#include "base/trace.hh"
+#include "debug/LLSC.hh"
#include "mem/request.hh"
namespace MipsISA
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc
index b6f21c95c..c62b60b98 100644
--- a/src/arch/mips/process.cc
+++ b/src/arch/mips/process.cc
@@ -36,6 +36,7 @@
#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
+#include "debug/Loader.hh"
#include "mem/page_table.hh"
#include "sim/process.hh"
#include "sim/process_impl.hh"
diff --git a/src/arch/mips/stacktrace.hh b/src/arch/mips/stacktrace.hh
index 4c02cc86c..8520c3d1b 100644
--- a/src/arch/mips/stacktrace.hh
+++ b/src/arch/mips/stacktrace.hh
@@ -33,6 +33,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
+#include "debug/Stack.hh"
class ThreadContext;
diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc
index b73eae72f..0f76363c8 100644
--- a/src/arch/mips/tlb.cc
+++ b/src/arch/mips/tlb.cc
@@ -43,6 +43,8 @@
#include "base/str.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/MipsPRA.hh"
+#include "debug/TLB.hh"
#include "mem/page_table.hh"
#include "params/MipsTLB.hh"
#include "sim/process.hh"
diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc
index a34a874bc..d12e3eab6 100644
--- a/src/arch/power/process.cc
+++ b/src/arch/power/process.cc
@@ -37,6 +37,7 @@
#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
+#include "debug/Stack.hh"
#include "mem/page_table.hh"
#include "mem/translating_port.hh"
#include "sim/process_impl.hh"
diff --git a/src/arch/power/stacktrace.hh b/src/arch/power/stacktrace.hh
index e87203df6..72a66e5bd 100644
--- a/src/arch/power/stacktrace.hh
+++ b/src/arch/power/stacktrace.hh
@@ -37,6 +37,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
+#include "debug/Stack.hh"
class ThreadContext;
class StackTrace;
diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc
index aa47b83c0..8a088032c 100644
--- a/src/arch/power/tlb.cc
+++ b/src/arch/power/tlb.cc
@@ -46,6 +46,8 @@
#include "base/str.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/Power.hh"
+#include "debug/TLB.hh"
#include "mem/page_table.hh"
#include "params/PowerTLB.hh"
#include "sim/process.hh"
diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh
index 5e9ae2de0..b728e7188 100644
--- a/src/arch/sparc/interrupts.hh
+++ b/src/arch/sparc/interrupts.hh
@@ -36,6 +36,7 @@
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/registers.hh"
#include "cpu/thread_context.hh"
+#include "debug/Interrupt.hh"
#include "params/SparcInterrupts.hh"
#include "sim/sim_object.hh"
diff --git a/src/arch/sparc/isa.cc b/src/arch/sparc/isa.cc
index c60567598..6c9be8164 100644
--- a/src/arch/sparc/isa.cc
+++ b/src/arch/sparc/isa.cc
@@ -35,6 +35,8 @@
#include "config/full_system.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/MiscRegs.hh"
+#include "debug/Timer.hh"
namespace SparcISA
{
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index 8ef753d2e..885cd9cc2 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -74,6 +74,7 @@ output exec {{
#include "base/bigint.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
+#include "debug/Sparc.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/sim_exit.hh"
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index bd3db92b6..3eee3d137 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -39,6 +39,7 @@
#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
+#include "debug/Stack.hh"
#include "mem/page_table.hh"
#include "mem/translating_port.hh"
#include "sim/process_impl.hh"
diff --git a/src/arch/sparc/remote_gdb.cc b/src/arch/sparc/remote_gdb.cc
index 86c287237..48f0c3e47 100644
--- a/src/arch/sparc/remote_gdb.cc
+++ b/src/arch/sparc/remote_gdb.cc
@@ -130,6 +130,7 @@
#include "config/full_system.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/GDBRead.hh"
#include "mem/page_table.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
diff --git a/src/arch/sparc/stacktrace.hh b/src/arch/sparc/stacktrace.hh
index 0b7d0b0c1..1e7853d1c 100644
--- a/src/arch/sparc/stacktrace.hh
+++ b/src/arch/sparc/stacktrace.hh
@@ -35,6 +35,7 @@
#include "base/types.hh"
#include "cpu/static_inst.hh"
+#include "debug/Stack.hh"
class ThreadContext;
namespace SparcISA
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index 8742cfd32..00ec4e411 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -38,6 +38,8 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/IPR.hh"
+#include "debug/TLB.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#include "sim/system.hh"
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index efab8b832..67c17900b 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -33,6 +33,8 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/Quiesce.hh"
+#include "debug/Timer.hh"
#include "sim/system.hh"
using namespace SparcISA;
diff --git a/src/arch/sparc/vtophys.cc b/src/arch/sparc/vtophys.cc
index c8f35fe8b..edcf88828 100644
--- a/src/arch/sparc/vtophys.cc
+++ b/src/arch/sparc/vtophys.cc
@@ -36,6 +36,7 @@
#include "base/compiler.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/VtoPhys.hh"
#include "mem/vport.hh"
using namespace std;
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index 7fb677c69..feb88fd76 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -45,12 +45,14 @@
#include "base/trace.hh"
#include "config/full_system.hh"
#include "cpu/thread_context.hh"
+
#if !FULL_SYSTEM
#include "arch/x86/isa_traits.hh"
#include "mem/page_table.hh"
#include "sim/process.hh"
#else
#include "arch/x86/tlb.hh"
+#include "debug/Faults.hh"
#endif
namespace X86ISA
diff --git a/src/arch/x86/insts/microregop.cc b/src/arch/x86/insts/microregop.cc
index dedea0f3d..f5f32e30f 100644
--- a/src/arch/x86/insts/microregop.cc
+++ b/src/arch/x86/insts/microregop.cc
@@ -42,6 +42,7 @@
#include "arch/x86/insts/microregop.hh"
#include "arch/x86/regs/misc.hh"
#include "base/condcodes.hh"
+#include "debug/X86.hh"
namespace X86ISA
{
diff --git a/src/arch/x86/insts/static_inst.hh b/src/arch/x86/insts/static_inst.hh
index 8813f216c..b4e348fd9 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -42,6 +42,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
+#include "debug/X86.hh"
namespace X86ISA
{
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index c45b0c344..7d6f6e35e 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -41,6 +41,7 @@
#include "arch/x86/interrupts.hh"
#include "arch/x86/intmessage.hh"
#include "cpu/base.hh"
+#include "debug/LocalApic.hh"
#include "dev/x86/i82094aa.hh"
#include "dev/x86/pc.hh"
#include "dev/x86/south_bridge.hh"
diff --git a/src/arch/x86/isa/includes.isa b/src/arch/x86/isa/includes.isa
index 6f4c4008e..8d4af6829 100644
--- a/src/arch/x86/isa/includes.isa
+++ b/src/arch/x86/isa/includes.isa
@@ -118,6 +118,7 @@ output exec {{
#include "base/condcodes.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
+#include "debug/X86.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
diff --git a/src/arch/x86/nativetrace.cc b/src/arch/x86/nativetrace.cc
index 3dd5890bc..557508ee7 100644
--- a/src/arch/x86/nativetrace.cc
+++ b/src/arch/x86/nativetrace.cc
@@ -33,6 +33,7 @@
#include "arch/x86/isa_traits.hh"
#include "arch/x86/nativetrace.hh"
#include "cpu/thread_context.hh"
+#include "debug/ExecRegDelta.hh"
#include "params/X86NativeTrace.hh"
#include "sim/byteswap.hh"
diff --git a/src/arch/x86/pagetable_walker.cc b/src/arch/x86/pagetable_walker.cc
index 835cc69ad..c80fe10fc 100644
--- a/src/arch/x86/pagetable_walker.cc
+++ b/src/arch/x86/pagetable_walker.cc
@@ -44,6 +44,7 @@
#include "base/bitfield.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/PageTableWalker.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#include "sim/system.hh"
diff --git a/src/arch/x86/predecoder.cc b/src/arch/x86/predecoder.cc
index 0318230e5..429b91687 100644
--- a/src/arch/x86/predecoder.cc
+++ b/src/arch/x86/predecoder.cc
@@ -43,6 +43,7 @@
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/thread_context.hh"
+#include "debug/Predecoder.hh"
namespace X86ISA
{
diff --git a/src/arch/x86/predecoder.hh b/src/arch/x86/predecoder.hh
index f0d9cda81..49938dd16 100644
--- a/src/arch/x86/predecoder.hh
+++ b/src/arch/x86/predecoder.hh
@@ -48,6 +48,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "debug/Predecoder.hh"
class ThreadContext;
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 693a8fabe..79a140776 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -51,6 +51,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/Stack.hh"
#include "mem/page_table.hh"
#include "mem/translating_port.hh"
#include "sim/process_impl.hh"
diff --git a/src/arch/x86/stacktrace.hh b/src/arch/x86/stacktrace.hh
index 854fb397c..e9d6900d8 100644
--- a/src/arch/x86/stacktrace.hh
+++ b/src/arch/x86/stacktrace.hh
@@ -33,6 +33,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
+#include "debug/Stack.hh"
class ThreadContext;
namespace X86ISA
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index f5e73dcee..199f070d3 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -50,6 +50,7 @@
#include "config/full_system.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/TLB.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
diff --git a/src/arch/x86/vtophys.cc b/src/arch/x86/vtophys.cc
index 0fa43fd4c..60ce37131 100644
--- a/src/arch/x86/vtophys.cc
+++ b/src/arch/x86/vtophys.cc
@@ -45,6 +45,7 @@
#include "base/trace.hh"
#include "config/full_system.hh"
#include "cpu/thread_context.hh"
+#include "debug/VtoPhys.hh"
#include "sim/fault_fwd.hh"
using namespace std;
diff --git a/src/base/debug.cc b/src/base/debug.cc
index 6f01b3fc0..be301da07 100644
--- a/src/base/debug.cc
+++ b/src/base/debug.cc
@@ -31,12 +31,24 @@
#include <sys/types.h>
#include <unistd.h>
+#include <algorithm>
#include <csignal>
+#include <map>
+#include <vector>
#include "base/cprintf.hh"
+#include "base/debug.hh"
+#include "base/misc.hh"
+
+using namespace std;
namespace Debug {
+//
+// This function will cause the process to signal itself with a
+// SIGTRAP which is ignored if not in gdb, but will cause the debugger
+// to break if in gdb.
+//
void
breakpoint()
{
@@ -47,4 +59,127 @@ breakpoint()
#endif
}
+//
+// Flags for debugging purposes. Primarily for trace.hh
+//
+typedef std::map<string, Flag *> FlagsMap;
+int allFlagsVersion = 0;
+FlagsMap &
+allFlags()
+{
+ static FlagsMap flags;
+ return flags;
+}
+
+Flag *
+findFlag(const std::string &name)
+{
+ FlagsMap::iterator i = allFlags().find(name);
+ if (i == allFlags().end())
+ return NULL;
+ return i->second;
+}
+
+Flag::Flag(const char *name, const char *desc)
+ : _name(name), _desc(desc)
+{
+ pair<FlagsMap::iterator, bool> result =
+ allFlags().insert(make_pair(name, this));
+
+ if (!result.second)
+ panic("Flag %s already defined!", name);
+
+ ++allFlagsVersion;
+}
+
+Flag::~Flag()
+{
+ // should find and remove flag.
+}
+
+void
+CompoundFlag::enable()
+{
+ SimpleFlag::enable();
+ for_each(flags.begin(), flags.end(), mem_fun(&Flag::enable));
+}
+
+void
+CompoundFlag::disable()
+{
+ SimpleFlag::disable();
+ for_each(flags.begin(), flags.end(), mem_fun(&Flag::disable));
+}
+
+struct AllFlags : public Flag
+{
+ AllFlags()
+ : Flag("All", "All Flags")
+ {}
+
+ void
+ enable()
+ {
+ FlagsMap::iterator i = allFlags().begin();
+ FlagsMap::iterator end = allFlags().end();
+ for (; i != end; ++i)
+ if (i->second != this)
+ i->second->enable();
+ }
+
+ void
+ disable()
+ {
+ FlagsMap::iterator i = allFlags().begin();
+ FlagsMap::iterator end = allFlags().end();
+ for (; i != end; ++i)
+ if (i->second != this)
+ i->second->enable();
+ }
+};
+
+AllFlags theAllFlags;
+Flag *const All = &theAllFlags;
+
+bool
+changeFlag(const char *s, bool value)
+{
+ Flag *f = findFlag(s);
+ if (!f)
+ return false;
+
+ if (value)
+ f->enable();
+ else
+ f->disable();
+
+ return true;
+}
+
} // namespace Debug
+
+// add a set of functions that can easily be invoked from gdb
+void
+setDebugFlag(const char *string)
+{
+ Debug::changeFlag(string, true);
+}
+
+void
+clearDebugFlag(const char *string)
+{
+ Debug::changeFlag(string, false);
+}
+
+void
+dumpDebugFlags()
+{
+ using namespace Debug;
+ FlagsMap::iterator i = allFlags().begin();
+ FlagsMap::iterator end = allFlags().end();
+ for (; i != end; ++i) {
+ SimpleFlag *f = dynamic_cast<SimpleFlag *>(i->second);
+ if (f && f->status())
+ cprintf("%s\n", f->name());
+ }
+}
diff --git a/src/base/debug.hh b/src/base/debug.hh
index ee7402912..ced6b4f48 100644
--- a/src/base/debug.hh
+++ b/src/base/debug.hh
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * Copyright (c) 2010 The Hewlett-Packard Development Company
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -31,10 +32,84 @@
#ifndef __BASE_DEBUG_HH__
#define __BASE_DEBUG_HH__
+#include <string>
+#include <vector>
+
namespace Debug {
void breakpoint();
+class Flag
+{
+ protected:
+ const char *_name;
+ const char *_desc;
+
+ public:
+ Flag(const char *name, const char *desc);
+ virtual ~Flag();
+
+ std::string name() const { return _name; }
+ std::string desc() const { return _desc; }
+
+ virtual void enable() = 0;
+ virtual void disable() = 0;
+};
+
+class SimpleFlag : public Flag
+{
+ protected:
+ bool _status;
+
+ public:
+ SimpleFlag(const char *name, const char *desc)
+ : Flag(name, desc)
+ { }
+
+ bool status() const { return _status; }
+ operator bool() const { return _status; }
+ bool operator!() const { return !_status; }
+
+ void enable() { _status = true; }
+ void disable() { _status = false; }
+};
+
+class CompoundFlag : public SimpleFlag
+{
+ protected:
+ std::vector<Flag *> flags;
+
+ public:
+ CompoundFlag(const char *name, const char *desc,
+ Flag &f00 = *(Flag *)0, Flag &f01 = *(Flag *)0,
+ Flag &f02 = *(Flag *)0, Flag &f03 = *(Flag *)0,
+ Flag &f04 = *(Flag *)0, Flag &f05 = *(Flag *)0,
+ Flag &f06 = *(Flag *)0, Flag &f07 = *(Flag *)0,
+ Flag &f08 = *(Flag *)0, Flag &f09 = *(Flag *)0,
+ Flag &f10 = *(Flag *)0, Flag &f11 = *(Flag *)0,
+ Flag &f12 = *(Flag *)0, Flag &f13 = *(Flag *)0,
+ Flag &f14 = *(Flag *)0, Flag &f15 = *(Flag *)0,
+ Flag &f16 = *(Flag *)0, Flag &f17 = *(Flag *)0,
+ Flag &f18 = *(Flag *)0, Flag &f19 = *(Flag *)0)
+ : SimpleFlag(name, desc)
+ {
+ addFlag(f00); addFlag(f01); addFlag(f02); addFlag(f03); addFlag(f04);
+ addFlag(f05); addFlag(f06); addFlag(f07); addFlag(f08); addFlag(f09);
+ addFlag(f10); addFlag(f11); addFlag(f12); addFlag(f13); addFlag(f14);
+ addFlag(f15); addFlag(f16); addFlag(f17); addFlag(f18); addFlag(f19);
+ }
+
+ void
+ addFlag(Flag &f)
+ {
+ if (&f != NULL)
+ flags.push_back(&f);
+ }
+
+ void enable();
+ void disable();
+};
+
} // namespace Debug
#endif // __BASE_DEBUG_HH__
diff --git a/src/base/loader/aout_object.cc b/src/base/loader/aout_object.cc
index 31a6a2868..756f03a9e 100644
--- a/src/base/loader/aout_object.cc
+++ b/src/base/loader/aout_object.cc
@@ -34,6 +34,7 @@
#include "base/loader/exec_aout.h"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
+#include "debug/Loader.hh"
using namespace std;
diff --git a/src/base/loader/ecoff_object.cc b/src/base/loader/ecoff_object.cc
index 2027a2e1e..263085d16 100644
--- a/src/base/loader/ecoff_object.cc
+++ b/src/base/loader/ecoff_object.cc
@@ -35,6 +35,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "debug/Loader.hh"
// Only alpha will be able to load ecoff files for now.
// base/types.hh and ecoff_machdep.h must be before the other .h files
diff --git a/src/base/loader/elf_object.cc b/src/base/loader/elf_object.cc
index 22316c0d6..6fcbd0ae3 100644
--- a/src/base/loader/elf_object.cc
+++ b/src/base/loader/elf_object.cc
@@ -37,6 +37,7 @@
#include "base/bitfield.hh"
#include "base/misc.hh"
#include "base/trace.hh"
+#include "debug/Loader.hh"
#include "sim/byteswap.hh"
#include "gelf.h"
diff --git a/src/base/loader/raw_object.cc b/src/base/loader/raw_object.cc
index d002d9005..eb1e06d3f 100644
--- a/src/base/loader/raw_object.cc
+++ b/src/base/loader/raw_object.cc
@@ -31,6 +31,7 @@
#include "base/loader/raw_object.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
+#include "debug/Loader.hh"
ObjectFile *
RawObject::tryFile(const std::string &fname, int fd, size_t len, uint8_t *data)
diff --git a/src/base/mysql.cc b/src/base/mysql.cc
index 3216bcf43..a029c13b5 100644
--- a/src/base/mysql.cc
+++ b/src/base/mysql.cc
@@ -32,6 +32,7 @@
#include "base/mysql.hh"
#include "base/trace.hh"
+#include "debug/SQL.hh"
using namespace std;
diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc
index 02ee8e331..01e50824e 100644
--- a/src/base/remote_gdb.cc
+++ b/src/base/remote_gdb.cc
@@ -136,11 +136,13 @@
#include "config/the_isa.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/GDBAll.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
#include "sim/system.hh"
using namespace std;
+using namespace Debug;
using namespace TheISA;
#ifndef NDEBUG
diff --git a/src/base/trace.cc b/src/base/trace.cc
index 7783b6d42..1a035d400 100644
--- a/src/base/trace.cc
+++ b/src/base/trace.cc
@@ -32,9 +32,7 @@
#include <cctype>
#include <fstream>
#include <iostream>
-#include <list>
#include <string>
-#include <vector>
#include "base/misc.hh"
#include "base/output.hh"
@@ -45,8 +43,8 @@
using namespace std;
namespace Trace {
+
const string DefaultName("global");
-FlagVec flags(NumFlags, false);
bool enabled = false;
//
@@ -149,63 +147,4 @@ dump(Tick when, const std::string &name, const void *d, int len)
}
}
-bool
-changeFlag(const char *s, bool value)
-{
- using namespace Trace;
- std::string str(s);
-
- for (int i = 0; i < numFlagStrings; ++i) {
- if (str != flagStrings[i])
- continue;
-
- if (i < NumFlags) {
- flags[i] = value;
- } else {
- i -= NumFlags;
-
- const Flags *flagVec = compoundFlags[i];
- for (int j = 0; flagVec[j] != -1; ++j) {
- if (flagVec[j] < NumFlags)
- flags[flagVec[j]] = value;
- }
- }
-
- return true;
- }
-
- // the flag was not found.
- return false;
-}
-
-void
-dumpStatus()
-{
- using namespace Trace;
- for (int i = 0; i < numFlagStrings; ++i) {
- if (flags[i])
- cprintf("%s\n", flagStrings[i]);
- }
-}
-
} // namespace Trace
-
-
-// add a set of functions that can easily be invoked from gdb
-void
-setTraceFlag(const char *string)
-{
- Trace::changeFlag(string, true);
-}
-
-void
-clearTraceFlag(const char *string)
-{
- Trace::changeFlag(string, false);
-}
-
-void
-dumpTraceStatus()
-{
- Trace::dumpStatus();
-}
diff --git a/src/base/trace.hh b/src/base/trace.hh
index a03a34018..dbeffdc8b 100644
--- a/src/base/trace.hh
+++ b/src/base/trace.hh
@@ -33,23 +33,22 @@
#define __BASE_TRACE_HH__
#include <string>
-#include <vector>
#include "base/cprintf.hh"
+#include "base/debug.hh"
#include "base/match.hh"
-#include "base/traceflags.hh"
#include "base/types.hh"
#include "sim/core.hh"
namespace Trace {
+using Debug::SimpleFlag;
+using Debug::CompoundFlag;
+
std::ostream &output();
void setOutput(const std::string &filename);
extern bool enabled;
-typedef std::vector<bool> FlagVec;
-extern FlagVec flags;
-inline bool IsOn(int t) { return flags[t]; }
bool changeFlag(const char *str, bool value);
void dumpStatus();
@@ -85,25 +84,28 @@ inline const std::string &name() { return Trace::DefaultName; }
#if TRACING_ON
-#define DTRACE(x) (Trace::IsOn(Trace::x) && Trace::enabled)
+#define DTRACE(x) ((Debug::x) && Trace::enabled)
#define DDUMP(x, data, count) do { \
+ using namespace Debug; \
if (DTRACE(x)) \
Trace::dump(curTick(), name(), data, count); \
} while (0)
#define DPRINTF(x, ...) do { \
+ using namespace Debug; \
if (DTRACE(x)) \
Trace::dprintf(curTick(), name(), __VA_ARGS__); \
} while (0)
-#define DPRINTFS(x,s, ...) do { \
+#define DPRINTFS(x, s, ...) do { \
+ using namespace Debug; \
if (DTRACE(x)) \
- Trace::dprintf(curTick(), s->name(), __VA_ARGS__); \
+ Trace::dprintf(curTick(), s->name(), __VA_ARGS__); \
} while (0)
-
#define DPRINTFR(x, ...) do { \
+ using namespace Debug; \
if (DTRACE(x)) \
Trace::dprintf((Tick)-1, std::string(), __VA_ARGS__); \
} while (0)
diff --git a/src/base/vnc/vncserver.cc b/src/base/vnc/vncserver.cc
index 84e1a20e1..18e581bfe 100644
--- a/src/base/vnc/vncserver.cc
+++ b/src/base/vnc/vncserver.cc
@@ -55,6 +55,7 @@
#include "base/misc.hh"
#include "base/socket.hh"
#include "base/trace.hh"
+#include "debug/VNC.hh"
#include "sim/byteswap.hh"
using namespace std;
diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index 99308c2fb..fb7c86845 100644
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -173,6 +173,10 @@ TraceFlag('IntrControl')
TraceFlag('PCEvent')
TraceFlag('Quiesce')
+CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
+ 'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',
+ 'ExecResult', 'ExecSpeculative', 'ExecSymbol', 'ExecThread',
+ 'ExecTicks', 'ExecMicro', 'ExecMacro' ])
CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting' ])
CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
diff --git a/src/cpu/activity.cc b/src/cpu/activity.cc
index 84f88d594..13613cffc 100644
--- a/src/cpu/activity.cc
+++ b/src/cpu/activity.cc
@@ -32,6 +32,7 @@
#include "cpu/activity.hh"
#include "cpu/timebuf.hh"
+#include "debug/Activity.hh"
using namespace std;
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 1d249b274..1e25a5982 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -45,6 +45,7 @@
#include "cpu/cpuevent.hh"
#include "cpu/profile.hh"
#include "cpu/thread_context.hh"
+#include "debug/SyscallVerbose.hh"
#include "params/BaseCPU.hh"
#include "sim/process.hh"
#include "sim/sim_events.hh"
diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh
index 688d5c66b..226291e1d 100644
--- a/src/cpu/base_dyn_inst_impl.hh
+++ b/src/cpu/base_dyn_inst_impl.hh
@@ -50,6 +50,8 @@
#include "config/the_isa.hh"
#include "cpu/base_dyn_inst.hh"
#include "cpu/exetrace.hh"
+#include "debug/DynInst.hh"
+#include "debug/IQ.hh"
#include "mem/request.hh"
#include "sim/faults.hh"
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index ea90ba7c2..a6450ffe3 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -41,6 +41,7 @@
#include "cpu/exetrace.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/ExecAll.hh"
#include "enums/OpClass.hh"
using namespace std;
@@ -59,22 +60,21 @@ Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
{
ostream &outs = Trace::output();
- if (IsOn(ExecTicks))
+ if (Debug::ExecTicks)
dumpTicks(outs);
outs << thread->getCpuPtr()->name() << " ";
- if (IsOn(ExecSpeculative))
+ if (Debug::ExecSpeculative)
outs << (misspeculating ? "-" : "+") << " ";
- if (IsOn(ExecThread))
+ if (Debug::ExecThread)
outs << "T" << thread->threadId() << " : ";
std::string sym_str;
Addr sym_addr;
Addr cur_pc = pc.instAddr();
- if (debugSymbolTable
- && IsOn(ExecSymbol)
+ if (debugSymbolTable && Debug::ExecSymbol
#if FULL_SYSTEM
&& !inUserMode(thread)
#endif
@@ -104,25 +104,25 @@ Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
if (ran) {
outs << " : ";
- if (IsOn(ExecOpClass)) {
+ if (Debug::ExecOpClass) {
outs << Enums::OpClassStrings[inst->opClass()] << " : ";
}
- if (IsOn(ExecResult) && predicate == false) {
+ if (Debug::ExecResult && predicate == false) {
outs << "Predicated False";
}
- if (IsOn(ExecResult) && data_status != DataInvalid) {
+ if (Debug::ExecResult && data_status != DataInvalid) {
ccprintf(outs, " D=%#018x", data.as_int);
}
- if (IsOn(ExecEffAddr) && addr_valid)
+ if (Debug::ExecEffAddr && addr_valid)
outs << " A=0x" << hex << addr;
- if (IsOn(ExecFetchSeq) && fetch_seq_valid)
+ if (Debug::ExecFetchSeq && fetch_seq_valid)
outs << " FetchSeq=" << dec << fetch_seq;
- if (IsOn(ExecCPSeq) && cp_seq_valid)
+ if (Debug::ExecCPSeq && cp_seq_valid)
outs << " CPSeq=" << dec << cp_seq;
}
@@ -143,14 +143,14 @@ Trace::ExeTracerRecord::dump()
* finishes. Macroops then behave like regular instructions and don't
* complete/print when they fault.
*/
- if (IsOn(ExecMacro) && staticInst->isMicroop() &&
- ((IsOn(ExecMicro) &&
- macroStaticInst && staticInst->isFirstMicroop()) ||
- (!IsOn(ExecMicro) &&
+ if (Debug::ExecMacro && staticInst->isMicroop() &&
+ ((Debug::ExecMicro &&
+ macroStaticInst && staticInst->isFirstMicroop()) ||
+ (!Debug::ExecMicro &&
macroStaticInst && staticInst->isLastMicroop()))) {
traceInst(macroStaticInst, false);
}
- if (IsOn(ExecMicro) || !staticInst->isMicroop()) {
+ if (Debug::ExecMicro || !staticInst->isMicroop()) {
traceInst(staticInst, true);
}
}
diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh
index 5dc65b48b..6d9f2a337 100644
--- a/src/cpu/exetrace.hh
+++ b/src/cpu/exetrace.hh
@@ -36,6 +36,8 @@
#include "base/types.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/ExecEnable.hh"
+#include "debug/ExecSpeculative.hh"
#include "params/ExeTracer.hh"
#include "sim/insttracer.hh"
@@ -72,13 +74,13 @@ class ExeTracer : public InstTracer
const StaticInstPtr staticInst, TheISA::PCState pc,
const StaticInstPtr macroStaticInst = NULL)
{
- if (!IsOn(ExecEnable))
+ if (!Debug::ExecEnable)
return NULL;
if (!Trace::enabled)
return NULL;
- if (!IsOn(ExecSpeculative) && tc->misspeculating())
+ if (!Debug::ExecSpeculative && tc->misspeculating())
return NULL;
return new ExeTracerRecord(when, tc,
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index f7fff05d3..c27020671 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -47,6 +47,10 @@
#include "cpu/exetrace.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
+#include "debug/Activity.hh"
+#include "debug/InOrderCPU.hh"
+#include "debug/RefCount.hh"
+#include "debug/SkedCache.hh"
#include "mem/translating_port.hh"
#include "params/InOrderCPU.hh"
#include "sim/process.hh"
diff --git a/src/cpu/inorder/first_stage.cc b/src/cpu/inorder/first_stage.cc
index bf57681a7..20fd9169f 100644
--- a/src/cpu/inorder/first_stage.cc
+++ b/src/cpu/inorder/first_stage.cc
@@ -34,6 +34,7 @@
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/first_stage.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "debug/InOrderStage.hh"
#include "params/InOrderTrace.hh"
using namespace std;
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index 90134f533..30a69bbb5 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -41,6 +41,7 @@
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/exetrace.hh"
+#include "debug/InOrderDynInst.hh"
#include "mem/request.hh"
using namespace std;
diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh
index 1fbc476e8..033726df9 100644
--- a/src/cpu/inorder/inorder_dyn_inst.hh
+++ b/src/cpu/inorder/inorder_dyn_inst.hh
@@ -57,6 +57,7 @@
#include "cpu/op_class.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/InOrderDynInst.hh"
#include "mem/packet.hh"
#include "sim/system.hh"
diff --git a/src/cpu/inorder/inorder_trace.cc b/src/cpu/inorder/inorder_trace.cc
index 8d40451bd..8edb5b1cc 100644
--- a/src/cpu/inorder/inorder_trace.cc
+++ b/src/cpu/inorder/inorder_trace.cc
@@ -37,6 +37,7 @@
#include "cpu/exetrace.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/ExecEnable.hh"
#include "params/InOrderTrace.hh"
using namespace std;
@@ -64,7 +65,7 @@ InOrderTraceRecord *
InOrderTrace::getInstRecord(unsigned num_stages, bool stage_tracing,
ThreadContext *tc)
{
- if (!IsOn(ExecEnable))
+ if (!Debug::ExecEnable)
return NULL;
if (!Trace::enabled)
diff --git a/src/cpu/inorder/pipeline_stage.cc b/src/cpu/inorder/pipeline_stage.cc
index b9e21e20f..fe97fb8f4 100644
--- a/src/cpu/inorder/pipeline_stage.cc
+++ b/src/cpu/inorder/pipeline_stage.cc
@@ -34,6 +34,11 @@
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/pipeline_stage.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "debug/Activity.hh"
+#include "debug/InOrderStage.hh"
+#include "debug/InOrderStall.hh"
+#include "debug/Resource.hh"
+#include "debug/ThreadModel.hh"
using namespace std;
using namespace ThePipeline;
diff --git a/src/cpu/inorder/reg_dep_map.cc b/src/cpu/inorder/reg_dep_map.cc
index 8eb7a3111..cf66f42c2 100644
--- a/src/cpu/inorder/reg_dep_map.cc
+++ b/src/cpu/inorder/reg_dep_map.cc
@@ -35,6 +35,7 @@
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/reg_dep_map.hh"
+#include "debug/RegDepMap.hh"
using namespace std;
using namespace TheISA;
diff --git a/src/cpu/inorder/resource.cc b/src/cpu/inorder/resource.cc
index b72dbd14f..bdcfbde7d 100644
--- a/src/cpu/inorder/resource.cc
+++ b/src/cpu/inorder/resource.cc
@@ -35,6 +35,10 @@
#include "base/str.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/resource.hh"
+#include "debug/RefCount.hh"
+#include "debug/ResReqCount.hh"
+#include "debug/Resource.hh"
+
using namespace std;
Resource::Resource(string res_name, int res_id, int res_width,
diff --git a/src/cpu/inorder/resource_pool.cc b/src/cpu/inorder/resource_pool.cc
index a9eb742f4..536a3b53c 100644
--- a/src/cpu/inorder/resource_pool.cc
+++ b/src/cpu/inorder/resource_pool.cc
@@ -34,6 +34,7 @@
#include "cpu/inorder/resources/resource_list.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "debug/Resource.hh"
using namespace std;
using namespace ThePipeline;
diff --git a/src/cpu/inorder/resource_sked.cc b/src/cpu/inorder/resource_sked.cc
index 443500870..96b4f84b6 100644
--- a/src/cpu/inorder/resource_sked.cc
+++ b/src/cpu/inorder/resource_sked.cc
@@ -35,6 +35,7 @@
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource_sked.hh"
+#include "debug/SkedCache.hh"
using namespace std;
using namespace ThePipeline;
diff --git a/src/cpu/inorder/resources/agen_unit.cc b/src/cpu/inorder/resources/agen_unit.cc
index 3e26c4da3..d87ca364d 100644
--- a/src/cpu/inorder/resources/agen_unit.cc
+++ b/src/cpu/inorder/resources/agen_unit.cc
@@ -30,6 +30,7 @@
*/
#include "cpu/inorder/resources/agen_unit.hh"
+#include "debug/InOrderAGEN.hh"
AGENUnit::AGENUnit(std::string res_name, int res_id, int res_width,
int res_latency, InOrderCPU *_cpu,
diff --git a/src/cpu/inorder/resources/bpred_unit.cc b/src/cpu/inorder/resources/bpred_unit.cc
index 9e15a4fee..127843e96 100644
--- a/src/cpu/inorder/resources/bpred_unit.cc
+++ b/src/cpu/inorder/resources/bpred_unit.cc
@@ -33,9 +33,10 @@
#include "arch/utility.hh"
#include "base/trace.hh"
-#include "base/traceflags.hh"
#include "config/the_isa.hh"
#include "cpu/inorder/resources/bpred_unit.hh"
+#include "debug/InOrderBPred.hh"
+#include "debug/Resource.hh"
using namespace std;
using namespace ThePipeline;
diff --git a/src/cpu/inorder/resources/branch_predictor.cc b/src/cpu/inorder/resources/branch_predictor.cc
index 4b8205070..829ae4346 100644
--- a/src/cpu/inorder/resources/branch_predictor.cc
+++ b/src/cpu/inorder/resources/branch_predictor.cc
@@ -31,6 +31,8 @@
#include "config/the_isa.hh"
#include "cpu/inorder/resources/branch_predictor.hh"
+#include "debug/InOrderBPred.hh"
+#include "debug/InOrderStage.hh"
using namespace std;
using namespace TheISA;
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index ce4c538da..620ba06c1 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -41,6 +41,14 @@
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "debug/Activity.hh"
+#include "debug/AddrDep.hh"
+#include "debug/InOrderCachePort.hh"
+#include "debug/InOrderStall.hh"
+#include "debug/InOrderTLB.hh"
+#include "debug/LLSC.hh"
+#include "debug/RefCount.hh"
+#include "debug/ThreadModel.hh"
#include "mem/request.hh"
using namespace std;
diff --git a/src/cpu/inorder/resources/decode_unit.cc b/src/cpu/inorder/resources/decode_unit.cc
index 71d33ab90..559becaaf 100644
--- a/src/cpu/inorder/resources/decode_unit.cc
+++ b/src/cpu/inorder/resources/decode_unit.cc
@@ -31,6 +31,9 @@
#include "config/the_isa.hh"
#include "cpu/inorder/resources/decode_unit.hh"
+#include "debug/InOrderDecode.hh"
+#include "debug/InOrderStall.hh"
+#include "debug/Resource.hh"
using namespace TheISA;
using namespace ThePipeline;
diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index 2ec340749..7ed9aed9a 100644
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -35,6 +35,8 @@
#include "cpu/inorder/resources/execution_unit.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "debug/InOrderExecute.hh"
+#include "debug/InOrderStall.hh"
using namespace std;
using namespace ThePipeline;
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc
index 8d9187c7a..df8c6de63 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.cc
+++ b/src/cpu/inorder/resources/fetch_seq_unit.cc
@@ -32,6 +32,8 @@
#include "config/the_isa.hh"
#include "cpu/inorder/resources/fetch_seq_unit.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "debug/InOrderFetchSeq.hh"
+#include "debug/InOrderStall.hh"
using namespace std;
using namespace TheISA;
diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc
index 899fa8c08..692f78c7b 100644
--- a/src/cpu/inorder/resources/fetch_unit.cc
+++ b/src/cpu/inorder/resources/fetch_unit.cc
@@ -42,6 +42,11 @@
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "debug/Activity.hh"
+#include "debug/InOrderCachePort.hh"
+#include "debug/InOrderStall.hh"
+#include "debug/RefCount.hh"
+#include "debug/ThreadModel.hh"
#include "mem/request.hh"
using namespace std;
diff --git a/src/cpu/inorder/resources/graduation_unit.cc b/src/cpu/inorder/resources/graduation_unit.cc
index edc2fb3ff..a7530345e 100644
--- a/src/cpu/inorder/resources/graduation_unit.cc
+++ b/src/cpu/inorder/resources/graduation_unit.cc
@@ -30,6 +30,7 @@
*/
#include "cpu/inorder/resources/graduation_unit.hh"
+#include "debug/InOrderGraduation.hh"
using namespace ThePipeline;
diff --git a/src/cpu/inorder/resources/inst_buffer.cc b/src/cpu/inorder/resources/inst_buffer.cc
index e0405879b..d64eb79f1 100644
--- a/src/cpu/inorder/resources/inst_buffer.cc
+++ b/src/cpu/inorder/resources/inst_buffer.cc
@@ -37,6 +37,8 @@
#include "cpu/inorder/resources/inst_buffer.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/pipeline_traits.hh"
+#include "debug/InOrderInstBuffer.hh"
+#include "debug/Resource.hh"
using namespace std;
using namespace TheISA;
diff --git a/src/cpu/inorder/resources/mult_div_unit.cc b/src/cpu/inorder/resources/mult_div_unit.cc
index 8fbfc231e..49df901e3 100644
--- a/src/cpu/inorder/resources/mult_div_unit.cc
+++ b/src/cpu/inorder/resources/mult_div_unit.cc
@@ -36,6 +36,8 @@
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/resource_pool.hh"
#include "cpu/op_class.hh"
+#include "debug/InOrderMDU.hh"
+#include "debug/Resource.hh"
using namespace std;
using namespace ThePipeline;
diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index 8a00ab704..beb8d4dde 100644
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -37,6 +37,8 @@
#include "cpu/inorder/resources/use_def.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/pipeline_traits.hh"
+#include "debug/InOrderStall.hh"
+#include "debug/InOrderUseDef.hh"
using namespace std;
using namespace TheISA;
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc
index 636bcee22..a217630a9 100644
--- a/src/cpu/inorder/thread_context.cc
+++ b/src/cpu/inorder/thread_context.cc
@@ -33,6 +33,7 @@
#include "config/the_isa.hh"
#include "cpu/inorder/thread_context.hh"
#include "cpu/exetrace.hh"
+#include "debug/InOrderCPU.hh"
using namespace TheISA;
diff --git a/src/cpu/inteltrace.hh b/src/cpu/inteltrace.hh
index 5083318ad..dbb6300ac 100644
--- a/src/cpu/inteltrace.hh
+++ b/src/cpu/inteltrace.hh
@@ -35,6 +35,8 @@
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/static_inst.hh"
+#include "debug/ExecEnable.hh"
+#include "debug/ExecSpeculative.hh"
#include "params/IntelTrace.hh"
#include "sim/insttracer.hh"
@@ -68,13 +70,13 @@ class IntelTrace : public InstTracer
const StaticInstPtr staticInst, TheISA::PCState pc,
const StaticInstPtr macroStaticInst = NULL)
{
- if (!IsOn(ExecEnable))
+ if (!Debug::ExecEnable)
return NULL;
if (!Trace::enabled)
return NULL;
- if (!IsOn(ExecSpeculative) && tc->misspeculating())
+ if (!Debug::ExecSpeculative && tc->misspeculating())
return NULL;
return new IntelTraceRecord(when, tc,
diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc
index 085dbe9ac..8f3808889 100644
--- a/src/cpu/intr_control.cc
+++ b/src/cpu/intr_control.cc
@@ -36,6 +36,7 @@
#include "cpu/base.hh"
#include "cpu/intr_control.hh"
#include "cpu/thread_context.hh"
+#include "debug/IntrControl.hh"
#include "sim/sim_object.hh"
using namespace std;
diff --git a/src/cpu/nativetrace.cc b/src/cpu/nativetrace.cc
index 9660c0e13..1f5132288 100644
--- a/src/cpu/nativetrace.cc
+++ b/src/cpu/nativetrace.cc
@@ -31,6 +31,7 @@
#include "base/socket.hh"
#include "cpu/nativetrace.hh"
#include "cpu/static_inst.hh"
+#include "debug/GDBMisc.hh"
#include "params/NativeTrace.hh"
using namespace std;
diff --git a/src/cpu/o3/bpred_unit_impl.hh b/src/cpu/o3/bpred_unit_impl.hh
index 44e6f4230..e0292e232 100644
--- a/src/cpu/o3/bpred_unit_impl.hh
+++ b/src/cpu/o3/bpred_unit_impl.hh
@@ -34,9 +34,9 @@
#include "arch/types.hh"
#include "arch/utility.hh"
#include "base/trace.hh"
-#include "base/traceflags.hh"
#include "config/the_isa.hh"
#include "cpu/o3/bpred_unit.hh"
+#include "debug/Fetch.hh"
#include "params/DerivO3CPU.hh"
template<class Impl>
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 2512ab1f6..aa72c0750 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -54,6 +54,10 @@
#include "cpu/o3/thread_state.hh"
#include "cpu/exetrace.hh"
#include "cpu/timebuf.hh"
+#include "debug/Activity.hh"
+#include "debug/Commit.hh"
+#include "debug/CommitRate.hh"
+#include "debug/ExecFaulting.hh"
#include "params/DerivO3CPU.hh"
#include "sim/faults.hh"
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 565c68f7a..b19e4f460 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -40,6 +40,9 @@
#include "cpu/activity.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
+#include "debug/Activity.hh"
+#include "debug/O3CPU.hh"
+#include "debug/Quiesce.hh"
#include "enums/MemoryMode.hh"
#include "sim/core.hh"
#include "sim/stat_control.hh"
@@ -57,6 +60,7 @@
#if THE_ISA == ALPHA_ISA
#include "arch/alpha/osfpal.hh"
+#include "debug/Activity.hh"
#endif
class BaseCPUParams;
diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh
index cee597716..010dbfa5a 100644
--- a/src/cpu/o3/decode_impl.hh
+++ b/src/cpu/o3/decode_impl.hh
@@ -34,6 +34,8 @@
#include "config/the_isa.hh"
#include "cpu/o3/decode.hh"
#include "cpu/inst_seq.hh"
+#include "debug/Activity.hh"
+#include "debug/Decode.hh"
#include "params/DerivO3CPU.hh"
using namespace std;
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 806cf7916..0f7d908d1 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -52,6 +52,8 @@
#include "cpu/checker/cpu.hh"
#include "cpu/o3/fetch.hh"
#include "cpu/exetrace.hh"
+#include "debug/Activity.hh"
+#include "debug/Fetch.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
#include "params/DerivO3CPU.hh"
diff --git a/src/cpu/o3/free_list.cc b/src/cpu/o3/free_list.cc
index 88020a0a2..4224d0e41 100644
--- a/src/cpu/o3/free_list.cc
+++ b/src/cpu/o3/free_list.cc
@@ -30,6 +30,7 @@
#include "base/trace.hh"
#include "cpu/o3/free_list.hh"
+#include "debug/FreeList.hh"
SimpleFreeList::SimpleFreeList(ThreadID activeThreads,
unsigned _numLogicalIntRegs,
diff --git a/src/cpu/o3/free_list.hh b/src/cpu/o3/free_list.hh
index 96289f641..fec076097 100644
--- a/src/cpu/o3/free_list.hh
+++ b/src/cpu/o3/free_list.hh
@@ -37,9 +37,9 @@
#include "arch/registers.hh"
#include "base/misc.hh"
#include "base/trace.hh"
-#include "base/traceflags.hh"
#include "config/the_isa.hh"
#include "cpu/o3/comm.hh"
+#include "debug/FreeList.hh"
/**
* FreeList class that simply holds the list of free integer and floating
diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh
index 75f6df7ab..8ebbfb2e6 100644
--- a/src/cpu/o3/iew.hh
+++ b/src/cpu/o3/iew.hh
@@ -52,6 +52,7 @@
#include "cpu/o3/lsq.hh"
#include "cpu/o3/scoreboard.hh"
#include "cpu/timebuf.hh"
+#include "debug/IEW.hh"
class DerivO3CPUParams;
class FUPool;
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh
index e76a6bc3d..2569dbb34 100644
--- a/src/cpu/o3/iew_impl.hh
+++ b/src/cpu/o3/iew_impl.hh
@@ -51,6 +51,9 @@
#include "cpu/o3/fu_pool.hh"
#include "cpu/o3/iew.hh"
#include "cpu/timebuf.hh"
+#include "debug/Activity.hh"
+#include "debug/Decode.hh"
+#include "debug/IEW.hh"
#include "params/DerivO3CPU.hh"
using namespace std;
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index 1a211af7a..bac9e2ec6 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -46,6 +46,7 @@
#include "cpu/o3/fu_pool.hh"
#include "cpu/o3/inst_queue.hh"
+#include "debug/IQ.hh"
#include "enums/OpClass.hh"
#include "params/DerivO3CPU.hh"
#include "sim/core.hh"
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index ddfc63754..8dd240557 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -33,6 +33,9 @@
#include <string>
#include "cpu/o3/lsq.hh"
+#include "debug/Fetch.hh"
+#include "debug/LSQ.hh"
+#include "debug/Writeback.hh"
#include "params/DerivO3CPU.hh"
using namespace std;
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index 2d9a6ce56..be9c91a23 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -45,6 +45,7 @@
#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "cpu/timebuf.hh"
+#include "debug/LSQUnit.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 6a366d056..aa86c3d14 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -47,6 +47,9 @@
#include "config/use_checker.hh"
#include "cpu/o3/lsq.hh"
#include "cpu/o3/lsq_unit.hh"
+#include "debug/Activity.hh"
+#include "debug/IEW.hh"
+#include "debug/LSQUnit.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
diff --git a/src/cpu/o3/mem_dep_unit.hh b/src/cpu/o3/mem_dep_unit.hh
index a9560f446..5d6f0a159 100644
--- a/src/cpu/o3/mem_dep_unit.hh
+++ b/src/cpu/o3/mem_dep_unit.hh
@@ -38,6 +38,7 @@
#include "base/refcnt.hh"
#include "base/statistics.hh"
#include "cpu/inst_seq.hh"
+#include "debug/MemDepUnit.hh"
struct SNHash {
size_t operator() (const InstSeqNum &seq_num) const {
diff --git a/src/cpu/o3/mem_dep_unit_impl.hh b/src/cpu/o3/mem_dep_unit_impl.hh
index fdea84ed5..6f3c922a7 100644
--- a/src/cpu/o3/mem_dep_unit_impl.hh
+++ b/src/cpu/o3/mem_dep_unit_impl.hh
@@ -32,6 +32,7 @@
#include "cpu/o3/inst_queue.hh"
#include "cpu/o3/mem_dep_unit.hh"
+#include "debug/MemDepUnit.hh"
#include "params/DerivO3CPU.hh"
template <class MemDepPred, class Impl>
diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh
index e252fa362..d04f45cc0 100644
--- a/src/cpu/o3/regfile.hh
+++ b/src/cpu/o3/regfile.hh
@@ -40,6 +40,7 @@
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/o3/comm.hh"
+#include "debug/IEW.hh"
#if FULL_SYSTEM
#include "arch/kernel_stats.hh"
diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh
index 1f34b7255..7d20cac30 100644
--- a/src/cpu/o3/rename_impl.hh
+++ b/src/cpu/o3/rename_impl.hh
@@ -48,6 +48,8 @@
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/o3/rename.hh"
+#include "debug/Activity.hh"
+#include "debug/Rename.hh"
#include "params/DerivO3CPU.hh"
using namespace std;
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index e6649ce3e..cc5044c20 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -31,6 +31,7 @@
#include <vector>
#include "cpu/o3/rename_map.hh"
+#include "debug/Rename.hh"
using namespace std;
diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh
index d9d1daded..dcde54a54 100644
--- a/src/cpu/o3/rob_impl.hh
+++ b/src/cpu/o3/rob_impl.hh
@@ -33,6 +33,8 @@
#include "config/full_system.hh"
#include "cpu/o3/rob.hh"
+#include "debug/Fetch.hh"
+#include "debug/ROB.hh"
using namespace std;
diff --git a/src/cpu/o3/scoreboard.cc b/src/cpu/o3/scoreboard.cc
index 7fb47f3c7..83a88f213 100644
--- a/src/cpu/o3/scoreboard.cc
+++ b/src/cpu/o3/scoreboard.cc
@@ -31,6 +31,7 @@
#include "config/the_isa.hh"
#include "cpu/o3/scoreboard.hh"
+#include "debug/Scoreboard.hh"
Scoreboard::Scoreboard(unsigned activeThreads,
unsigned _numLogicalIntRegs,
diff --git a/src/cpu/o3/scoreboard.hh b/src/cpu/o3/scoreboard.hh
index 4789e2181..8a49d7a3a 100644
--- a/src/cpu/o3/scoreboard.hh
+++ b/src/cpu/o3/scoreboard.hh
@@ -37,7 +37,6 @@
#include <vector>
#include "base/trace.hh"
-#include "base/traceflags.hh"
#include "cpu/o3/comm.hh"
/**
diff --git a/src/cpu/o3/store_set.cc b/src/cpu/o3/store_set.cc
index df4ee00ad..fc87c417e 100644
--- a/src/cpu/o3/store_set.cc
+++ b/src/cpu/o3/store_set.cc
@@ -32,6 +32,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "cpu/o3/store_set.hh"
+#include "debug/StoreSet.hh"
StoreSet::StoreSet(int _SSIT_size, int _LFST_size)
: SSITSize(_SSIT_size), LFSTSize(_LFST_size)
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index b179ad50e..c3b7d2248 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -45,6 +45,7 @@
#include "config/the_isa.hh"
#include "cpu/o3/thread_context.hh"
#include "cpu/quiesce_event.hh"
+#include "debug/O3CPU.hh"
#if FULL_SYSTEM
template <class Impl>
diff --git a/src/cpu/pc_event.cc b/src/cpu/pc_event.cc
index 0ac5102bb..f9955d014 100644
--- a/src/cpu/pc_event.cc
+++ b/src/cpu/pc_event.cc
@@ -40,6 +40,7 @@
#include "cpu/base.hh"
#include "cpu/pc_event.hh"
#include "cpu/thread_context.hh"
+#include "debug/PCEvent.hh"
#include "sim/core.hh"
#include "sim/system.hh"
diff --git a/src/cpu/pred/2bit_local.cc b/src/cpu/pred/2bit_local.cc
index a70d65296..dc8cf50b7 100644
--- a/src/cpu/pred/2bit_local.cc
+++ b/src/cpu/pred/2bit_local.cc
@@ -32,6 +32,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "cpu/pred/2bit_local.hh"
+#include "debug/Fetch.hh"
LocalBP::LocalBP(unsigned _localPredictorSize,
unsigned _localCtrBits,
diff --git a/src/cpu/pred/btb.cc b/src/cpu/pred/btb.cc
index e87cc6dc2..393e52ccf 100644
--- a/src/cpu/pred/btb.cc
+++ b/src/cpu/pred/btb.cc
@@ -31,6 +31,7 @@
#include "base/intmath.hh"
#include "base/trace.hh"
#include "cpu/pred/btb.hh"
+#include "debug/Fetch.hh"
DefaultBTB::DefaultBTB(unsigned _numEntries,
unsigned _tagBits,
diff --git a/src/cpu/quiesce_event.cc b/src/cpu/quiesce_event.cc
index 79068985b..d5c3fe240 100644
--- a/src/cpu/quiesce_event.cc
+++ b/src/cpu/quiesce_event.cc
@@ -31,6 +31,7 @@
#include "cpu/base.hh"
#include "cpu/quiesce_event.hh"
#include "cpu/thread_context.hh"
+#include "debug/Quiesce.hh"
EndQuiesceEvent::EndQuiesceEvent(ThreadContext *_tc)
: tc(_tc)
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index c5730e137..f3d79dd2b 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -35,6 +35,8 @@
#include "config/the_isa.hh"
#include "cpu/simple/atomic.hh"
#include "cpu/exetrace.hh"
+#include "debug/ExecFaulting.hh"
+#include "debug/SimpleCPU.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/AtomicSimpleCPU.hh"
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 464520309..699e78764 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -60,6 +60,9 @@
#include "cpu/smt.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "debug/Decode.hh"
+#include "debug/Fetch.hh"
+#include "debug/Quiesce.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
#include "params/BaseSimpleCPU.hh"
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 52d4b06d2..c992cb0b5 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -47,6 +47,9 @@
#include "config/the_isa.hh"
#include "cpu/simple/timing.hh"
#include "cpu/exetrace.hh"
+#include "debug/Config.hh"
+#include "debug/ExecFaulting.hh"
+#include "debug/SimpleCPU.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/TimingSimpleCPU.hh"
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 5420519e4..dcf0663e2 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -42,6 +42,8 @@
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "cpu/thread_state.hh"
+#include "debug/FloatRegs.hh"
+#include "debug/IntRegs.hh"
#include "mem/request.hh"
#include "sim/byteswap.hh"
#include "sim/eventq.hh"
diff --git a/src/cpu/testers/directedtest/InvalidateGenerator.cc b/src/cpu/testers/directedtest/InvalidateGenerator.cc
index 3b5aa55e5..902c6cc15 100644
--- a/src/cpu/testers/directedtest/InvalidateGenerator.cc
+++ b/src/cpu/testers/directedtest/InvalidateGenerator.cc
@@ -30,6 +30,7 @@
#include "cpu/testers/directedtest/DirectedGenerator.hh"
#include "cpu/testers/directedtest/InvalidateGenerator.hh"
#include "cpu/testers/directedtest/RubyDirectedTester.hh"
+#include "debug/DirectedTest.hh"
InvalidateGenerator::InvalidateGenerator(const Params *p)
: DirectedGenerator(p)
diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.cc b/src/cpu/testers/directedtest/RubyDirectedTester.cc
index cc7c84dd3..b85cf781c 100644
--- a/src/cpu/testers/directedtest/RubyDirectedTester.cc
+++ b/src/cpu/testers/directedtest/RubyDirectedTester.cc
@@ -29,6 +29,7 @@
#include "cpu/testers/directedtest/DirectedGenerator.hh"
#include "cpu/testers/directedtest/RubyDirectedTester.hh"
+#include "debug/DirectedTest.hh"
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
#include "sim/sim_exit.hh"
diff --git a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
index 5b6395f93..43e140178 100644
--- a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
+++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
@@ -30,6 +30,7 @@
#include "cpu/testers/directedtest/DirectedGenerator.hh"
#include "cpu/testers/directedtest/RubyDirectedTester.hh"
#include "cpu/testers/directedtest/SeriesRequestGenerator.hh"
+#include "debug/DirectedTest.hh"
SeriesRequestGenerator::SeriesRequestGenerator(const Params *p)
: DirectedGenerator(p)
diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc
index 758a25ea2..d75bcb845 100644
--- a/src/cpu/testers/memtest/memtest.cc
+++ b/src/cpu/testers/memtest/memtest.cc
@@ -39,6 +39,7 @@
#include "base/misc.hh"
#include "base/statistics.hh"
#include "cpu/testers/memtest/memtest.hh"
+#include "debug/MemTest.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
diff --git a/src/cpu/testers/networktest/networktest.cc b/src/cpu/testers/networktest/networktest.cc
index 1c1555743..dcc47675b 100644
--- a/src/cpu/testers/networktest/networktest.cc
+++ b/src/cpu/testers/networktest/networktest.cc
@@ -37,6 +37,7 @@
#include "base/misc.hh"
#include "base/statistics.hh"
#include "cpu/testers/networktest/networktest.hh"
+#include "debug/NetworkTest.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
diff --git a/src/cpu/testers/rubytest/Check.cc b/src/cpu/testers/rubytest/Check.cc
index c0007cd98..164fb56e1 100644
--- a/src/cpu/testers/rubytest/Check.cc
+++ b/src/cpu/testers/rubytest/Check.cc
@@ -28,6 +28,7 @@
*/
#include "cpu/testers/rubytest/Check.hh"
+#include "debug/RubyTest.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/system/Sequencer.hh"
#include "mem/ruby/system/System.hh"
diff --git a/src/cpu/testers/rubytest/CheckTable.cc b/src/cpu/testers/rubytest/CheckTable.cc
index c2aa68a53..f3335b48c 100644
--- a/src/cpu/testers/rubytest/CheckTable.cc
+++ b/src/cpu/testers/rubytest/CheckTable.cc
@@ -30,6 +30,7 @@
#include "base/intmath.hh"
#include "cpu/testers/rubytest/Check.hh"
#include "cpu/testers/rubytest/CheckTable.hh"
+#include "debug/RubyTest.hh"
CheckTable::CheckTable(int _num_cpu_sequencers, RubyTester* _tester)
: m_num_cpu_sequencers(_num_cpu_sequencers), m_tester_ptr(_tester)
diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc
index 024cb741e..5040d9fae 100644
--- a/src/cpu/testers/rubytest/RubyTester.cc
+++ b/src/cpu/testers/rubytest/RubyTester.cc
@@ -30,6 +30,7 @@
#include "base/misc.hh"
#include "cpu/testers/rubytest/Check.hh"
#include "cpu/testers/rubytest/RubyTester.hh"
+#include "debug/RubyTest.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index c4960ea30..334bdf4d4 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -32,6 +32,7 @@
#include "base/trace.hh"
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
+#include "debug/Context.hh"
void
ThreadContext::compare(ThreadContext *one, ThreadContext *two)
diff --git a/src/dev/alpha/backdoor.cc b/src/dev/alpha/backdoor.cc
index 960832f8c..31ab62866 100644
--- a/src/dev/alpha/backdoor.cc
+++ b/src/dev/alpha/backdoor.cc
@@ -44,6 +44,7 @@
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/AlphaBackdoor.hh"
#include "dev/alpha/backdoor.hh"
#include "dev/platform.hh"
#include "dev/simple_disk.hh"
diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index fd76fd93e..74f769c86 100644
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -42,6 +42,8 @@
#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "cpu/thread_context.hh"
+#include "debug/IPI.hh"
+#include "debug/Tsunami.hh"
#include "dev/alpha/tsunami.hh"
#include "dev/alpha/tsunami_cchip.hh"
#include "dev/alpha/tsunamireg.h"
diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc
index 37456ada2..0c1937a32 100644
--- a/src/dev/alpha/tsunami_io.cc
+++ b/src/dev/alpha/tsunami_io.cc
@@ -43,6 +43,7 @@
#include "base/time.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/Tsunami.hh"
#include "dev/alpha/tsunami.hh"
#include "dev/alpha/tsunami_cchip.hh"
#include "dev/alpha/tsunami_io.hh"
diff --git a/src/dev/alpha/tsunami_pchip.cc b/src/dev/alpha/tsunami_pchip.cc
index e293f6333..f8c9104e2 100644
--- a/src/dev/alpha/tsunami_pchip.cc
+++ b/src/dev/alpha/tsunami_pchip.cc
@@ -39,6 +39,7 @@
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/Tsunami.hh"
#include "dev/alpha/tsunami.hh"
#include "dev/alpha/tsunami_pchip.hh"
#include "dev/alpha/tsunamireg.h"
diff --git a/src/dev/copy_engine.cc b/src/dev/copy_engine.cc
index feb0342de..361d4db1b 100644
--- a/src/dev/copy_engine.cc
+++ b/src/dev/copy_engine.cc
@@ -36,6 +36,7 @@
#include "base/cp_annotate.hh"
#include "base/trace.hh"
+#include "debug/DMACopyEngine.hh"
#include "dev/copy_engine.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/disk_image.cc b/src/dev/disk_image.cc
index 6a06e74f6..4c770fbcd 100644
--- a/src/dev/disk_image.cc
+++ b/src/dev/disk_image.cc
@@ -44,6 +44,8 @@
#include "base/callback.hh"
#include "base/misc.hh"
#include "base/trace.hh"
+#include "debug/DiskImageRead.hh"
+#include "debug/DiskImageWrite.hh"
#include "dev/disk_image.hh"
#include "sim/byteswap.hh"
#include "sim/sim_exit.hh"
diff --git a/src/dev/etherbus.cc b/src/dev/etherbus.cc
index b072e16f8..c9e9c93ba 100644
--- a/src/dev/etherbus.cc
+++ b/src/dev/etherbus.cc
@@ -38,6 +38,8 @@
#include <vector>
#include "base/trace.hh"
+#include "debug/Ethernet.hh"
+#include "debug/EthernetData.hh"
#include "dev/etherbus.hh"
#include "dev/etherdump.hh"
#include "dev/etherint.hh"
diff --git a/src/dev/etherlink.cc b/src/dev/etherlink.cc
index dcecfd933..289b74543 100644
--- a/src/dev/etherlink.cc
+++ b/src/dev/etherlink.cc
@@ -40,6 +40,8 @@
#include "base/random.hh"
#include "base/trace.hh"
+#include "debug/Ethernet.hh"
+#include "debug/EthernetData.hh"
#include "dev/etherdump.hh"
#include "dev/etherint.hh"
#include "dev/etherlink.hh"
diff --git a/src/dev/ethertap.cc b/src/dev/ethertap.cc
index 401ea8a83..2a85aa524 100644
--- a/src/dev/ethertap.cc
+++ b/src/dev/ethertap.cc
@@ -45,6 +45,8 @@
#include "base/pollevent.hh"
#include "base/socket.hh"
#include "base/trace.hh"
+#include "debug/Ethernet.hh"
+#include "debug/EthernetData.hh"
#include "dev/etherdump.hh"
#include "dev/etherint.hh"
#include "dev/etherpkt.hh"
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index 78a897815..db03f5778 100644
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -44,6 +44,7 @@
#include "base/inet.hh"
#include "base/trace.hh"
+#include "debug/EthernetAll.hh"
#include "dev/i8254xGBe.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/i8254xGBe.hh b/src/dev/i8254xGBe.hh
index 738b1cf43..1e50be165 100644
--- a/src/dev/i8254xGBe.hh
+++ b/src/dev/i8254xGBe.hh
@@ -40,6 +40,8 @@
#include "base/cp_annotate.hh"
#include "base/inet.hh"
+#include "debug/EthernetDesc.hh"
+#include "debug/EthernetIntr.hh"
#include "dev/etherdevice.hh"
#include "dev/etherint.hh"
#include "dev/etherpkt.hh"
diff --git a/src/dev/ide_ctrl.cc b/src/dev/ide_ctrl.cc
index 8e9b673ac..a370c7f36 100644
--- a/src/dev/ide_ctrl.cc
+++ b/src/dev/ide_ctrl.cc
@@ -34,6 +34,7 @@
#include "base/trace.hh"
#include "cpu/intr_control.hh"
+#include "debug/IdeCtrl.hh"
#include "dev/ide_ctrl.hh"
#include "dev/ide_disk.hh"
#include "mem/packet.hh"
diff --git a/src/dev/ide_disk.cc b/src/dev/ide_disk.cc
index c6c020e5c..a67318b68 100644
--- a/src/dev/ide_disk.cc
+++ b/src/dev/ide_disk.cc
@@ -43,6 +43,7 @@
#include "base/cprintf.hh" // csprintf
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/IdeDisk.hh"
#include "dev/disk_image.hh"
#include "dev/ide_ctrl.hh"
#include "dev/ide_disk.hh"
diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc
index cad59bbdb..4aa3fec14 100644
--- a/src/dev/intel_8254_timer.cc
+++ b/src/dev/intel_8254_timer.cc
@@ -31,6 +31,7 @@
*/
#include "base/misc.hh"
+#include "debug/Intel8254Timer.hh"
#include "dev/intel_8254_timer.hh"
using namespace std;
diff --git a/src/dev/intel_8254_timer.hh b/src/dev/intel_8254_timer.hh
index bdfdf36cc..72b9b9c72 100644
--- a/src/dev/intel_8254_timer.hh
+++ b/src/dev/intel_8254_timer.hh
@@ -38,6 +38,7 @@
#include "base/bitunion.hh"
#include "base/types.hh"
+#include "debug/Intel8254Timer.hh"
#include "sim/eventq.hh"
#include "sim/serialize.hh"
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index b9c47adc6..bfdf3d486 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -31,6 +31,8 @@
#include "base/chunk_generator.hh"
#include "base/trace.hh"
+#include "debug/BusAddrRanges.hh"
+#include "debug/DMA.hh"
#include "dev/io_device.hh"
#include "sim/system.hh"
diff --git a/src/dev/isa_fake.cc b/src/dev/isa_fake.cc
index af3ca3b0f..21b723bdc 100644
--- a/src/dev/isa_fake.cc
+++ b/src/dev/isa_fake.cc
@@ -33,6 +33,7 @@
*/
#include "base/trace.hh"
+#include "debug/IsaFake.hh"
#include "dev/isa_fake.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc
index c29bb94b4..9397a599b 100644
--- a/src/dev/mc146818.cc
+++ b/src/dev/mc146818.cc
@@ -38,6 +38,7 @@
#include "base/bitfield.hh"
#include "base/time.hh"
#include "base/trace.hh"
+#include "debug/MC146818.hh"
#include "dev/mc146818.hh"
#include "dev/rtcreg.h"
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index f1b95e113..a7bc6d0ab 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -41,6 +41,7 @@
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
+#include "debug/EthernetAll.hh"
#include "dev/etherlink.hh"
#include "dev/ns_gige.hh"
#include "dev/pciconfigall.hh"
diff --git a/src/dev/pciconfigall.cc b/src/dev/pciconfigall.cc
index 74396be5d..55b439857 100644
--- a/src/dev/pciconfigall.cc
+++ b/src/dev/pciconfigall.cc
@@ -34,6 +34,7 @@
*/
#include "base/trace.hh"
+#include "debug/PciConfigAll.hh"
#include "dev/pciconfigall.hh"
#include "dev/pcireg.h"
#include "dev/platform.hh"
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index db68a3799..a22612d18 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -43,6 +43,7 @@
#include "base/misc.hh"
#include "base/str.hh"
#include "base/trace.hh"
+#include "debug/PCIDEV.hh"
#include "dev/alpha/tsunamireg.h"
#include "dev/pciconfigall.hh"
#include "dev/pcidev.hh"
diff --git a/src/dev/simple_disk.cc b/src/dev/simple_disk.cc
index eb603c6c7..4bf24b1cd 100644
--- a/src/dev/simple_disk.cc
+++ b/src/dev/simple_disk.cc
@@ -42,6 +42,8 @@
#include "base/misc.hh"
#include "base/trace.hh"
+#include "debug/SimpleDisk.hh"
+#include "debug/SimpleDiskData.hh"
#include "dev/disk_image.hh"
#include "dev/simple_disk.hh"
#include "mem/port.hh"
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 9141b629c..1c7e1694a 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -39,6 +39,7 @@
#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "cpu/thread_context.hh"
+#include "debug/EthernetAll.hh"
#include "dev/etherlink.hh"
#include "dev/sinic.hh"
#include "mem/packet.hh"
diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc
index 9bf8eca15..748a08c81 100644
--- a/src/dev/sparc/iob.cc
+++ b/src/dev/sparc/iob.cc
@@ -42,6 +42,7 @@
#include "base/bitfield.hh"
#include "base/trace.hh"
#include "cpu/intr_control.hh"
+#include "debug/Iob.hh"
#include "dev/sparc/iob.hh"
#include "dev/platform.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/sparc/mm_disk.cc b/src/dev/sparc/mm_disk.cc
index f9a91eded..b86905387 100644
--- a/src/dev/sparc/mm_disk.cc
+++ b/src/dev/sparc/mm_disk.cc
@@ -36,6 +36,7 @@
#include <cstring>
#include "base/trace.hh"
+#include "debug/IdeDisk.hh"
#include "dev/sparc/mm_disk.hh"
#include "dev/platform.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/terminal.cc b/src/dev/terminal.cc
index 637061082..bae4c9194 100644
--- a/src/dev/terminal.cc
+++ b/src/dev/terminal.cc
@@ -50,6 +50,8 @@
#include "base/output.hh"
#include "base/socket.hh"
#include "base/trace.hh"
+#include "debug/Terminal.hh"
+#include "debug/TerminalVerbose.hh"
#include "dev/platform.hh"
#include "dev/terminal.hh"
#include "dev/uart.hh"
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index f33a428f7..877e9fb47 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -39,6 +39,7 @@
#include "base/str.hh" // for to_number
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/Uart.hh"
#include "dev/platform.hh"
#include "dev/terminal.hh"
#include "dev/uart8250.hh"
diff --git a/src/dev/x86/cmos.cc b/src/dev/x86/cmos.cc
index aa92521dc..d7107deb7 100644
--- a/src/dev/x86/cmos.cc
+++ b/src/dev/x86/cmos.cc
@@ -28,6 +28,7 @@
* Authors: Gabe Black
*/
+#include "debug/CMOS.hh"
#include "dev/x86/cmos.hh"
#include "dev/x86/intdev.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/x86/i8042.cc b/src/dev/x86/i8042.cc
index fb1412615..a0786c95c 100644
--- a/src/dev/x86/i8042.cc
+++ b/src/dev/x86/i8042.cc
@@ -29,6 +29,7 @@
*/
#include "base/bitunion.hh"
+#include "debug/I8042.hh"
#include "dev/x86/i8042.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc
index 90c6a0900..584090a9e 100644
--- a/src/dev/x86/i82094aa.cc
+++ b/src/dev/x86/i82094aa.cc
@@ -30,6 +30,7 @@
#include "arch/x86/interrupts.hh"
#include "arch/x86/intmessage.hh"
+#include "debug/I82094AA.hh"
#include "dev/x86/i82094aa.hh"
#include "dev/x86/i8259.hh"
#include "mem/packet.hh"
diff --git a/src/dev/x86/i8254.cc b/src/dev/x86/i8254.cc
index dd1ff7c5e..f6af34a65 100644
--- a/src/dev/x86/i8254.cc
+++ b/src/dev/x86/i8254.cc
@@ -28,6 +28,7 @@
* Authors: Gabe Black
*/
+#include "debug/I8254.hh"
#include "dev/x86/i8254.hh"
#include "dev/x86/intdev.hh"
#include "mem/packet.hh"
diff --git a/src/dev/x86/i8259.cc b/src/dev/x86/i8259.cc
index 651196b47..4e8c10181 100644
--- a/src/dev/x86/i8259.cc
+++ b/src/dev/x86/i8259.cc
@@ -29,6 +29,7 @@
*/
#include "base/bitfield.hh"
+#include "debug/I8259.hh"
#include "dev/x86/i82094aa.hh"
#include "dev/x86/i8259.hh"
#include "mem/packet.hh"
diff --git a/src/dev/x86/speaker.cc b/src/dev/x86/speaker.cc
index b0f4dcd8b..70f52dd1a 100644
--- a/src/dev/x86/speaker.cc
+++ b/src/dev/x86/speaker.cc
@@ -30,6 +30,7 @@
#include "base/bitunion.hh"
#include "base/trace.hh"
+#include "debug/PcSpeaker.hh"
#include "dev/x86/i8254.hh"
#include "dev/x86/speaker.hh"
#include "mem/packet.hh"
diff --git a/src/kern/linux/events.cc b/src/kern/linux/events.cc
index 2133172e2..c8b53d848 100644
--- a/src/kern/linux/events.cc
+++ b/src/kern/linux/events.cc
@@ -46,6 +46,7 @@
#include "arch/utility.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "debug/DebugPrintf.hh"
#include "kern/linux/events.hh"
#include "kern/linux/printk.hh"
#include "kern/system_events.hh"
diff --git a/src/kern/linux/linux.cc b/src/kern/linux/linux.cc
index 72f1832b8..62c25e2df 100644
--- a/src/kern/linux/linux.cc
+++ b/src/kern/linux/linux.cc
@@ -32,6 +32,7 @@
#include <string>
#include "cpu/thread_context.hh"
+#include "debug/SyscallVerbose.hh"
#include "kern/linux/linux.hh"
#include "sim/process.hh"
#include "sim/system.hh"
diff --git a/src/kern/system_events.cc b/src/kern/system_events.cc
index 612aabc0b..3ee7a099a 100644
--- a/src/kern/system_events.cc
+++ b/src/kern/system_events.cc
@@ -34,6 +34,7 @@
#include "base/trace.hh"
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
+#include "debug/PCEvent.hh"
#include "kern/system_events.hh"
using namespace TheISA;
diff --git a/src/kern/tru64/tru64.hh b/src/kern/tru64/tru64.hh
index 7e7fedbc3..09cbb166d 100644
--- a/src/kern/tru64/tru64.hh
+++ b/src/kern/tru64/tru64.hh
@@ -61,6 +61,7 @@ class Tru64 {};
#include "arch/alpha/registers.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
+#include "debug/SyscallVerbose.hh"
#include "sim/core.hh"
#include "sim/syscall_emul.hh"
diff --git a/src/kern/tru64/tru64_events.cc b/src/kern/tru64/tru64_events.cc
index 7b8cf0db9..216f81b86 100644
--- a/src/kern/tru64/tru64_events.cc
+++ b/src/kern/tru64/tru64_events.cc
@@ -34,6 +34,9 @@
#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/BADADDR.hh"
+#include "debug/DebugPrintf.hh"
+#include "debug/Printf.hh"
#include "kern/tru64/dump_mbuf.hh"
#include "kern/tru64/printf.hh"
#include "kern/tru64/tru64_events.hh"
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 4b8325088..9e5e64069 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -39,6 +39,7 @@
#include "base/range_ops.hh"
#include "base/trace.hh"
+#include "debug/BusBridge.hh"
#include "mem/bridge.hh"
#include "params/Bridge.hh"
diff --git a/src/mem/bus.cc b/src/mem/bus.cc
index c84d9fc5e..69b14547e 100644
--- a/src/mem/bus.cc
+++ b/src/mem/bus.cc
@@ -38,6 +38,9 @@
#include "base/misc.hh"
#include "base/trace.hh"
+#include "debug/Bus.hh"
+#include "debug/BusAddrRanges.hh"
+#include "debug/MMU.hh"
#include "mem/bus.hh"
Bus::Bus(const BusParams *p)
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index b7e331d54..7863edde0 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -35,6 +35,7 @@
#include "cpu/base.hh"
#include "cpu/smt.hh"
+#include "debug/Cache.hh"
#include "mem/cache/base.hh"
#include "mem/cache/mshr.hh"
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index d1ddedbd4..297692b32 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -48,6 +48,8 @@
#include "base/trace.hh"
#include "base/types.hh"
#include "config/full_system.hh"
+#include "debug/Cache.hh"
+#include "debug/CachePort.hh"
#include "mem/cache/mshr_queue.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 5fb95fc06..d4a969d9b 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -54,6 +54,8 @@
#include "base/misc.hh"
#include "base/range.hh"
#include "base/types.hh"
+#include "debug/Cache.hh"
+#include "debug/CachePort.hh"
#include "mem/cache/prefetch/base.hh"
#include "mem/cache/blk.hh"
#include "mem/cache/cache.hh"
diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc
index 292c11c6b..821a3635b 100644
--- a/src/mem/cache/mshr.cc
+++ b/src/mem/cache/mshr.cc
@@ -42,6 +42,7 @@
#include "base/misc.hh"
#include "base/types.hh"
+#include "debug/Cache.hh"
#include "mem/cache/cache.hh"
#include "mem/cache/mshr.hh"
#include "sim/core.hh"
diff --git a/src/mem/cache/prefetch/base.cc b/src/mem/cache/prefetch/base.cc
index c81f02933..12028ac52 100644
--- a/src/mem/cache/prefetch/base.cc
+++ b/src/mem/cache/prefetch/base.cc
@@ -38,6 +38,7 @@
#include "arch/isa_traits.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/HWPrefetch.hh"
#include "mem/cache/prefetch/base.hh"
#include "mem/cache/base.hh"
#include "mem/request.hh"
diff --git a/src/mem/cache/prefetch/ghb.cc b/src/mem/cache/prefetch/ghb.cc
index f8f7de1db..dbc565bfd 100644
--- a/src/mem/cache/prefetch/ghb.cc
+++ b/src/mem/cache/prefetch/ghb.cc
@@ -35,6 +35,7 @@
*/
#include "base/trace.hh"
+#include "debug/HWPrefetch.hh"
#include "mem/cache/prefetch/ghb.hh"
void
diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc
index 8af4e615e..f71fd977d 100644
--- a/src/mem/cache/prefetch/stride.cc
+++ b/src/mem/cache/prefetch/stride.cc
@@ -35,6 +35,7 @@
*/
#include "base/trace.hh"
+#include "debug/HWPrefetch.hh"
#include "mem/cache/prefetch/stride.hh"
void
diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc
index d0e97de02..113ad8b4d 100644
--- a/src/mem/cache/tags/iic.cc
+++ b/src/mem/cache/tags/iic.cc
@@ -40,6 +40,9 @@
#include "base/intmath.hh"
#include "base/trace.hh"
+#include "debug/Cache.hh"
+#include "debug/IIC.hh"
+#include "debug/IICMore.hh"
#include "mem/cache/tags/iic.hh"
#include "mem/cache/base.hh"
#include "sim/core.hh"
diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc
index 33517a5f5..33f0f14a9 100644
--- a/src/mem/cache/tags/lru.cc
+++ b/src/mem/cache/tags/lru.cc
@@ -36,6 +36,7 @@
#include <string>
#include "base/intmath.hh"
+#include "debug/CacheRepl.hh"
#include "mem/cache/tags/cacheset.hh"
#include "mem/cache/tags/lru.hh"
#include "mem/cache/base.hh"
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index 861c4a805..a94d92480 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -42,6 +42,7 @@
#include "base/intmath.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/MMU.hh"
#include "mem/page_table.hh"
#include "sim/faults.hh"
#include "sim/process.hh"
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index fa9ec7e23..84af4c752 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -61,6 +61,8 @@
#include "base/types.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
+#include "debug/LLSC.hh"
+#include "debug/MemoryAccess.hh"
#include "mem/packet_access.hh"
#include "mem/physical.hh"
#include "sim/eventq.hh"
diff --git a/src/mem/port.cc b/src/mem/port.cc
index 4d44d486d..c87785a49 100644
--- a/src/mem/port.cc
+++ b/src/mem/port.cc
@@ -36,6 +36,7 @@
#include "base/chunk_generator.hh"
#include "base/trace.hh"
+#include "debug/Config.hh"
#include "mem/mem_object.hh"
#include "mem/port.hh"
diff --git a/src/mem/ruby/buffers/MessageBuffer.cc b/src/mem/ruby/buffers/MessageBuffer.cc
index 4c4db5dc3..e5df19cab 100644
--- a/src/mem/ruby/buffers/MessageBuffer.cc
+++ b/src/mem/ruby/buffers/MessageBuffer.cc
@@ -31,6 +31,7 @@
#include "base/cprintf.hh"
#include "base/misc.hh"
#include "base/stl_helpers.hh"
+#include "debug/RubyQueue.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/system/System.hh"
diff --git a/src/mem/ruby/common/NetDest.hh b/src/mem/ruby/common/NetDest.hh
index b5c571577..8006045d8 100644
--- a/src/mem/ruby/common/NetDest.hh
+++ b/src/mem/ruby/common/NetDest.hh
@@ -37,6 +37,7 @@
#include <iostream>
#include <vector>
+#include "debug/RubyMemory.hh"
#include "mem/protocol/MachineType.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/Set.hh"
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
index d7f275fc2..71fefa264 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc
@@ -32,6 +32,7 @@
#include <cmath>
#include "base/stl_helpers.hh"
+#include "debug/RubyNetwork.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc
index 62510a45c..c656b43cc 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc
@@ -29,6 +29,7 @@
*/
#include "base/stl_helpers.hh"
+#include "debug/RubyNetwork.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh"
diff --git a/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc b/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc
index c4c804206..de51a7284 100644
--- a/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc
+++ b/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc
@@ -32,6 +32,7 @@
#include <cmath>
#include "base/stl_helpers.hh"
+#include "debug/RubyNetwork.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh"
diff --git a/src/mem/ruby/network/garnet/flexible-pipeline/Router.cc b/src/mem/ruby/network/garnet/flexible-pipeline/Router.cc
index d7d242b96..31ecf96f9 100644
--- a/src/mem/ruby/network/garnet/flexible-pipeline/Router.cc
+++ b/src/mem/ruby/network/garnet/flexible-pipeline/Router.cc
@@ -29,6 +29,7 @@
*/
#include "base/stl_helpers.hh"
+#include "debug/RubyNetwork.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/InVcState.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/OutVcState.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/Router.hh"
diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc
index 52c9eaa87..a054cee89 100644
--- a/src/mem/ruby/network/simple/PerfectSwitch.cc
+++ b/src/mem/ruby/network/simple/PerfectSwitch.cc
@@ -28,6 +28,7 @@
#include <algorithm>
+#include "debug/RubyNetwork.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/network/simple/PerfectSwitch.hh"
diff --git a/src/mem/ruby/network/simple/Throttle.cc b/src/mem/ruby/network/simple/Throttle.cc
index 0274a9771..905a7aa28 100644
--- a/src/mem/ruby/network/simple/Throttle.cc
+++ b/src/mem/ruby/network/simple/Throttle.cc
@@ -29,6 +29,7 @@
#include <cassert>
#include "base/cprintf.hh"
+#include "debug/RubyNetwork.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/network/simple/Throttle.hh"
diff --git a/src/mem/ruby/network/simple/Topology.cc b/src/mem/ruby/network/simple/Topology.cc
index a06c1578d..95f94e9e8 100644
--- a/src/mem/ruby/network/simple/Topology.cc
+++ b/src/mem/ruby/network/simple/Topology.cc
@@ -28,6 +28,7 @@
#include <cassert>
+#include "debug/RubyNetwork.hh"
#include "mem/protocol/MachineType.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/protocol/TopologyType.hh"
diff --git a/src/mem/ruby/system/CacheMemory.cc b/src/mem/ruby/system/CacheMemory.cc
index 192fa8c87..c22572cc3 100644
--- a/src/mem/ruby/system/CacheMemory.cc
+++ b/src/mem/ruby/system/CacheMemory.cc
@@ -27,6 +27,7 @@
*/
#include "base/intmath.hh"
+#include "debug/RubyCache.hh"
#include "mem/ruby/system/CacheMemory.hh"
using namespace std;
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc
index 2889c0c57..f8e4cf810 100644
--- a/src/mem/ruby/system/DMASequencer.cc
+++ b/src/mem/ruby/system/DMASequencer.cc
@@ -26,6 +26,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "debug/RubyDma.hh"
#include "mem/protocol/SequencerMsg.hh"
#include "mem/protocol/SequencerRequestType.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
diff --git a/src/mem/ruby/system/DirectoryMemory.cc b/src/mem/ruby/system/DirectoryMemory.cc
index c9d072c38..fe54c8d79 100644
--- a/src/mem/ruby/system/DirectoryMemory.cc
+++ b/src/mem/ruby/system/DirectoryMemory.cc
@@ -27,6 +27,7 @@
*/
#include "base/intmath.hh"
+#include "debug/RubyCache.hh"
#include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
#include "mem/ruby/system/DirectoryMemory.hh"
#include "mem/ruby/system/System.hh"
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 354634358..40f893257 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -31,6 +31,8 @@
#include "arch/x86/insts/microldstop.hh"
#endif // X86_ISA
#include "cpu/testers/rubytest/RubyTester.hh"
+#include "debug/MemoryAccess.hh"
+#include "debug/Ruby.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
#include "mem/ruby/system/RubyPort.hh"
#include "mem/physical.hh"
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index db30b179f..e260ce865 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -29,6 +29,8 @@
#include "base/misc.hh"
#include "base/str.hh"
#include "cpu/testers/rubytest/RubyTester.hh"
+#include "debug/MemoryAccess.hh"
+#include "debug/ProtocolTrace.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/common/Global.hh"
diff --git a/src/mem/ruby/system/SparseMemory.cc b/src/mem/ruby/system/SparseMemory.cc
index 51d33798d..fd90e2214 100644
--- a/src/mem/ruby/system/SparseMemory.cc
+++ b/src/mem/ruby/system/SparseMemory.cc
@@ -26,6 +26,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "debug/RubyCache.hh"
#include "mem/ruby/system/SparseMemory.hh"
#include "mem/ruby/system/System.hh"
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index d1be10769..b1b185ca2 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -417,6 +417,8 @@ void unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr);
#include <string>
#include "base/cprintf.hh"
+#include "debug/RubyGenerated.hh"
+#include "debug/RubySlicc.hh"
#include "mem/protocol/${ident}_Controller.hh"
#include "mem/protocol/${ident}_Event.hh"
#include "mem/protocol/${ident}_State.hh"
@@ -968,6 +970,7 @@ $c_ident::${{action.ident}}(const Address& addr)
#include <cassert>
#include "base/misc.hh"
+#include "debug/RubySlicc.hh"
#include "mem/protocol/${ident}_Controller.hh"
#include "mem/protocol/${ident}_Event.hh"
#include "mem/protocol/${ident}_State.hh"
@@ -1037,6 +1040,8 @@ ${ident}_Controller::wakeup()
#include "base/misc.hh"
#include "base/trace.hh"
+#include "debug/ProtocolTrace.hh"
+#include "debug/RubyGenerated.hh"
#include "mem/protocol/${ident}_Controller.hh"
#include "mem/protocol/${ident}_Event.hh"
#include "mem/protocol/${ident}_State.hh"
diff --git a/src/mem/tport.cc b/src/mem/tport.cc
index 61f9e143c..8e02215f2 100644
--- a/src/mem/tport.cc
+++ b/src/mem/tport.cc
@@ -28,6 +28,7 @@
* Authors: Ali Saidi
*/
+#include "debug/Bus.hh"
#include "mem/tport.hh"
using namespace std;
diff --git a/src/python/m5/debug.py b/src/python/m5/debug.py
index cd40b8fa3..8231126a0 100644
--- a/src/python/m5/debug.py
+++ b/src/python/m5/debug.py
@@ -29,3 +29,65 @@
import internal
from internal.debug import schedBreakCycle, setRemoteGDBPort
+
+def help():
+ print "Base Flags:"
+ for flag in flags.basic:
+ print " %s: %s" % (flag, flags.descriptions[flag])
+ print
+ print "Compound Flags:"
+ for flag in flags.compound:
+ if flag == 'All':
+ continue
+ print " %s: %s" % (flag, flags.descriptions[flag])
+ util.printList(flags.compoundMap[flag], indent=8)
+ print
+
+class AllFlags(object):
+ def __init__(self):
+ self._version = -1
+ self._dict = {}
+
+ def _update(self):
+ current_version = internal.debug.getAllFlagsVersion()
+ if self._version == current_version:
+ return
+
+ self._dict.clear()
+ for flag in internal.debug.getAllFlags():
+ self._dict[flag.name()] = flag
+ self._version = current_version
+
+ def __contains__(self, item):
+ self._update()
+ return item in self._dict
+
+ def __getitem__(self, item):
+ self._update()
+ return self._dict[item]
+
+ def keys(self):
+ self._update()
+ return self._dict.keys()
+
+ def values(self):
+ self._update()
+ return self._dict.values()
+
+ def items(self):
+ self._update()
+ return self._dict.items()
+
+ def iterkeys(self):
+ self._update()
+ return self._dict.iterkeys()
+
+ def itervalues(self):
+ self._update()
+ return self._dict.itervalues()
+
+ def iteritems(self):
+ self._update()
+ return self._dict.iteritems()
+
+flags = AllFlags()
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index f932ec63a..adf42fc96 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -98,15 +98,15 @@ add_option("--dump-config", metavar="FILE", default="config.ini",
set_group("Debugging Options")
add_option("--debug-break", metavar="TIME[,TIME]", action='append', split=',',
help="Cycle to create a breakpoint")
+add_option("--debug-help", action='store_true',
+ help="Print help on debug flags")
+add_option("--debug-flags", metavar="FLAG[,FLAG]", action='append', split=',',
+ help="Sets the flags for debugging (-FLAG disables a flag)")
add_option("--remote-gdb-port", type='int', default=7000,
help="Remote gdb base port (set to 0 to disable listening)")
# Tracing options
set_group("Trace Options")
-add_option("--trace-help", action='store_true',
- help="Print help on trace flags")
-add_option("--trace-flags", metavar="FLAG[,FLAG]", action='append', split=',',
- help="Sets the flags for tracing (-FLAG disables a flag)")
add_option("--trace-start", metavar="TIME", type='int',
help="Start tracing at TIME (must be in ticks)")
add_option("--trace-file", metavar="FILE", default="cout",
@@ -214,10 +214,10 @@ def main():
print info.README
print
- if options.trace_help:
+ if options.debug_help:
done = True
check_tracing()
- trace.help()
+ debug.help()
if options.list_sim_objects:
import SimObject
@@ -284,30 +284,25 @@ def main():
for when in options.debug_break:
debug.schedBreakCycle(int(when))
- if options.trace_flags:
+ if options.debug_flags:
check_tracing()
on_flags = []
off_flags = []
- for flag in options.trace_flags:
+ for flag in options.debug_flags:
off = False
if flag.startswith('-'):
flag = flag[1:]
off = True
- if flag not in trace.flags.all and flag != "All":
- print >>sys.stderr, "invalid trace flag '%s'" % flag
+
+ if flag not in debug.flags:
+ print >>sys.stderr, "invalid debug flag '%s'" % flag
sys.exit(1)
if off:
- off_flags.append(flag)
+ debug.flags[flag].disable()
else:
- on_flags.append(flag)
-
- for flag in on_flags:
- trace.set(flag)
-
- for flag in off_flags:
- trace.clear(flag)
+ debug.flags[flag].enable()
if options.trace_start:
check_tracing()
diff --git a/src/python/m5/trace.py b/src/python/m5/trace.py
index db239040a..f34444810 100644
--- a/src/python/m5/trace.py
+++ b/src/python/m5/trace.py
@@ -27,26 +27,12 @@
# Authors: Nathan Binkert
import internal
-import traceflags as flags
import util
-from internal.trace import clear, output, set, ignore
+from internal.trace import output, ignore
def disable():
internal.trace.cvar.enabled = False
def enable():
internal.trace.cvar.enabled = True
-
-def help():
- print "Base Flags:"
- for flag in flags.basic:
- print " %s: %s" % (flag, flags.descriptions[flag])
- print
- print "Compound Flags:"
- for flag in flags.compound:
- if flag == 'All':
- continue
- print " %s: %s" % (flag, flags.descriptions[flag])
- util.printList(flags.compoundMap[flag], indent=8)
- print
diff --git a/src/python/swig/debug.i b/src/python/swig/debug.i
index 8486075d3..c2eb3ed80 100644
--- a/src/python/swig/debug.i
+++ b/src/python/swig/debug.i
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2006 The Regents of The University of Michigan
+ * Copyright (c) 2010 The Hewlett-Packard Development Company
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -31,11 +32,62 @@
%module(package="m5.internal") debug
%{
+#include <cassert>
+#include <map>
+#include <string>
+#include <vector>
+
+#include "base/debug.hh"
#include "base/types.hh"
#include "sim/debug.hh"
+
+using namespace std;
+
+typedef map<string, Debug::Flag *> FlagsMap;
+typedef vector<Debug::Flag *> FlagsVec;
+
+namespace Debug {
+extern int allFlagsVersion;
+FlagsMap &allFlags();
+}
+
+inline int
+getAllFlagsVersion()
+{
+ return Debug::allFlagsVersion;
+}
+
+inline FlagsVec
+getAllFlags()
+{
+ FlagsMap &flagsMap = Debug::allFlags();
+
+ FlagsVec flags(flagsMap.size());
+
+ int index = 0;
+ FlagsMap::iterator i = flagsMap.begin();
+ FlagsMap::iterator end = flagsMap.end();
+ for (; i != end; ++i) {
+ assert(index < flags.size());
+ flags[index++] = i->second;
+ }
+
+ return flags;
+}
+
%}
+%ignore Debug::SimpleFlag::operator!;
+
+%include <std_string.i>
+%include <std_vector.i>
%include <stdint.i>
+%include "base/debug.hh"
%include "base/types.hh"
%include "sim/debug.hh"
+
+%template(AllFlags) std::vector<Debug::Flag *>;
+
+int getAllFlagsVersion();
+std::vector<Debug::Flag *> getAllFlags();
diff --git a/src/python/swig/trace.i b/src/python/swig/trace.i
index 5407b687f..3b049a3d6 100644
--- a/src/python/swig/trace.i
+++ b/src/python/swig/trace.i
@@ -41,18 +41,6 @@ output(const char *filename)
}
inline void
-set(const char *flag)
-{
- Trace::changeFlag(flag, true);
-}
-
-inline void
-clear(const char *flag)
-{
- Trace::changeFlag(flag, false);
-}
-
-inline void
ignore(const char *expr)
{
Trace::ignore.setExpression(expr);
@@ -61,10 +49,6 @@ ignore(const char *expr)
using Trace::enabled;
%}
-%inline %{
extern void output(const char *string);
-extern void set(const char *string);
-extern void clear(const char *string);
extern void ignore(const char *expr);
extern bool enabled;
-%}
diff --git a/src/sim/eventq.cc b/src/sim/eventq.cc
index 71036fe7e..78524fe51 100644
--- a/src/sim/eventq.cc
+++ b/src/sim/eventq.cc
@@ -40,6 +40,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "cpu/smt.hh"
+#include "debug/Config.hh"
#include "sim/core.hh"
#include "sim/eventq.hh"
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index 8fbd1b2b1..fcfa119c4 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -47,6 +47,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "debug/Event.hh"
#include "sim/serialize.hh"
class EventQueue; // forward declaration
diff --git a/src/sim/faults.cc b/src/sim/faults.cc
index adf6b2466..8e9b8e094 100644
--- a/src/sim/faults.cc
+++ b/src/sim/faults.cc
@@ -33,6 +33,7 @@
#include "base/misc.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/Fault.hh"
#include "mem/page_table.hh"
#include "sim/faults.hh"
#include "sim/process.hh"
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 3b78cc1ee..eba7273c3 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -54,6 +54,9 @@
#include "cpu/base.hh"
#include "cpu/quiesce_event.hh"
#include "cpu/thread_context.hh"
+#include "debug/Loader.hh"
+#include "debug/Quiesce.hh"
+#include "debug/WorkItems.hh"
#include "params/BaseCPU.hh"
#include "sim/pseudo_inst.hh"
#include "sim/serialize.hh"
diff --git a/src/sim/root.cc b/src/sim/root.cc
index d51fcbda6..1102e6a3a 100644
--- a/src/sim/root.cc
+++ b/src/sim/root.cc
@@ -32,6 +32,7 @@
*/
#include "base/misc.hh"
+#include "debug/TimeSync.hh"
#include "sim/root.hh"
Root *Root::_root = NULL;
diff --git a/src/sim/sim_object.cc b/src/sim/sim_object.cc
index 7a7b83b25..8919f3e72 100644
--- a/src/sim/sim_object.cc
+++ b/src/sim/sim_object.cc
@@ -38,6 +38,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "debug/Config.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index 76fa8a239..6873d4aa4 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -42,6 +42,7 @@
#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/SyscallVerbose.hh"
#include "mem/page_table.hh"
#include "sim/process.hh"
#include "sim/sim_exit.hh"
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index 06fadf516..e685a0f30 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -60,6 +60,7 @@
#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "debug/SyscallVerbose.hh"
#include "mem/page_table.hh"
#include "mem/translating_port.hh"
#include "sim/byteswap.hh"
diff --git a/src/sim/system.cc b/src/sim/system.cc
index e710bc5e8..bb8eccf14 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -42,6 +42,7 @@
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
+#include "debug/Loader.hh"
#include "mem/mem_object.hh"
#include "mem/physical.hh"
#include "sim/byteswap.hh"