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authorDavid Hashe <david.hashe@amd.com>2015-07-20 09:15:18 -0500
committerDavid Hashe <david.hashe@amd.com>2015-07-20 09:15:18 -0500
commit7e9562013b1592c5cc402c43ee1d21025f375a71 (patch)
tree3e14882024790d898404eb246d37fa51051c4f8f /src
parent7e00772bda1a1c74fe659c56fea803642302c1da (diff)
downloadgem5-7e9562013b1592c5cc402c43ee1d21025f375a71.tar.xz
ruby: allocate a block in CacheMemory without updating LRU state
Diffstat (limited to 'src')
-rw-r--r--src/mem/protocol/RubySlicc_Types.sm1
-rw-r--r--src/mem/ruby/structures/CacheMemory.cc6
-rw-r--r--src/mem/ruby/structures/CacheMemory.hh10
3 files changed, 13 insertions, 4 deletions
diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm
index 51f99b603..6c3c4168d 100644
--- a/src/mem/protocol/RubySlicc_Types.sm
+++ b/src/mem/protocol/RubySlicc_Types.sm
@@ -146,6 +146,7 @@ structure (CacheMemory, external = "yes") {
bool cacheAvail(Address);
Address cacheProbe(Address);
AbstractCacheEntry allocate(Address, AbstractCacheEntry);
+ AbstractCacheEntry allocate(Address, AbstractCacheEntry, bool);
void allocateVoid(Address, AbstractCacheEntry);
void deallocate(Address);
AbstractCacheEntry lookup(Address);
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index 486b5ae97..c802d8fb6 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -251,7 +251,7 @@ CacheMemory::cacheAvail(const Address& address) const
}
AbstractCacheEntry*
-CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry)
+CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry, bool touch)
{
assert(address == line_address(address));
assert(!isTagPresent(address));
@@ -271,7 +271,9 @@ CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry)
set[i]->m_locked = -1;
m_tag_index[address] = i;
- m_replacementPolicy_ptr->touch(cacheSet, i, curTick());
+ if (touch) {
+ m_replacementPolicy_ptr->touch(cacheSet, i, curTick());
+ }
return entry;
}
diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
index 82bb65776..c9c20d8b8 100644
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -74,10 +74,16 @@ class CacheMemory : public SimObject
bool cacheAvail(const Address& address) const;
// find an unused entry and sets the tag appropriate for the address
- AbstractCacheEntry* allocate(const Address& address, AbstractCacheEntry* new_entry);
+ AbstractCacheEntry* allocate(const Address& address,
+ AbstractCacheEntry* new_entry, bool touch);
+ AbstractCacheEntry* allocate(const Address& address,
+ AbstractCacheEntry* new_entry)
+ {
+ return allocate(address, new_entry, true);
+ }
void allocateVoid(const Address& address, AbstractCacheEntry* new_entry)
{
- allocate(address, new_entry);
+ allocate(address, new_entry, true);
}
// Explicitly free up this address