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author | Gabe Black <gblack@eecs.umich.edu> | 2011-08-14 04:08:14 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-08-14 04:08:14 -0700 |
commit | ec204f003cfc79fb0da6fe1e6121c4a9bc18c781 (patch) | |
tree | 0dace96c76ab2cf8777ab64f8ca98a90d76a5a83 /src | |
parent | a81d4a8fcd603f3ef61aadb4ca581f4f1ffff087 (diff) | |
download | gem5-ec204f003cfc79fb0da6fe1e6121c4a9bc18c781.tar.xz |
O3: Add a pointer to the macroop for a microop in the dyninst.
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/base_dyn_inst.hh | 8 | ||||
-rw-r--r-- | src/cpu/base_dyn_inst_impl.hh | 8 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst_impl.hh | 8 | ||||
-rw-r--r-- | src/cpu/o3/fetch_impl.hh | 2 |
5 files changed, 18 insertions, 12 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index cb9294481..a3d18bb24 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -103,6 +103,7 @@ class BaseDynInst : public FastAlloc, public RefCounted /** The StaticInst used by this BaseDynInst. */ StaticInstPtr staticInst; + StaticInstPtr macroop; //////////////////////////////////////////// // @@ -378,13 +379,14 @@ class BaseDynInst : public FastAlloc, public RefCounted * @param seq_num The sequence number of the instruction. * @param cpu Pointer to the instruction's CPU. */ - BaseDynInst(StaticInstPtr staticInst, TheISA::PCState pc, - TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu); + BaseDynInst(StaticInstPtr staticInst, StaticInstPtr macroop, + TheISA::PCState pc, TheISA::PCState predPC, + InstSeqNum seq_num, ImplCPU *cpu); /** BaseDynInst constructor given a StaticInst pointer. * @param _staticInst The StaticInst for this BaseDynInst. */ - BaseDynInst(StaticInstPtr &_staticInst); + BaseDynInst(StaticInstPtr staticInst, StaticInstPtr macroop); /** BaseDynInst destructor. */ ~BaseDynInst(); diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh index bae047912..b2819bb26 100644 --- a/src/cpu/base_dyn_inst_impl.hh +++ b/src/cpu/base_dyn_inst_impl.hh @@ -76,9 +76,10 @@ my_hash_t thishash; template <class Impl> BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst, + StaticInstPtr _macroop, TheISA::PCState _pc, TheISA::PCState _predPC, InstSeqNum seq_num, ImplCPU *cpu) - : staticInst(_staticInst), traceData(NULL), cpu(cpu) + : staticInst(_staticInst), macroop(_macroop), traceData(NULL), cpu(cpu) { seqNum = seq_num; @@ -90,8 +91,9 @@ BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst, } template <class Impl> -BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst) - : staticInst(_staticInst), traceData(NULL) +BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst, + StaticInstPtr _macroop) + : staticInst(_staticInst), macroop(_macroop), traceData(NULL) { seqNum = 0; initVars(); diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index dc2d32eac..399240d69 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -86,12 +86,12 @@ class BaseO3DynInst : public BaseDynInst<Impl> public: /** BaseDynInst constructor given a binary instruction. */ - BaseO3DynInst(StaticInstPtr staticInst, + BaseO3DynInst(StaticInstPtr staticInst, StaticInstPtr macroop, TheISA::PCState pc, TheISA::PCState predPC, InstSeqNum seq_num, O3CPU *cpu); /** BaseDynInst constructor given a static inst pointer. */ - BaseO3DynInst(StaticInstPtr &_staticInst); + BaseO3DynInst(StaticInstPtr _staticInst, StaticInstPtr _macroop); /** Executes the instruction.*/ Fault execute(); diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh index 44b353253..eceb0b49f 100644 --- a/src/cpu/o3/dyn_inst_impl.hh +++ b/src/cpu/o3/dyn_inst_impl.hh @@ -45,16 +45,18 @@ template <class Impl> BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst, + StaticInstPtr macroop, TheISA::PCState pc, TheISA::PCState predPC, InstSeqNum seq_num, O3CPU *cpu) - : BaseDynInst<Impl>(staticInst, pc, predPC, seq_num, cpu) + : BaseDynInst<Impl>(staticInst, macroop, pc, predPC, seq_num, cpu) { initVars(); } template <class Impl> -BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr &_staticInst) - : BaseDynInst<Impl>(_staticInst) +BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr _staticInst, + StaticInstPtr _macroop) + : BaseDynInst<Impl>(_staticInst, _macroop) { initVars(); } diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index d186768d8..c635a1b30 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -1097,7 +1097,7 @@ DefaultFetch<Impl>::buildInst(ThreadID tid, StaticInstPtr staticInst, // Create a new DynInst from the instruction fetched. DynInstPtr instruction = - new DynInst(staticInst, thisPC, nextPC, seq, cpu); + new DynInst(staticInst, curMacroop, thisPC, nextPC, seq, cpu); instruction->setTid(tid); instruction->setASID(tid); |