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authorGabe Black <gblack@eecs.umich.edu>2009-04-19 04:13:45 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-19 04:13:45 -0700
commit829e424353b4a51acd3c0211ef7108e3883d971a (patch)
tree4009b71f203ad92f82f0a34541acbe9534447207 /src
parent8b2ac2075361b6322191dc594fe64efdcb637b61 (diff)
downloadgem5-829e424353b4a51acd3c0211ef7108e3883d971a.tar.xz
X86: Fix the ordering of the vendor string reported by CPUID.
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/cpuid.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc
index 4ac7a5d19..cbd1defee 100644
--- a/src/arch/x86/cpuid.cc
+++ b/src/arch/x86/cpuid.cc
@@ -113,8 +113,8 @@ namespace X86ISA {
result = CpuidResult(
stringToRegister(cleanName + offset + 0),
stringToRegister(cleanName + offset + 4),
- stringToRegister(cleanName + offset + 8),
- stringToRegister(cleanName + offset + 12));
+ stringToRegister(cleanName + offset + 12),
+ stringToRegister(cleanName + offset + 8));
}
break;
case L1CacheAndTLB: