dev: Add support for i2c devices

This patch adds an I2C bus and base device. I2C is used to connect a
variety of sensors, and this patch serves as a starting point to
enable a range of I2C devices.

5 files changed, 544 insertions, 0 deletions

diff --git a/src/dev/I2C.py b/src/dev/I2C.py
new file mode 100644
index 000000000..2ac463fbc
--- /dev/null
+++ b/src/dev/I2C.py
@@ -0,0 +1,51 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Peter Enns
+
+from m5.SimObject import SimObject
+from m5.params import *
+from Device import BasicPioDevice
+
+class I2CDevice(SimObject):
+    type = 'I2CDevice'
+    cxx_header = "dev/i2cdev.hh"
+    abstract = True
+    i2c_addr = Param.UInt8("Address of device on i2c bus")
+
+class I2CBus(BasicPioDevice):
+    type = 'I2CBus'
+    cxx_header = "dev/i2cbus.hh"
+    devices = VectorParam.I2CDevice([], "Devices")
diff --git a/src/dev/SConscript b/src/dev/SConscript
index 8596c2f74..416e5052f 100644
--- a/src/dev/SConscript
+++ b/src/dev/SConscript
@@ -43,6 +43,7 @@ SimObject('BadDevice.py')
 SimObject('CopyEngine.py')
 SimObject('DiskImage.py')
 SimObject('Ethernet.py')
+SimObject('I2C.py')
 SimObject('Ide.py')
 SimObject('Pci.py')
 SimObject('Platform.py')
@@ -61,6 +62,7 @@ Source('etherint.cc')
 Source('etherlink.cc')
 Source('etherpkt.cc')
 Source('ethertap.cc')
+Source('i2cbus.cc')
 Source('i8254xGBe.cc')
 Source('ide_ctrl.cc')
 Source('ide_disk.cc')
diff --git a/src/dev/i2cbus.cc b/src/dev/i2cbus.cc
new file mode 100644
index 000000000..9d7da44d0
--- /dev/null
+++ b/src/dev/i2cbus.cc
@@ -0,0 +1,242 @@
+/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Peter Enns
+ */
+
+#include "dev/i2cbus.hh"
+
+#include "debug/Checkpoint.hh"
+#include "mem/packet_access.hh"
+
+// clang complains about std::set being overloaded with Packet::set if
+// we open up the entire namespace std
+using std::vector;
+using std::map;
+
+/**
+ * 4KB - see e.g.
+ * http://infocenter.arm.com/help/topic/com.arm.doc.dui0440b/Bbajihec.html
+ */
+I2CBus::I2CBus(const I2CBusParams *p)
+    : BasicPioDevice(p, 0xfff), scl(1), sda(1), state(IDLE), currBit(7),
+      i2cAddr(0x00), message(0x00)
+{
+    vector<I2CDevice*> devs = p->devices;
+
+    for (auto d : p->devices) {
+        devices[d->i2cAddr()] = d;
+    }
+}
+
+/**
+ * Reads will always be to SB_CONTROLS. The kernel wants to know the state
+ * of sda and scl.
+ */
+Tick
+I2CBus::read(PacketPtr pkt)
+{
+    assert(pkt->getAddr() == pioAddr + SB_CONTROLS);
+
+    pkt->set<uint8_t>((sda << 1) | scl);
+    pkt->makeAtomicResponse();
+    return pioDelay;
+}
+
+/**
+ * The default i2c bus driver used by the realview pbx board writes to
+ * this device one bit at a time. To facilitate making new i2c devices,
+ * i2cBus::write takes care of the low-level details of the i2c protocol.
+ * See the I2C Specification [1] for a detailed description of the
+ * protocol.
+ *
+ * [1] - http://www.nxp.com/documents/user_manual/UM10204.pdf
+ */
+Tick
+I2CBus::write(PacketPtr pkt)
+{
+    assert(pkt->getAddr() == pioAddr + SB_CONTROLS ||
+           pkt->getAddr() == pioAddr + SB_CONTROLC);
+
+    updateSignals(pkt);
+
+    // Check if the bus master is starting a new transmission.
+    if (isStart(pkt)) {
+        state = RECEIVING_ADDR;
+        message = 0x00;
+        currBit = 7;
+        /* Most i2c devices expect something special (e.g., command,
+         * register address) in the first byte they receive so they
+         * must be notified somehow that this is a new transmission.
+         */
+        for (auto& d : devices) {
+            d.second->i2cStart();
+        }
+        return pioDelay;
+    }
+
+    // Check if the bus master is ending a transmission.
+    if (isEnd(pkt)) {
+        state = IDLE;
+        return pioDelay;
+    }
+
+    // Only change state when the clock is transitioning from low to high.
+    // This may not perfectly mimic physical i2c devices but the important
+    // part is to only do the following once per clock cycle.
+    if (isClockSet(pkt)) {
+        switch (state) {
+          case RECEIVING_ADDR:
+            if (currBit >= 0) {
+                message |= sda << currBit;
+                currBit--;
+            } else {
+                i2cAddr = message >> 1;
+                assert(devices.find(i2cAddr) != devices.end());
+                if (message & 0x01) {
+                    state = SENDING_DATA;
+                    message = devices[i2cAddr]->read();
+                } else {
+                    state = RECEIVING_DATA;
+                    message = 0x00;
+                }
+                currBit = 7;
+                sda = 0; /* Ack */
+            }
+            break;
+          case RECEIVING_DATA:
+            if (currBit >= 0) {
+                message |= sda << currBit;
+                currBit--;
+            } else {
+                devices[i2cAddr]->write(message);
+                message = 0x00;
+                currBit = 7;
+                sda = 0; /* Ack */
+            }
+            break;
+          case SENDING_DATA:
+            if (currBit >= 0) {
+                sda = (message >> currBit) & 0x01;
+                currBit--;
+            } else {
+                if (!sda) /* Check for ack from the bus master. */
+                    message = devices[i2cAddr]->read();
+                currBit = 7;
+            }
+            break;
+          case IDLE:
+          default:
+            panic("Invalid state on posedge of clock in I2CBus::write.\n");
+            break;
+        }
+    }
+
+    return pioDelay;
+}
+
+void
+I2CBus::updateSignals(PacketPtr pkt)
+{
+    uint8_t msg = pkt->get<uint8_t>();
+    Addr daddr = pkt->getAddr() - pioAddr;
+
+    switch (daddr) {
+      case SB_CONTROLS:
+        scl = (msg & 1) ? 1 : scl;
+        sda = (msg & 2) ? 1 : sda;
+        break;
+      case SB_CONTROLC:
+        scl = (msg & 1) ? 0 : scl;
+        sda = (msg & 2) ? 0 : sda;
+        break;
+      default:
+        break;
+    }
+}
+
+bool
+I2CBus::isClockSet(PacketPtr pkt) const
+{
+    uint8_t msg = pkt->get<uint8_t>();
+    Addr daddr = pkt->getAddr() - pioAddr;
+    return daddr == SB_CONTROLS && (msg & 1);
+}
+
+bool
+I2CBus::isStart(PacketPtr pkt) const
+{
+    uint8_t msg = pkt->get<uint8_t>();
+    Addr daddr = pkt->getAddr() - pioAddr;
+    return scl && (msg & 2) && daddr == SB_CONTROLC;
+}
+
+bool
+I2CBus::isEnd(PacketPtr pkt) const
+{
+    uint8_t msg = pkt->get<uint8_t>();
+    Addr daddr = pkt->getAddr() - pioAddr;
+    return scl && (msg & 2) && daddr == SB_CONTROLS;
+}
+void
+I2CBus::serialize(std::ostream &os)
+{
+    DPRINTF(Checkpoint, "Serializing I2C bus.\n");
+    SERIALIZE_SCALAR(scl);
+    SERIALIZE_SCALAR(sda);
+    SERIALIZE_ENUM(state);
+    SERIALIZE_SCALAR(currBit);
+    SERIALIZE_SCALAR(i2cAddr);
+    SERIALIZE_SCALAR(message);
+}
+
+void
+I2CBus::unserialize(Checkpoint *cp, const std::string &section)
+{
+    DPRINTF(Checkpoint, "Unserializing I2C bus.\n");
+    UNSERIALIZE_SCALAR(scl);
+    UNSERIALIZE_SCALAR(sda);
+    UNSERIALIZE_ENUM(state);
+    UNSERIALIZE_SCALAR(currBit);
+    UNSERIALIZE_SCALAR(i2cAddr);
+    UNSERIALIZE_SCALAR(message);
+}
+
+I2CBus*
+I2CBusParams::create()
+{
+    return new I2CBus(this);
+}
diff --git a/src/dev/i2cbus.hh b/src/dev/i2cbus.hh
new file mode 100644
index 000000000..318950b39
--- /dev/null
+++ b/src/dev/i2cbus.hh
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Peter Enns
+ */
+
+
+/** @file
+ * Implementiation of an i2c bus
+ */
+
+#ifndef __DEV_I2CBUS__
+#define __DEV_I2CBUS__
+
+#include <map>
+
+#include "dev/i2cdev.hh"
+#include "dev/io_device.hh"
+#include "params/I2CBus.hh"
+
+class I2CBus : public BasicPioDevice
+{
+  protected:
+
+    enum I2CState {
+        IDLE,
+        RECEIVING_ADDR,
+        RECEIVING_DATA,
+        SENDING_DATA,
+    };
+
+    /**
+     * Read [and Set] serial control bits:
+     * Bit [0] is SCL
+     * Bit [1] is SDA
+     *
+     * http://infocenter.arm.com/help/topic/com.arm.doc.dui0440b/Bbajdjeg.html
+     */
+    static const int SB_CONTROLS = 0x0;
+    /** Clear control bits. Analogous to SB_CONTROLS */
+    static const int SB_CONTROLC = 0x4;
+
+    /** I2C clock wire (0, 1). */
+    uint8_t scl;
+    /** I2C data wire (0, 1) */
+    uint8_t sda;
+
+    /**
+     * State used by I2CBus::write to determine what stage of an i2c
+     * transmission it is currently in.
+     */
+    enum I2CState state;
+
+    /**
+     * Order of the bit of the current message that is being sent or
+     * received (0 - 7).
+     */
+    int currBit;
+
+    /**
+     * Key used to access a device in the slave devices map. This
+     * is the same address that is specified in kernel board
+     * initialization code (e.g., arch/arm/mach-realview/core.c).
+     */
+    uint8_t i2cAddr;
+
+    /** 8-bit buffer used to send and receive messages bit by bit. */
+    uint8_t message;
+
+    /**
+     * All the slave i2c devices that are connected to this
+     * bus. Each device has an address that points to the actual
+     * device.
+     */
+    std::map<uint8_t, I2CDevice*> devices;
+
+    /**
+     * Update data (sda) and clock (scl) to match any transitions
+     * specified by pkt.
+     *
+     * @param pkt memory request packet
+     */
+    void updateSignals(PacketPtr pkt);
+
+    /**
+     * Clock set check
+     *
+     * @param pkt memory request packet
+     * @return true if pkt indicates that scl transition from 0 to 1
+     */
+    bool isClockSet(PacketPtr pkt) const;
+
+    /**
+     * i2c start signal check
+     *
+     * @param pkt memory request packet
+     * @return true if pkt indicates a new transmission
+     */
+    bool isStart(PacketPtr pkt) const;
+
+    /**
+     * i2c end signal check
+     *
+     * @param pkt memory request packet
+     * @return true if pkt indicates stopping the current transmission
+     */
+    bool isEnd(PacketPtr pkt) const;
+
+  public:
+
+    I2CBus(const I2CBusParams* p);
+
+    virtual Tick read(PacketPtr pkt);
+    virtual Tick write(PacketPtr pkt);
+
+    virtual void serialize(std::ostream& os);
+    virtual void unserialize(Checkpoint* cp, const std::string& section);
+};
+
+#endif //__DEV_I2CBUS
diff --git a/src/dev/i2cdev.hh b/src/dev/i2cdev.hh
new file mode 100644
index 000000000..d101483fd
--- /dev/null
+++ b/src/dev/i2cdev.hh
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.*
+ *
+ * Authors: Peter Enns
+ */
+
+
+/** @file
+ * All i2c devices should derive from this class.
+ */
+
+#ifndef __DEV_I2CDEV__
+#define __DEV_I2CDEV__
+
+#include "base/types.hh"
+#include "params/I2CDevice.hh"
+#include "sim/sim_object.hh"
+
+class I2CDevice : public SimObject
+{
+
+  protected:
+
+    uint8_t _addr;
+
+  public:
+
+    I2CDevice(const I2CDeviceParams* p)
+        : SimObject(p), _addr(p->i2c_addr)
+    { }
+
+    virtual ~I2CDevice() { }
+
+    /**
+     * Return the next message that the device expects to send. This
+     * will likely have side effects (e.g., incrementing a register
+     * pointer).
+     *
+     * @return 8-bit message the device has been set up to send
+     */
+    virtual uint8_t read() = 0;
+
+    /**
+     * Perform any actions triggered by an i2c write (save msg in a
+     * register, perform an interrupt, update a register pointer or
+     * command register, etc...)
+     *
+     * @param msg 8-bit message from master
+     */
+    virtual void write(uint8_t msg) = 0;
+
+    /**
+     * Perform any initialization necessary for the device when it
+     * received a start signal from the bus master (devices frequently
+     * expect the first write to be a register address)
+     */
+    virtual void i2cStart() = 0;
+
+    uint8_t i2cAddr() const { return _addr; }
+
+};
+
+#endif // __DEV_I2CDEV__