ARM: Decode miscellaneous arm mode media instructions.

2 files changed, 27 insertions, 10 deletions

diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa
index ca74a2c1e..cbc763d6a 100644
--- a/src/arch/arm/isa/decoder/arm.isa
+++ b/src/arch/arm/isa/decoder/arm.isa
@@ -114,9 +114,7 @@ format DataOp {
             0x0: ArmParallelAddSubtract::armParallelAddSubtract();
             0x1: ArmPackUnpackSatReverse::armPackUnpackSatReverse();
             0x2: ArmSignedMultiplies::armSignedMultiplies();
-            0x3: decode MEDIA_OPCODE {
-                0x18: ArmUsad::armUsad();
-            }
+            0x3: ArmMiscMedia::armMiscMedia();
         }
     }
     0x4: ArmMacroMem::armMacroMem();
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index 03f94075c..dee377658 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -35,18 +35,37 @@
 //
 // Authors: Gabe Black
 
-def format ArmUsad() {{
+def format ArmMiscMedia() {{
     decode_block = '''
     {
-        const IntRegIndex rd = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
+        const uint32_t op1 = bits(machInst, 22, 20);
+        const uint32_t op2 = bits(machInst, 7, 5);
         const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
-        const IntRegIndex rm = (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
         const IntRegIndex ra = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
-        if (ra == 0xf) {
-            return new Usad8(machInst, rd, rn, rm);
-        } else {
-            return new Usada8(machInst, rd, rn, rm, ra);
+        if (op1 == 0 && op2 == 0) {
+            const IntRegIndex rd =
+                (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
+            const IntRegIndex rm =
+                (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
+            if (ra == 0xf) {
+                return new Usad8(machInst, rd, rn, rm);
+            } else {
+                return new Usada8(machInst, rd, rn, rm, ra);
+            }
+        } else if (bits(op2, 1, 0) == 0x2) {
+            if (bits(op1, 2, 1) == 0x3) {
+                return new WarnUnimplemented("ubfx", machInst);
+            } else if (bits(op1, 2, 1) == 0x1) {
+                return new WarnUnimplemented("sbfx", machInst);
+            }
+        } else if (bits(op2, 1, 0) == 0x0 && bits(op1, 2, 1) == 0x2) {
+            if (rn == 0xf) {
+                return new WarnUnimplemented("bfc", machInst);
+            } else {
+                return new WarnUnimplemented("bfi", machInst);
+            }
         }
+        return new Unknown(machInst);
     }
     '''
 }};