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authorGabe Black <gblack@eecs.umich.edu>2007-04-11 14:16:54 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-04-11 14:16:54 +0000
commitc382bdf93d036aa97efda7a764a66f1bd36f7466 (patch)
treed0f6ab4779ac3c30ccd39d1528f10572d8b69b30 /src
parent54abc8b3372287d9b286f5a0dc04d25a916bf889 (diff)
downloadgem5-c382bdf93d036aa97efda7a764a66f1bd36f7466.tar.xz
Use a computed mask to mask out the fetch address and not a hard coded one.
--HG-- extra : convert_revision : c22907bed4b83f0dff51d2283dafe4f76fa9e94a
Diffstat (limited to 'src')
-rw-r--r--src/cpu/simple/base.cc6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index c9d4f4c8f..3d07961f1 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -335,7 +335,11 @@ BaseSimpleCPU::setupFetchRequest(Request *req)
thread->readNextPC());
#endif
- req->setVirt(0, thread->readPC() & ~3, sizeof(MachInst), 0,
+ // This will generate a mask which aligns the pc on MachInst size
+ // boundaries. It won't work for non-power-of-two sized MachInsts, but
+ // it will work better than a hard coded mask.
+ const Addr PCMask = ~(sizeof(MachInst) - 1);
+ req->setVirt(0, thread->readPC() & PCMask, sizeof(MachInst), 0,
thread->readPC());
Fault fault = thread->translateInstReq(req);