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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2017-10-23 10:49:38 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-11-15 14:16:57 +0000
commitccdbc394e2f4adcb8a3b89b8df7ce403b9fbd937 (patch)
tree50572b3a0346812c9dbf8aa7799d0649f38d18a8 /src
parent053bb85b3220986f56fbbd24bd5bc7c04dea4ce6 (diff)
downloadgem5-ccdbc394e2f4adcb8a3b89b8df7ce403b9fbd937.tar.xz
arch-arm: Writes to DCCMVAC shouldn't flush pipeline
Writes to DCCMVAC (Data Cache line Clean by VA to PoC) system register shouldn't flush the pipeline as a result of the operation. This addition was wrongly introduced for supporting self-modifying code. Software barriers should be used instead. Change-Id: Idf0c27d2e49ca01be19888ae5523b8f8eaefa7b3 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5362 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/insts/pseudo.cc3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/arch/arm/insts/pseudo.cc b/src/arch/arm/insts/pseudo.cc
index aa3d93d6e..40e00accf 100644
--- a/src/arch/arm/insts/pseudo.cc
+++ b/src/arch/arm/insts/pseudo.cc
@@ -190,9 +190,6 @@ McrMrcMiscInst::McrMrcMiscInst(const char *_mnemonic, ExtMachInst _machInst,
flags[IsNonSpeculative] = true;
iss = _iss;
miscReg = _miscReg;
-
- if (miscReg == MISCREG_DCCMVAC)
- flags[IsSquashAfter] = true;
}
Fault