diff options
author | Iru Cai <mytbk920423@gmail.com> | 2019-04-02 14:55:13 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-04-02 14:55:13 +0800 |
commit | 05098cf70b668b9eac91db71c5bd44765ee1e6d5 (patch) | |
tree | 78430840008543da94758269e5ada0d0403696b5 /src | |
parent | 03ba6805c09ec86e597f12d25f33d705176f3aad (diff) | |
download | gem5-05098cf70b668b9eac91db71c5bd44765ee1e6d5.tar.xz |
add taint map
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/o3/regfile.cc | 5 | ||||
-rw-r--r-- | src/cpu/o3/regfile.hh | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/cpu/o3/regfile.cc b/src/cpu/o3/regfile.cc index 2f41e2ac2..b3f1b1904 100644 --- a/src/cpu/o3/regfile.cc +++ b/src/cpu/o3/regfile.cc @@ -83,12 +83,14 @@ PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, // The initial batch of registers are the integer ones for (phys_reg = 0; phys_reg < numPhysicalIntRegs; phys_reg++) { intRegIds.emplace_back(IntRegClass, phys_reg, flat_reg_idx++); + intTaintMap.push_back(false); } // The next batch of the registers are the floating-point physical // registers; put them onto the floating-point free list. for (phys_reg = 0; phys_reg < numPhysicalFloatRegs; phys_reg++) { floatRegIds.emplace_back(FloatRegClass, phys_reg, flat_reg_idx++); + floatTaintMap.push_back(false); } // The next batch of the registers are the vector physical @@ -96,6 +98,7 @@ PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, for (phys_reg = 0; phys_reg < numPhysicalVecRegs; phys_reg++) { vectorRegFile[phys_reg].zero(); vecRegIds.emplace_back(VecRegClass, phys_reg, flat_reg_idx++); + vecTaintMap.push_back(false); } // The next batch of the registers are the vector element physical // registers; they refer to the same containers as the vector @@ -112,11 +115,13 @@ PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, // registers; put them onto the condition-code free list. for (phys_reg = 0; phys_reg < numPhysicalCCRegs; phys_reg++) { ccRegIds.emplace_back(CCRegClass, phys_reg, flat_reg_idx++); + ccTaintMap.push_back(false); } // Misc regs have a fixed mapping but still need PhysRegIds. for (phys_reg = 0; phys_reg < TheISA::NumMiscRegs; phys_reg++) { miscRegIds.emplace_back(MiscRegClass, phys_reg, 0); + miscTaintMap.push_back(false); } } diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index 7feec933f..943df35b9 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -87,22 +87,27 @@ class PhysRegFile /** Integer register file. */ std::vector<IntReg> intRegFile; std::vector<PhysRegId> intRegIds; + std::vector<bool> intTaintMap; /** Floating point register file. */ std::vector<PhysFloatReg> floatRegFile; std::vector<PhysRegId> floatRegIds; + std::vector<bool> floatTaintMap; /** Vector register file. */ std::vector<VecRegContainer> vectorRegFile; std::vector<PhysRegId> vecRegIds; std::vector<PhysRegId> vecElemIds; + std::vector<bool> vecTaintMap; /** Condition-code register file. */ std::vector<CCReg> ccRegFile; std::vector<PhysRegId> ccRegIds; + std::vector<bool> ccTaintMap; /** Misc Reg Ids */ std::vector<PhysRegId> miscRegIds; + std::vector<bool> miscTaintMap; /** * Number of physical general purpose registers |