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authorAndrea Pellegrini <andrea.pellegrini@gmail.com>2013-01-22 00:13:28 -0600
committerAndrea Pellegrini <andrea.pellegrini@gmail.com>2013-01-22 00:13:28 -0600
commit11d5ffa108983d5d9742f0aad23f80c691f285ee (patch)
tree9396a4de982dd7441b5117389705acabcb7b0640 /src
parentfc57ae640130c2d7610f4ff20a3d8816b88042bf (diff)
downloadgem5-11d5ffa108983d5d9742f0aad23f80c691f285ee.tar.xz
o3 cpu: fix zero reg problem
There was an issue w/ the rename logic, which would assign a previous physical register to the ZeroReg architectural register in x86. This issue was giving problems for instructions squashed in threads w/ ID different from 0, sometimes allowing non-mispredicted instructions to obtain a value different from zero when reading the zeroReg.
Diffstat (limited to 'src')
-rw-r--r--src/cpu/o3/rename_map.cc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index 8508071b4..57caa76be 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -158,6 +158,7 @@ SimpleRenameMap::rename(RegIndex arch_reg)
} else {
// Otherwise return the zero register so nothing bad happens.
renamed_reg = intZeroReg;
+ prev_reg = intZeroReg;
}
} else if (arch_reg < numLogicalRegs) {
// Record the current physical register that is renamed to the