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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-05-02 17:26:34 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-05-24 16:25:33 +0000 |
| commit | 3f835d88a337c74869393b76ef3c398c324754cc (patch) | |
| tree | 3ffe611c4d998e6b17f335bf030b98ade1da6b81 /src | |
| parent | 642818f1f39dd73e478f136d0306989f33d3ad8f (diff) | |
| download | gem5-3f835d88a337c74869393b76ef3c398c324754cc.tar.xz | |
arm: Fix incorrect handling of PMEVTYPERx_EL0 in PMU
The PMU model currently doesn't calculate the PMU event counter index
correctly for writes to the PMEVTYPER[0-5]_EL0 registers. Fix this
obvious mistake.
Change-Id: I2913eedddeb98480660e2d63948f6d727adf5ab8
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3121
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/pmu.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc index 39530702c..ac2f4759f 100644 --- a/src/arch/arm/pmu.cc +++ b/src/arch/arm/pmu.cc @@ -163,7 +163,7 @@ PMU::setMiscReg(int misc_reg, MiscReg val) return; case MISCREG_PMEVTYPER0_EL0...MISCREG_PMEVTYPER5_EL0: - setCounterTypeRegister(misc_reg - MISCREG_PMEVCNTR0_EL0, val); + setCounterTypeRegister(misc_reg - MISCREG_PMEVTYPER0_EL0, val); return; case MISCREG_PMCCFILTR: |