diff options
author | Korey Sewell <ksewell@umich.edu> | 2006-06-09 17:07:13 -0400 |
---|---|---|
committer | Korey Sewell <ksewell@umich.edu> | 2006-06-09 17:07:13 -0400 |
commit | 4cc31e1aefc337fe37c4b6373fe263e8b26e0b7d (patch) | |
tree | 79030095be1a846e433bf9de7d31db8135811382 /src | |
parent | 68e470f78aac9fc5ea15f0840deda0972bef7666 (diff) | |
download | gem5-4cc31e1aefc337fe37c4b6373fe263e8b26e0b7d.tar.xz |
add fcntl64Func
use ThreadContext rename
src/arch/mips/isa/formats/branch.isa:
src/arch/mips/isa/formats/fp.isa:
src/arch/mips/isa/includes.isa:
Use ThreadContext
src/sim/syscall_emul.cc:
fcntl64 function using TC
src/sim/syscall_emul.hh:
Add fcntl64func
--HG--
extra : convert_revision : b5e2348530473704388b1c5a2b59bf78360260a9
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/mips/isa/formats/branch.isa | 8 | ||||
-rw-r--r-- | src/arch/mips/isa/formats/fp.isa | 14 | ||||
-rw-r--r-- | src/arch/mips/isa/includes.isa | 2 | ||||
-rw-r--r-- | src/sim/syscall_emul.cc | 29 | ||||
-rw-r--r-- | src/sim/syscall_emul.hh | 4 |
5 files changed, 45 insertions, 12 deletions
diff --git a/src/arch/mips/isa/formats/branch.isa b/src/arch/mips/isa/formats/branch.isa index 6f8cebed0..e8843da03 100644 --- a/src/arch/mips/isa/formats/branch.isa +++ b/src/arch/mips/isa/formats/branch.isa @@ -88,7 +88,7 @@ output header {{ { } - Addr branchTarget(ExecContext *xc) const; + Addr branchTarget(ThreadContext *tc) const; std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; @@ -103,10 +103,10 @@ output decoder {{ } Addr - Jump::branchTarget(ExecContext *xc) const + Jump::branchTarget(ThreadContext *tc) const { - Addr NPC = xc->readPC() + 4; - uint64_t Rb = xc->readIntReg(_srcRegIdx[0]); + Addr NPC = tc->readPC() + 4; + uint64_t Rb = tc->readIntReg(_srcRegIdx[0]); return (Rb & ~3) | (NPC & 1); } diff --git a/src/arch/mips/isa/formats/fp.isa b/src/arch/mips/isa/formats/fp.isa index 6647f9361..1803c0e73 100644 --- a/src/arch/mips/isa/formats/fp.isa +++ b/src/arch/mips/isa/formats/fp.isa @@ -95,7 +95,7 @@ output exec {{ template <class T> bool - fpInvalidOp(FPOp *inst, %(CPU_exec_context)s *xc, const T dest_val, + fpInvalidOp(FPOp *inst, %(CPU_exec_context)s *cpu, const T dest_val, Trace::InstRecord *traceData) { uint64_t mips_nan = 0; @@ -111,13 +111,13 @@ output exec {{ } //Set value to QNAN - xc->setFloatRegBits(inst, 0, mips_nan, size); + cpu->setFloatRegBits(inst, 0, mips_nan, size); //Read FCSR from FloatRegFile - uint32_t fcsr_bits = xc->cpuXC->readFloatRegBits(FCSR); + uint32_t fcsr_bits = cpu->tc->readFloatRegBits(FCSR); //Write FCSR from FloatRegFile - xc->cpuXC->setFloatRegBits(FCSR, genInvalidVector(fcsr_bits)); + cpu->tc->setFloatRegBits(FCSR, genInvalidVector(fcsr_bits)); if (traceData) { traceData->setData(mips_nan); } return true; @@ -127,15 +127,15 @@ output exec {{ } void - fpResetCauseBits(%(CPU_exec_context)s *xc) + fpResetCauseBits(%(CPU_exec_context)s *cpu) { //Read FCSR from FloatRegFile - uint32_t fcsr = xc->cpuXC->readFloatRegBits(FCSR); + uint32_t fcsr = cpu->tc->readFloatRegBits(FCSR); fcsr = bits(fcsr, 31, 18) << 18 | bits(fcsr, 11, 0); //Write FCSR from FloatRegFile - xc->cpuXC->setFloatRegBits(FCSR, fcsr); + cpu->tc->setFloatRegBits(FCSR, fcsr); } }}; diff --git a/src/arch/mips/isa/includes.isa b/src/arch/mips/isa/includes.isa index fe21d65cb..126929e19 100644 --- a/src/arch/mips/isa/includes.isa +++ b/src/arch/mips/isa/includes.isa @@ -18,7 +18,7 @@ output decoder {{ #include "arch/mips/isa_traits.hh" #include "base/cprintf.hh" #include "base/loader/symtab.hh" -#include "cpu/exec_context.hh" // for Jump::branchTarget() +#include "cpu/thread_context.hh" #include "arch/mips/faults.hh" #include "arch/mips/isa_traits.hh" #include "arch/mips/utility.hh" diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc index 888c133c0..e32295131 100644 --- a/src/sim/syscall_emul.cc +++ b/src/sim/syscall_emul.cc @@ -341,6 +341,35 @@ fcntlFunc(SyscallDesc *desc, int num, Process *process, } SyscallReturn +fcntl64Func(SyscallDesc *desc, int num, Process *process, + ThreadContext *tc) +{ + int fd = tc->getSyscallArg(0); + + if (fd < 0 || process->sim_fd(fd) < 0) + return -EBADF; + + int cmd = tc->getSyscallArg(1); + switch (cmd) { + case 33: //F_GETLK64 + warn("fcntl64(%d, F_GETLK64) not supported, error returned\n", fd); + return -EMFILE; + + case 34: // F_SETLK64 + case 35: // F_SETLKW64 + warn("fcntl64(%d, F_SETLK(W)64) not supported, error returned\n", fd); + return -EMFILE; + + default: + // not sure if this is totally valid, but we'll pass it through + // to the underlying OS + warn("fcntl64(%d, %d) passed through to host\n", fd, cmd); + return fcntl(process->sim_fd(fd), cmd); + // return 0; + } +} + +SyscallReturn pipePseudoFunc(SyscallDesc *desc, int callnum, Process *process, ThreadContext *tc) { diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh index 874eaf6a4..ffd12dd83 100644 --- a/src/sim/syscall_emul.hh +++ b/src/sim/syscall_emul.hh @@ -249,6 +249,10 @@ SyscallReturn fchownFunc(SyscallDesc *desc, int num, SyscallReturn fcntlFunc(SyscallDesc *desc, int num, Process *process, ThreadContext *tc); +/// Target fcntl64() handler. +SyscallReturn fcntl64Func(SyscallDesc *desc, int num, + Process *process, ThreadContext *tc); + /// Target setuid() handler. SyscallReturn setuidFunc(SyscallDesc *desc, int num, Process *p, ThreadContext *tc); |