summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:12 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:12 -0500
commitdea707704fbfc8e8fdecf3accf4d8e8e5aa3df68 (patch)
treef12b96a97fd5cb323f2806d7ccdbce680b3c4df6 /src
parentb504b44b2f3dec833f725ee3cb343e7bcbda0a05 (diff)
downloadgem5-dea707704fbfc8e8fdecf3accf4d8e8e5aa3df68.tar.xz
ARM: Clean up some redundancy and fault behavior for unimplemented thumb MCR, MRC.
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/isa/decoder/thumb.isa8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa
index 9c64fd37a..328803b8e 100644
--- a/src/arch/arm/isa/decoder/thumb.isa
+++ b/src/arch/arm/isa/decoder/thumb.isa
@@ -87,13 +87,7 @@
}
0x1: decode LTCOPROC {
0xa, 0xb: ShortFpTransfer::shortFpTransfer();
- default: decode CPNUM {
- 15: McrMrc15::mcrMrc15();
- default: decode HTOPCODE_4 {
- 0x0: WarnUnimpl::mcr();
- 0x1: WarnUnimpl::mrc();
- }
- }
+ 0xf: McrMrc15::mcrMrc15();
}
}
0x3: WarnUnimpl::Advanced_SIMD();