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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-07-02 22:31:22 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-07-02 22:31:22 -0700 |
| commit | 2f72d6a1f4a9a44699e271608c7edc3ed90cfff9 (patch) | |
| tree | 8204cd8c44bbea077c0008f501fd9c3d2cd66251 /src | |
| parent | 45b411fc5f69c4c6bdc4b4e60d144d1e887a04cb (diff) | |
| download | gem5-2f72d6a1f4a9a44699e271608c7edc3ed90cfff9.tar.xz | |
X86: Fix store microops so they don't drop faults in timing mode.
If a fault was returned by the CPU when a store initiated it's write, the
store instruction would ignore the fault. This change fixes that.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/isa/microops/ldstop.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa index 811b35c8a..f7a38b486 100644 --- a/src/arch/x86/isa/microops/ldstop.isa +++ b/src/arch/x86/isa/microops/ldstop.isa @@ -201,7 +201,7 @@ def template MicroStoreInitiateAcc {{ if(fault == NoFault) { - write(xc, Mem, EA, memFlags); + fault = write(xc, Mem, EA, memFlags); } return fault; } |