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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:03 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:03 -0500 |
| commit | ae135228fce89918c308bcd6d7d9bc3009cb3bc4 (patch) | |
| tree | 92f27d2354c00131793edbb9c2372a3769274fbe /src | |
| parent | 8c012e9571e3320aa9857e31356f5a0fe5f7dde1 (diff) | |
| download | gem5-ae135228fce89918c308bcd6d7d9bc3009cb3bc4.tar.xz | |
ARM: Get rid of the unused ArmGenericCodeSubs.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/isa/formats/util.isa | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/arch/arm/isa/formats/util.isa b/src/arch/arm/isa/formats/util.isa index 286ce5ce5..f43137a04 100644 --- a/src/arch/arm/isa/formats/util.isa +++ b/src/arch/arm/isa/formats/util.isa @@ -30,17 +30,6 @@ let {{ -# Generic substitutions for Arm instructions -def ArmGenericCodeSubs(code): - # Substitute in the shifted portion of operations - new_code = re.sub(r'Rm_Imm', - 'shift_rm_imm(Rm, shift_size, shift, CondCodes<29:>)', code) - new_code = re.sub(r'Rm_Rs', - 'shift_rm_rs(Rm, Rs, shift, CondCodes<29:>)', new_code) - return new_code -}}; - - output header {{ std::string inst2string(MachInst machInst); }}; |