diff options
| author | Mitchell Hayenga <Mitchell.Hayenga@ARM.com> | 2014-04-23 05:18:26 -0400 |
|---|---|---|
| committer | Mitchell Hayenga <Mitchell.Hayenga@ARM.com> | 2014-04-23 05:18:26 -0400 |
| commit | bf25c53a7d2e34319a8f845045c83ef7a74068a7 (patch) | |
| tree | 4285fd3c7269ebb95f5df0867a0c68523e18a6d6 /src | |
| parent | 2031c03c09ad3753e53fa29a6555fdf288c821e2 (diff) | |
| download | gem5-bf25c53a7d2e34319a8f845045c83ef7a74068a7.tar.xz | |
cpu: Fix setTranslateLatency() bug for squashed instructions
setTranslateLatency could sometimes improperly access a deleted request
packet after an instruction was squashed.
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/translation.hh | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/cpu/translation.hh b/src/cpu/translation.hh index c05cc86a0..46c96a0d4 100644 --- a/src/cpu/translation.hh +++ b/src/cpu/translation.hh @@ -255,8 +255,11 @@ class DataTranslation : public BaseTLB::Translation assert(state); assert(mode == state->mode); if (state->finish(fault, index)) { + if (state->getFault() == NoFault) { + // Don't access the request if faulted (due to squash) + req->setTranslateLatency(); + } xc->finishTranslation(state); - req->setTranslateLatency(); } delete this; } |