diff options
author | Djordje Kovacevic <djordje.kovacevic@arm.com> | 2012-09-25 11:49:40 -0500 |
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committer | Djordje Kovacevic <djordje.kovacevic@arm.com> | 2012-09-25 11:49:40 -0500 |
commit | d060a28a2938aff5446e2b800176208c72b698da (patch) | |
tree | 6ec0965b063a0e168a9f1fe1d292c6cfeb91a54d /src | |
parent | bfffbb67976fc4a01185e36c8eaf755454cf19a5 (diff) | |
download | gem5-d060a28a2938aff5446e2b800176208c72b698da.tar.xz |
CPU: Add abandoned instructions to O3 Pipe Viewer
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/o3/commit_impl.hh | 15 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst.hh | 15 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst_impl.hh | 43 |
3 files changed, 47 insertions, 26 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 8a2dcdd1f..f6c868720 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -58,7 +58,6 @@ #include "debug/Commit.hh" #include "debug/CommitRate.hh" #include "debug/ExecFaulting.hh" -#include "debug/O3PipeView.hh" #include "params/DerivO3CPU.hh" #include "sim/faults.hh" #include "sim/full_system.hh" @@ -1219,19 +1218,7 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num) rob->retireHead(tid); #if TRACING_ON - // Print info needed by the pipeline activity viewer. - DPRINTFR(O3PipeView, "O3PipeView:fetch:%llu:0x%08llx:%d:%llu:%s\n", - head_inst->fetchTick, - head_inst->instAddr(), - head_inst->microPC(), - head_inst->seqNum, - head_inst->staticInst->disassemble(head_inst->instAddr())); - DPRINTFR(O3PipeView, "O3PipeView:decode:%llu\n", head_inst->fetchTick + head_inst->decodeTick); - DPRINTFR(O3PipeView, "O3PipeView:rename:%llu\n", head_inst->fetchTick + head_inst->renameTick); - DPRINTFR(O3PipeView, "O3PipeView:dispatch:%llu\n", head_inst->fetchTick + head_inst->dispatchTick); - DPRINTFR(O3PipeView, "O3PipeView:issue:%llu\n", head_inst->fetchTick + head_inst->issueTick); - DPRINTFR(O3PipeView, "O3PipeView:complete:%llu\n", head_inst->fetchTick + head_inst->completeTick); - DPRINTFR(O3PipeView, "O3PipeView:retire:%llu\n", curTick()); + head_inst->commitTick = curTick() - head_inst->fetchTick; #endif // If this was a store, record it for this cycle. diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index 8acbf3443..b5344f875 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -93,6 +93,8 @@ class BaseO3DynInst : public BaseDynInst<Impl> /** BaseDynInst constructor given a static inst pointer. */ BaseO3DynInst(StaticInstPtr _staticInst, StaticInstPtr _macroop); + ~BaseO3DynInst(); + /** Executes the instruction.*/ Fault execute(); @@ -123,12 +125,13 @@ class BaseO3DynInst : public BaseDynInst<Impl> public: #if TRACING_ON /** Tick records used for the pipeline activity viewer. */ - Tick fetchTick; - uint32_t decodeTick; - uint32_t renameTick; - uint32_t dispatchTick; - uint32_t issueTick; - uint32_t completeTick; + Tick fetchTick; // instruction fetch is completed. + int32_t decodeTick; // instruction enters decode phase + int32_t renameTick; // instruction enters rename phase + int32_t dispatchTick; + int32_t issueTick; + int32_t completeTick; + int32_t commitTick; #endif /** Reads a misc. register, including any side-effects the read diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh index 85778aadc..7f8d5a030 100644 --- a/src/cpu/o3/dyn_inst_impl.hh +++ b/src/cpu/o3/dyn_inst_impl.hh @@ -43,6 +43,7 @@ #include "base/cp_annotate.hh" #include "cpu/o3/dyn_inst.hh" #include "sim/full_system.hh" +#include "debug/O3PipeView.hh" template <class Impl> BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst, @@ -62,6 +63,33 @@ BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr _staticInst, initVars(); } +template <class Impl>BaseO3DynInst<Impl>::~BaseO3DynInst() +{ +#if TRACING_ON + Tick val, fetch = this->fetchTick; + // Print info needed by the pipeline activity viewer. + DPRINTFR(O3PipeView, "O3PipeView:fetch:%llu:0x%08llx:%d:%llu:%s\n", + fetch, + this->instAddr(), + this->microPC(), + this->seqNum, + this->staticInst->disassemble(this->instAddr())); + val = (this->decodeTick == -1) ? 0 : fetch + this->decodeTick; + DPRINTFR(O3PipeView, "O3PipeView:decode:%llu\n", val); + val = (this->renameTick == -1) ? 0 : fetch + this->renameTick; + DPRINTFR(O3PipeView, "O3PipeView:rename:%llu\n", val); + val = (this->dispatchTick == -1) ? 0 : fetch + this->dispatchTick; + DPRINTFR(O3PipeView, "O3PipeView:dispatch:%llu\n", val); + val = (this->issueTick == -1) ? 0 : fetch + this->issueTick; + DPRINTFR(O3PipeView, "O3PipeView:issue:%llu\n", val); + val = (this->completeTick == -1) ? 0 : fetch + this->completeTick; + DPRINTFR(O3PipeView, "O3PipeView:complete:%llu\n", val); + val = (this->commitTick == -1) ? 0 : fetch + this->commitTick; + DPRINTFR(O3PipeView, "O3PipeView:retire:%llu\n", val); +#endif +}; + + template <class Impl> void BaseO3DynInst<Impl>::initVars() @@ -82,12 +110,15 @@ BaseO3DynInst<Impl>::initVars() _numDestMiscRegs = 0; #if TRACING_ON - fetchTick = 0; - decodeTick = 0; - renameTick = 0; - dispatchTick = 0; - issueTick = 0; - completeTick = 0; + // Value -1 indicates that particular phase + // hasn't happened (yet). + fetchTick = -1; + decodeTick = -1; + renameTick = -1; + dispatchTick = -1; + issueTick = -1; + completeTick = -1; + commitTick = -1; #endif } |