summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorAli Saidi <Ali.Saidi@ARM.com>2012-03-09 09:59:26 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2012-03-09 09:59:26 -0500
commitdf05ffab1289b26aab2a0eb71ee55dcb7f42e5e9 (patch)
treee6377c47393e29f5495997cc24f79f02ff5fffa3 /src
parent3ce2d0fad04201b168dd9847a5120c80408f6498 (diff)
downloadgem5-df05ffab1289b26aab2a0eb71ee55dcb7f42e5e9.tar.xz
ARM: Don't reset CPUs that are going to be switched in.
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/utility.cc6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 0a1cefce7..07932e676 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -44,8 +44,10 @@
#include "arch/arm/utility.hh"
#include "arch/arm/vtophys.hh"
#include "config/use_checker.hh"
+#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "mem/fs_translating_port_proxy.hh"
+#include "params/BaseCPU.hh"
#include "sim/full_system.hh"
namespace ArmISA {
@@ -56,7 +58,9 @@ initCPU(ThreadContext *tc, int cpuId)
// Reset CP15?? What does that mean -- ali
// FPEXC.EN = 0
-
+ if (tc->getCpuPtr()->params()->defer_registration)
+ return;
+
static Fault reset = new Reset;
reset->invoke(tc);
}