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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2017-10-18 01:18:46 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2017-10-20 15:33:40 +0000 |
| commit | e79c4c6f033581f84072ddb45d2ec9543c31af55 (patch) | |
| tree | 7c060130bd1b863ddb2b7d4a69a2d7a181885ef9 /src | |
| parent | 4b3fee098435f1980d0d101ce5a416935d3d6a8e (diff) | |
| download | gem5-e79c4c6f033581f84072ddb45d2ec9543c31af55.tar.xz | |
arch-arm: RBIT instruction using mirroring func
The high speed bit-reversing function is now used
for the Aarch64/32 RBIT instruction implementation.
Change-Id: Id5a8a93d928d00fd33ec4061fbb586b8420a1c1b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5262
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/isa/insts/data64.isa | 13 | ||||
| -rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 12 |
2 files changed, 2 insertions, 23 deletions
diff --git a/src/arch/arm/isa/insts/data64.isa b/src/arch/arm/isa/insts/data64.isa index 48fc87ccb..3284d5b2a 100644 --- a/src/arch/arm/isa/insts/data64.isa +++ b/src/arch/arm/isa/insts/data64.isa @@ -248,18 +248,7 @@ let {{ Dest64 = (Op164 == 0) ? intWidth : (intWidth - 1 - findMsbSet(Op164)); ''') buildDataXRegInst("rbit", 1, ''' - uint64_t result = Op164; - uint64_t lBit = 1ULL << (intWidth - 1); - uint64_t rBit = 1ULL; - while (lBit > rBit) { - uint64_t maskBits = lBit | rBit; - uint64_t testBits = result & maskBits; - // If these bits are different, swap them by toggling them. - if (testBits && testBits != maskBits) - result ^= maskBits; - lBit >>= 1; rBit <<= 1; - } - Dest64 = result; + Dest64 = reverseBits(Op164, intWidth/8); ''') buildDataXRegInst("rev", 1, ''' if (intWidth == 32) diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index 5eda615b5..edeb0f6d3 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -329,17 +329,7 @@ let {{ exec_output += PredOpExecute.subst(revshIop) rbitCode = ''' - uint8_t *opBytes = (uint8_t *)&Op1; - uint32_t resTemp; - uint8_t *destBytes = (uint8_t *)&resTemp; - // This reverses the bytes and bits of the input, or so says the - // internet. - for (int i = 0; i < 4; i++) { - uint32_t temp = opBytes[i]; - temp = (temp * 0x0802 & 0x22110) | (temp * 0x8020 & 0x88440); - destBytes[3 - i] = (temp * 0x10101) >> 16; - } - Dest = resTemp; + Dest = reverseBits(Op1); ''' rbitIop = InstObjParams("rbit", "Rbit", "RegRegOp", { "code": rbitCode, |