summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorGiacomo Travaglini <giacomo.travaglini@arm.com>2017-11-08 11:24:58 +0000
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-02-05 09:44:22 +0000
commit0c208d94cac1f89a04a5adb242327fa9fd13d70e (patch)
treebd6ac77f925cd6348440aa5bdc3c235c91df2de6 /src
parenteea11aedcfe18b29d6e63243bc1acb51441ef523 (diff)
downloadgem5-0c208d94cac1f89a04a5adb242327fa9fd13d70e.tar.xz
cpu: MinorCPU handling IsSquashAfter flag
MinorCPU was not handling IsSquashAfter flagged instructions. The behaviour was to force a branch (hence enforcing refetching) for SerializeAfter instructions only. This has now been extended to SquashAfter in order to correctly support ISB barrier instruction behaviour. Change-Id: Ie525b23350b0de121372d3b98b433e36b097d5c4 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5702 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/minor/execute.cc7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index a38a7677a..7b76ca2e1 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -219,13 +219,14 @@ Execute::tryToBranch(MinorDynInstPtr inst, Fault fault, BranchData &branch)
const TheISA::PCState &pc_before = inst->pc;
TheISA::PCState target = thread->pcState();
- /* Force a branch for SerializeAfter instructions at the end of micro-op
- * sequence when we're not suspended */
+ /* Force a branch for SerializeAfter/SquashAfter instructions
+ * at the end of micro-op sequence when we're not suspended */
bool force_branch = thread->status() != ThreadContext::Suspended &&
!inst->isFault() &&
inst->isLastOpInInst() &&
(inst->staticInst->isSerializeAfter() ||
- inst->staticInst->isIprAccess());
+ inst->staticInst->isSquashAfter() ||
+ inst->staticInst->isIprAccess());
DPRINTF(Branch, "tryToBranch before: %s after: %s%s\n",
pc_before, target, (force_branch ? " (forcing)" : ""));