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authorAndreas Hansson <andreas.hansson@arm.com>2012-02-24 11:48:48 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2012-02-24 11:48:48 -0500
commit86c2aad482df4bf56977bf1a098d2dd01c641bfd (patch)
tree9dffc6f5954b577a145f2946ca675ebc8a1f266d /src
parent485d103255c0f64ebf697650c899fe7a80db1d6d (diff)
downloadgem5-86c2aad482df4bf56977bf1a098d2dd01c641bfd.tar.xz
Ruby: Simplify tester ports by not using SimpleTimingPort
This patch simplfies the master ports used by RubyDirectedTester and RubyTester by avoiding the use of SimpleTimingPort. Neither tester made any use of the functionality offered by SimpleTimingPort besides a trivial implementation of recvFunctional (only snoops) and recvRangeChange (not relevant since there is only one master). The patch does not change or add any functionality, it merely makes the introduction of a master/slave port easier (in a future patch).
Diffstat (limited to 'src')
-rw-r--r--src/cpu/testers/directedtest/RubyDirectedTester.hh9
-rw-r--r--src/cpu/testers/rubytest/RubyTester.hh6
2 files changed, 10 insertions, 5 deletions
diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.hh b/src/cpu/testers/directedtest/RubyDirectedTester.hh
index 53c389692..cd0632976 100644
--- a/src/cpu/testers/directedtest/RubyDirectedTester.hh
+++ b/src/cpu/testers/directedtest/RubyDirectedTester.hh
@@ -47,14 +47,15 @@ class DirectedGenerator;
class RubyDirectedTester : public MemObject
{
public:
- class CpuPort : public SimpleTimingPort
+ class CpuPort : public Port
{
private:
RubyDirectedTester *tester;
public:
- CpuPort(const std::string &_name, RubyDirectedTester *_tester, uint32_t _idx)
- : SimpleTimingPort(_name, _tester), tester(_tester), idx(_idx)
+ CpuPort(const std::string &_name, RubyDirectedTester *_tester,
+ uint32_t _idx)
+ : Port(_name, _tester), tester(_tester), idx(_idx)
{}
uint32_t idx;
@@ -62,6 +63,8 @@ class RubyDirectedTester : public MemObject
protected:
virtual bool recvTiming(PacketPtr pkt);
virtual Tick recvAtomic(PacketPtr pkt);
+ virtual void recvFunctional(PacketPtr pkt) { }
+ virtual void recvRangeChange() { }
};
typedef RubyDirectedTesterParams Params;
diff --git a/src/cpu/testers/rubytest/RubyTester.hh b/src/cpu/testers/rubytest/RubyTester.hh
index fae40a417..e8cf4c874 100644
--- a/src/cpu/testers/rubytest/RubyTester.hh
+++ b/src/cpu/testers/rubytest/RubyTester.hh
@@ -45,14 +45,14 @@
class RubyTester : public MemObject
{
public:
- class CpuPort : public SimpleTimingPort
+ class CpuPort : public Port
{
private:
RubyTester *tester;
public:
CpuPort(const std::string &_name, RubyTester *_tester, int _idx)
- : SimpleTimingPort(_name, _tester), tester(_tester), idx(_idx)
+ : Port(_name, _tester), tester(_tester), idx(_idx)
{}
int idx;
@@ -60,6 +60,8 @@ class RubyTester : public MemObject
protected:
virtual bool recvTiming(PacketPtr pkt);
virtual Tick recvAtomic(PacketPtr pkt);
+ virtual void recvFunctional(PacketPtr pkt) { }
+ virtual void recvRangeChange() { }
};
struct SenderState : public Packet::SenderState