diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:04 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:04 -0500 |
| commit | 2419903dc0c100b1eb3111a5e0fc9b186c79e6ed (patch) | |
| tree | 38609c5e76f8a81cbf0631ab9df28918f5d98bbd /src | |
| parent | 28227440a7645d2f486c0c1f79ef22514aeaa4c8 (diff) | |
| download | gem5-2419903dc0c100b1eb3111a5e0fc9b186c79e6ed.tar.xz | |
ARM: Make ldrs into the PC and ldm exception return do interworking branches.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/isa/insts/ldr.isa | 4 | ||||
| -rw-r--r-- | src/arch/arm/isa/insts/macromem.isa | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/arm/isa/insts/ldr.isa b/src/arch/arm/isa/insts/ldr.isa index 86cb76383..b058ba73c 100644 --- a/src/arch/arm/isa/insts/ldr.isa +++ b/src/arch/arm/isa/insts/ldr.isa @@ -90,7 +90,7 @@ let {{ eaCode += offset eaCode += ";" - accCode = "Dest = Mem%s;\n" % buildMemSuffix(sign, size) + accCode = "IWDest = Mem%s;\n" % buildMemSuffix(sign, size) if writeback: accCode += "Base = Base %s;\n" % offset base = buildMemBase("MemoryImm", post, writeback) @@ -115,7 +115,7 @@ let {{ eaCode += offset eaCode += ";" - accCode = "Dest = Mem%s;\n" % buildMemSuffix(sign, size) + accCode = "IWDest = Mem%s;\n" % buildMemSuffix(sign, size) if writeback: accCode += "Base = Base %s;\n" % offset base = buildMemBase("MemoryReg", post, writeback) diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index 3a080625f..474e4fab0 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -66,11 +66,11 @@ let {{ ['IsMicroop']) microLdrRetUopCode = ''' - Ra = Mem; uint32_t newCpsr = cpsrWriteByInstr(Cpsr | CondCodes, Spsr, 0xF, true); Cpsr = ~CondCodesMask & newCpsr; CondCodes = CondCodesMask & newCpsr; + IWNPC = Mem | ((Spsr & 0x20) ? 1 : 0); ''' microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop', 'MicroMemOp', |