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authorAndreas Sandberg <andreas.sandberg@arm.com>2015-12-10 10:35:16 +0000
committerAndreas Sandberg <andreas.sandberg@arm.com>2015-12-10 10:35:16 +0000
commit38e2860c36997858131dc47e1152bb583f68608e (patch)
treecb1f9959478b0a3dd06740a276e8e61fadcfaa50 /src
parent139c97c9772be38577eaa52af5d1ef3607da4bcb (diff)
downloadgem5-38e2860c36997858131dc47e1152bb583f68608e.tar.xz
dev: Move the CopyEngine class to src/dev/pci
--HG-- rename : src/dev/CopyEngine.py => src/dev/pci/CopyEngine.py rename : src/dev/copy_engine.cc => src/dev/pci/copy_engine.cc rename : src/dev/copy_engine.hh => src/dev/pci/copy_engine.hh rename : src/dev/copy_engine_defs.hh => src/dev/pci/copy_engine_defs.hh
Diffstat (limited to 'src')
-rw-r--r--src/dev/SConscript3
-rw-r--r--src/dev/pci/CopyEngine.py (renamed from src/dev/CopyEngine.py)2
-rw-r--r--src/dev/pci/SConscript3
-rw-r--r--src/dev/pci/copy_engine.cc (renamed from src/dev/copy_engine.cc)3
-rw-r--r--src/dev/pci/copy_engine.hh (renamed from src/dev/copy_engine.hh)8
-rw-r--r--src/dev/pci/copy_engine_defs.hh (renamed from src/dev/copy_engine_defs.hh)0
6 files changed, 10 insertions, 9 deletions
diff --git a/src/dev/SConscript b/src/dev/SConscript
index 923417078..53bb28456 100644
--- a/src/dev/SConscript
+++ b/src/dev/SConscript
@@ -40,7 +40,6 @@ if env['TARGET_ISA'] == 'null':
Return()
SimObject('BadDevice.py')
-SimObject('CopyEngine.py')
SimObject('DiskImage.py')
SimObject('Ethernet.py')
SimObject('I2C.py')
@@ -51,7 +50,6 @@ SimObject('Terminal.py')
SimObject('Uart.py')
Source('baddev.cc')
-Source('copy_engine.cc')
Source('disk_image.cc')
Source('dma_device.cc')
Source('etherbus.cc')
@@ -85,7 +83,6 @@ Source('uart8250.cc')
DebugFlag('DiskImageRead')
DebugFlag('DiskImageWrite')
DebugFlag('DMA')
-DebugFlag('DMACopyEngine')
DebugFlag('Ethernet')
DebugFlag('MultiEthernet')
DebugFlag('MultiEthernetPkt')
diff --git a/src/dev/CopyEngine.py b/src/dev/pci/CopyEngine.py
index 2db9746d1..f1b9df1b9 100644
--- a/src/dev/CopyEngine.py
+++ b/src/dev/pci/CopyEngine.py
@@ -33,7 +33,7 @@ from PciDevice import PciDevice
class CopyEngine(PciDevice):
type = 'CopyEngine'
- cxx_header = "dev/copy_engine.hh"
+ cxx_header = "dev/pci/copy_engine.hh"
dma = VectorMasterPort("Copy engine DMA port")
VendorID = 0x8086
DeviceID = 0x1a38
diff --git a/src/dev/pci/SConscript b/src/dev/pci/SConscript
index 14214424b..2c48403f8 100644
--- a/src/dev/pci/SConscript
+++ b/src/dev/pci/SConscript
@@ -55,3 +55,6 @@ SimObject('PciHost.py')
Source('host.cc')
DebugFlag('PciHost')
+SimObject('CopyEngine.py')
+Source('copy_engine.cc')
+DebugFlag('DMACopyEngine')
diff --git a/src/dev/copy_engine.cc b/src/dev/pci/copy_engine.cc
index dfeaf1218..fba96a110 100644
--- a/src/dev/copy_engine.cc
+++ b/src/dev/pci/copy_engine.cc
@@ -44,13 +44,14 @@
* Device model for Intel's I/O AT DMA copy engine.
*/
+#include "dev/pci/copy_engine.hh"
+
#include <algorithm>
#include "base/cp_annotate.hh"
#include "base/trace.hh"
#include "debug/DMACopyEngine.hh"
#include "debug/Drain.hh"
-#include "dev/copy_engine.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/CopyEngine.hh"
diff --git a/src/dev/copy_engine.hh b/src/dev/pci/copy_engine.hh
index 754ea5e15..f548c478b 100644
--- a/src/dev/copy_engine.hh
+++ b/src/dev/pci/copy_engine.hh
@@ -45,14 +45,14 @@
* A DMA asyncronous copy engine
*/
-#ifndef __DEV_COPY_ENGINE_HH__
-#define __DEV_COPY_ENGINE_HH__
+#ifndef __DEV_PCI_COPY_ENGINE_HH__
+#define __DEV_PCI_COPY_ENGINE_HH__
#include <vector>
#include "base/cp_annotate.hh"
#include "base/statistics.hh"
-#include "dev/copy_engine_defs.hh"
+#include "dev/pci/copy_engine_defs.hh"
#include "dev/pci/device.hh"
#include "params/CopyEngine.hh"
#include "sim/drain.hh"
@@ -208,5 +208,5 @@ class CopyEngine : public PciDevice
void unserialize(CheckpointIn &cp) override;
};
-#endif //__DEV_COPY_ENGINE_HH__
+#endif //__DEV_PCI_COPY_ENGINE_HH__
diff --git a/src/dev/copy_engine_defs.hh b/src/dev/pci/copy_engine_defs.hh
index 9a88802ed..9a88802ed 100644
--- a/src/dev/copy_engine_defs.hh
+++ b/src/dev/pci/copy_engine_defs.hh