sparc: Pull most of the Nop format out of the ISA description.

The Nop format mostly just made instructions that inherited from the
Nop base class but with different mnemonics, so there doesn't need
to be very much dynamic content.

Change-Id: I1cf5e25ca8372f9b71f56d49756879c7545c9f6c
Reviewed-on: https://gem5-review.googlesource.com/5462
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

5 files changed, 184 insertions, 58 deletions

diff --git a/src/arch/sparc/insts/nop.cc b/src/arch/sparc/insts/nop.cc
new file mode 100644
index 000000000..d1257907f
--- /dev/null
+++ b/src/arch/sparc/insts/nop.cc
@@ -0,0 +1,90 @@
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met: redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer;
+// redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution;
+// neither the name of the copyright holders nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Gabe Black
+//          Steve Reinhardt
+
+////////////////////////////////////////////////////////////////////
+//
+// Nop instruction
+//
+
+// Per-cpu-model nop execute method.
+def template NopExec {{
+}};
+
+output header {{
+        /**
+         * Nop class.
+         */
+        class Nop : public SparcStaticInst
+        {
+          public:
+            // Constructor
+            Nop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
+                SparcStaticInst(mnem, _machInst, __opClass)
+            {
+                flags[IsNop] = true;
+            }
+
+            Fault
+            execute(ExecContext *xc, Trace::InstRecord *traceData) const
+            {
+                return NoFault;
+            }
+
+            std::string generateDisassembly(Addr pc,
+                    const SymbolTable *symtab) const;
+        };
+}};
+
+output decoder {{
+        std::string Nop::generateDisassembly(Addr pc,
+                const SymbolTable *symtab) const
+        {
+            std::stringstream response;
+            printMnemonic(response, mnemonic);
+            return response.str();
+        }
+}};
+
+def template NopExecute {{
+        Fault %(class_name)s::execute(ExecContext *xc,
+                Trace::InstRecord *traceData) const
+        {
+            // Nothing to see here, move along
+            return NoFault;
+        }
+}};
+
+// Primary format for integer operate instructions:
+def format Nop(code, *opt_flags) {{
+        iop = InstObjParams(name, Name, 'Nop', code, opt_flags)
+        header_output = BasicDeclare.subst(iop)
+        decoder_output = BasicConstructor.subst(iop)
+        decode_block = BasicDecode.subst(iop)
+        exec_output = NopExecute.subst(iop)
+}};
diff --git a/src/arch/sparc/insts/nop.hh b/src/arch/sparc/insts/nop.hh
new file mode 100644
index 000000000..b0237be64
--- /dev/null
+++ b/src/arch/sparc/insts/nop.hh
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2006-2007 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ *          Steve Reinhardt
+ */
+
+#ifndef __ARCH_SPARC_INSTS_NOP_HH__
+#define __ARCH_SPARC_INSTS_NOP_HH__
+
+#include "arch/sparc/insts/static_inst.hh"
+
+namespace SparcISA
+{
+
+////////////////////////////////////////////////////////////////////
+//
+// Nop instruction
+//
+
+/**
+ * Nop class.
+ */
+class Nop : public SparcStaticInst
+{
+  public:
+    // Constructor
+    Nop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
+        SparcStaticInst(mnem, _machInst, __opClass)
+    {
+        flags[IsNop] = true;
+    }
+
+    Fault
+    execute(ExecContext *xc, Trace::InstRecord *traceData) const override
+    {
+        return NoFault;
+    }
+
+    std::string
+    generateDisassembly(Addr pc, const SymbolTable *symtab) const override
+    {
+        std::stringstream response;
+        printMnemonic(response, mnemonic);
+        return response.str();
+    }
+};
+
+}
+
+#endif // __ARCH_SPARC_INSTS_NOP_HH__
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index 799fff253..8c23d5f03 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -338,8 +338,8 @@ decode OP default Unknown::unknown()
                 }});
                 // 7-14 should cause an illegal instruction exception
                 0x0F: decode I {
-                    0x0: Nop::stbar({{/*stuff*/}}, IsWriteBarrier, MemWriteOp);
-                    0x1: Nop::membar({{/*stuff*/}}, IsMemBarrier, MemReadOp);
+                    0x0: Nop::stbar(IsWriteBarrier, MemWriteOp);
+                    0x1: Nop::membar(IsMemBarrier, MemReadOp);
                 }
                 0x10: Priv::rdpcr({{Rd = Pcr;}});
                 0x11: Priv::rdpic({{Rd = Pic;}}, {{Pcr<0:>}});
@@ -1041,8 +1041,7 @@ decode OP default Unknown::unknown()
                     }
                 }}, IsSerializeAfter, IsNonSpeculative, IsSyscall);
             }
-            0x3B: Nop::flush({{/*Instruction memory flush*/}}, IsWriteBarrier,
-                          MemWriteOp);
+            0x3B: Nop::flush(IsWriteBarrier, MemWriteOp);
             0x3C: save({{
                 if (Cansave == 0) {
                     if (Otherwin)
@@ -1267,7 +1266,7 @@ decode OP default Unknown::unknown()
             }
             0x26: stqf({{fault = std::make_shared<FpDisabled>();}});
             0x27: Store::stdf({{Mem_udw = Frd_udw;}});
-            0x2D: Nop::prefetch({{ }});
+            0x2D: Nop::prefetch();
             0x30: LoadAlt::ldfa({{Frds_uw = Mem_uw;}});
             0x32: ldqfa({{fault = std::make_shared<FpDisabled>();}});
             format LoadAlt {
@@ -1441,7 +1440,7 @@ decode OP default Unknown::unknown()
                                uint32_t tmp = mem_data;
                                Rd_uw = tmp;
                          }}, MEM_SWAP_COND);
-            0x3D: Nop::prefetcha({{ }});
+            0x3D: Nop::prefetcha();
             0x3E: CasAlt::casxa({{mem_data = gtoh(Rs2);
                                 Mem_udw = Rd_udw; }},
                          {{ Rd_udw = mem_data; }}, MEM_SWAP_COND);
diff --git a/src/arch/sparc/isa/formats/nop.isa b/src/arch/sparc/isa/formats/nop.isa
index d1257907f..6fb609360 100644
--- a/src/arch/sparc/isa/formats/nop.isa
+++ b/src/arch/sparc/isa/formats/nop.isa
@@ -31,60 +31,21 @@
 //
 // Nop instruction
 //
-
-// Per-cpu-model nop execute method.
-def template NopExec {{
-}};
-
-output header {{
-        /**
-         * Nop class.
-         */
-        class Nop : public SparcStaticInst
-        {
-          public:
-            // Constructor
-            Nop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
-                SparcStaticInst(mnem, _machInst, __opClass)
-            {
-                flags[IsNop] = true;
-            }
-
-            Fault
-            execute(ExecContext *xc, Trace::InstRecord *traceData) const
-            {
-                return NoFault;
-            }
-
-            std::string generateDisassembly(Addr pc,
-                    const SymbolTable *symtab) const;
-        };
-}};
-
-output decoder {{
-        std::string Nop::generateDisassembly(Addr pc,
-                const SymbolTable *symtab) const
-        {
-            std::stringstream response;
-            printMnemonic(response, mnemonic);
-            return response.str();
-        }
-}};
-
-def template NopExecute {{
-        Fault %(class_name)s::execute(ExecContext *xc,
-                Trace::InstRecord *traceData) const
-        {
-            // Nothing to see here, move along
-            return NoFault;
-        }
+def template NopDeclare {{
+/**
+ * Static instruction class for "%(mnemonic)s".
+ */
+class %(class_name)s : public %(base_class)s
+{
+  public:
+    %(class_name)s(ExtMachInst machInst);
+};
 }};
 
-// Primary format for integer operate instructions:
-def format Nop(code, *opt_flags) {{
-        iop = InstObjParams(name, Name, 'Nop', code, opt_flags)
-        header_output = BasicDeclare.subst(iop)
+// Format for instructions that don't actually do anything:
+def format Nop(*opt_flags) {{
+        iop = InstObjParams(name, Name, 'Nop', '', opt_flags)
+        header_output = NopDeclare.subst(iop)
         decoder_output = BasicConstructor.subst(iop)
         decode_block = BasicDecode.subst(iop)
-        exec_output = NopExecute.subst(iop)
 }};
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index 599677eb9..fb0196f3d 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -40,6 +40,7 @@ output header {{
 
 #include "arch/sparc/faults.hh"
 #include "arch/sparc/insts/branch.hh"
+#include "arch/sparc/insts/nop.hh"
 #include "arch/sparc/insts/priv.hh"
 #include "arch/sparc/insts/static_inst.hh"
 #include "arch/sparc/insts/trap.hh"