diff options
| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2016-12-05 16:48:29 -0500 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2016-12-05 16:48:29 -0500 |
| commit | 0054f1ad53f00621df82d201b38c03f088786d27 (patch) | |
| tree | afa111820f0bd5582bb7b12629649c2a9d67e08a /src | |
| parent | 9916e4276cf7d5354e8e95c239698ee38a7f8674 (diff) | |
| download | gem5-0054f1ad53f00621df82d201b38c03f088786d27.tar.xz | |
mem: Respond to InvalidateReq when the block is (pending) dirty
Previously when an InvalidateReq snooped a cache with a dirty block or
a pending modified MSHR, it would invalidate the block or set the
postInv flag. The cache would not send an InvalidateResp. though,
causing memory order violations. This patches changes this behavior,
making the cache with the dirty block or pending modified MSHR the
ordering point.
Change-Id: Ib4c31012f4f6693ffb137cd77258b160fbc239ca
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mem/cache/cache.cc | 12 | ||||
| -rw-r--r-- | src/mem/cache/mshr.cc | 3 |
2 files changed, 5 insertions, 10 deletions
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc index 1a169c8ea..9079606cf 100644 --- a/src/mem/cache/cache.cc +++ b/src/mem/cache/cache.cc @@ -1783,9 +1783,6 @@ Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks, // dirty as part of satisfyRequest if (pkt->cmd == MemCmd::WriteLineReq) { assert(!pkt->hasSharers()); - // at the moment other caches do not respond to the - // invalidation requests corresponding to a whole-line write - assert(!pkt->cacheResponding()); } // here we deal with setting the appropriate state of the line, @@ -1985,11 +1982,10 @@ Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing, // We may end up modifying both the block state and the packet (if // we respond in atomic mode), so just figure out what to do now - // and then do it later. If we find dirty data while snooping for - // an invalidate, we don't need to send a response. The + // and then do it later. We respond to all snoops that need + // responses provided we have the block in dirty state. The // invalidation itself is taken care of below. - bool respond = blk->isDirty() && pkt->needsResponse() && - pkt->cmd != MemCmd::InvalidateReq; + bool respond = blk->isDirty() && pkt->needsResponse(); bool have_writable = blk->isWritable(); // Invalidate any prefetch's from below that would strip write permissions @@ -2160,7 +2156,7 @@ Cache::recvTimingSnoopReq(PacketPtr pkt) // state to determine if it is dirty and writable, we use the // command and fields of the writeback packet bool respond = wb_pkt->cmd == MemCmd::WritebackDirty && - pkt->needsResponse() && pkt->cmd != MemCmd::InvalidateReq; + pkt->needsResponse(); bool have_writable = !wb_pkt->hasSharers(); bool invalidate = pkt->isInvalidate(); diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc index 7c560095c..577e8eb79 100644 --- a/src/mem/cache/mshr.cc +++ b/src/mem/cache/mshr.cc @@ -402,8 +402,7 @@ MSHR::handleSnoop(PacketPtr pkt, Counter _order) // Start by determining if we will eventually respond or not, // matching the conditions checked in Cache::handleSnoop - bool will_respond = isPendingModified() && pkt->needsResponse() && - pkt->cmd != MemCmd::InvalidateReq; + bool will_respond = isPendingModified() && pkt->needsResponse(); // The packet we are snooping may be deleted by the time we // actually process the target, and we consequently need to |