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authorGabe Black <gabeblack@google.com>2018-03-05 22:05:47 -0800
committerGabe Black <gabeblack@google.com>2018-03-06 23:39:01 +0000
commit0bb50e6745b35c785c4d8051eb43f6bc419fb924 (patch)
tree97dfd086d6e4b3f4252aec459091ff6dad19f2b6 /src
parent10e5646dbbe46aa317ec568cb2a58968ca867575 (diff)
downloadgem5-0bb50e6745b35c785c4d8051eb43f6bc419fb924.tar.xz
scons: Switch from the print statement to the print function.
Starting with version 3, scons imposes using the print function instead of the print statement in code it processes. To get things building again, this change moves all python code within gem5 to use the function version. Another change by another author separately made this same change to the site_tools and site_init.py files. Change-Id: I2de7dc3b1be756baad6f60574c47c8b7e80ea3b0 Reviewed-on: https://gem5-review.googlesource.com/8761 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src')
-rwxr-xr-xsrc/SConscript6
-rwxr-xr-xsrc/arch/hsail/gen.py4
-rwxr-xr-xsrc/arch/isa_parser.py30
-rw-r--r--src/arch/micro_asm.py10
-rwxr-xr-xsrc/arch/micro_asm_test.py4
-rw-r--r--src/cpu/BaseCPU.py10
-rw-r--r--src/cpu/minor/MinorCPU.py4
-rw-r--r--src/cpu/o3/O3CPU.py4
-rw-r--r--src/cpu/simple/BaseSimpleCPU.py4
-rw-r--r--src/mem/ruby/SConscript4
-rw-r--r--src/mem/slicc/main.py6
-rw-r--r--src/mem/slicc/util.py4
-rw-r--r--src/python/m5/SimObject.py31
-rw-r--r--src/python/m5/debug.py14
-rw-r--r--src/python/m5/event.py4
-rw-r--r--src/python/m5/main.py82
-rw-r--r--src/python/m5/params.py12
-rw-r--r--src/python/m5/simulate.py8
-rw-r--r--src/python/m5/ticks.py4
-rw-r--r--src/python/m5/util/__init__.py14
-rw-r--r--src/python/m5/util/attrdict.py26
-rw-r--r--src/python/m5/util/code_formatter.py4
-rw-r--r--src/python/m5/util/jobfile.py30
-rw-r--r--src/python/m5/util/multidict.py44
-rw-r--r--src/python/m5/util/sorteddict.py26
-rw-r--r--src/python/m5/util/terminal.py18
-rwxr-xr-xsrc/unittest/genini.py4
27 files changed, 232 insertions, 179 deletions
diff --git a/src/SConscript b/src/SConscript
index 1c53160d2..339059dfb 100755
--- a/src/SConscript
+++ b/src/SConscript
@@ -28,6 +28,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import array
import bisect
import functools
@@ -831,7 +833,7 @@ if env['HAVE_PROTOBUF']:
# Add the C++ source file
Source(proto.cc_file, tags=proto.tags)
elif ProtoBuf.all:
- print 'Got protobuf to build, but lacks support!'
+ print('Got protobuf to build, but lacks support!')
Exit(1)
#
@@ -1166,7 +1168,7 @@ elif env['CLANG']:
for target in ['opt', 'fast', 'prof', 'perf']:
ccflags[target] += ['-O3']
else:
- print 'Unknown compiler, please fix compiler options'
+ print('Unknown compiler, please fix compiler options')
Exit(1)
diff --git a/src/arch/hsail/gen.py b/src/arch/hsail/gen.py
index 515d7ed77..bb6012112 100755
--- a/src/arch/hsail/gen.py
+++ b/src/arch/hsail/gen.py
@@ -35,12 +35,14 @@
# Author: Steve Reinhardt
#
+from __future__ import print_function
+
import sys, re
from m5.util import code_formatter
if len(sys.argv) != 4:
- print "Error: need 3 args (file names)"
+ print("Error: need 3 args (file names)")
sys.exit(0)
header_code = code_formatter()
diff --git a/src/arch/isa_parser.py b/src/arch/isa_parser.py
index fe95d06bf..681734985 100755
--- a/src/arch/isa_parser.py
+++ b/src/arch/isa_parser.py
@@ -39,7 +39,7 @@
#
# Authors: Steve Reinhardt
-from __future__ import with_statement
+from __future__ import with_statement, print_function
import os
import sys
import re
@@ -1537,11 +1537,11 @@ class ISAParser(Grammar):
# select the different chunks. If no 'split' directives are used,
# the cpp emissions have no effect.
if re.search('-ns.cc.inc$', filename):
- print >>f, '#if !defined(__SPLIT) || (__SPLIT == 1)'
+ print('#if !defined(__SPLIT) || (__SPLIT == 1)', file=f)
self.splits[f] = 1
# ensure requisite #include's
elif filename == 'decoder-g.hh.inc':
- print >>f, '#include "base/bitfield.hh"'
+ print('#include "base/bitfield.hh"', file=f)
return f
@@ -1596,11 +1596,11 @@ class ISAParser(Grammar):
fn = 'decoder-ns.cc.inc'
assert(fn in self.files)
- print >>f, 'namespace %s {' % self.namespace
+ print('namespace %s {' % self.namespace, file=f)
if splits > 1:
- print >>f, '#define __SPLIT %u' % i
- print >>f, '#include "%s"' % fn
- print >>f, '}'
+ print('#define __SPLIT %u' % i, file=f)
+ print('#include "%s"' % fn, file=f)
+ print('}', file=f)
# instruction execution
splits = self.splits[self.get_file('exec')]
@@ -1617,11 +1617,11 @@ class ISAParser(Grammar):
fn = 'exec-ns.cc.inc'
assert(fn in self.files)
- print >>f, 'namespace %s {' % self.namespace
+ print('namespace %s {' % self.namespace, file=f)
if splits > 1:
- print >>f, '#define __SPLIT %u' % i
- print >>f, '#include "%s"' % fn
- print >>f, '}'
+ print('#define __SPLIT %u' % i, file=f)
+ print('#include "%s"' % fn, file=f)
+ print('}', file=f)
# max_inst_regs.hh
self.update('max_inst_regs.hh',
@@ -2019,7 +2019,7 @@ del wrap
def p_def_template(self, t):
'def_template : DEF TEMPLATE ID CODELIT SEMI'
if t[3] in self.templateMap:
- print "warning: template %s already defined" % t[3]
+ print("warning: template %s already defined" % t[3])
self.templateMap[t[3]] = Template(self, t[4])
# An instruction format definition looks like
@@ -2604,9 +2604,9 @@ StaticInstPtr
try:
self._parse_isa_desc(*args, **kwargs)
except ISAParserError, e:
- print backtrace(self.fileNameStack)
- print "At %s:" % e.lineno
- print e
+ print(backtrace(self.fileNameStack))
+ print("At %s:" % e.lineno)
+ print(e)
sys.exit(1)
# Called as script: get args from command line.
diff --git a/src/arch/micro_asm.py b/src/arch/micro_asm.py
index 4e5400cef..263e73afd 100644
--- a/src/arch/micro_asm.py
+++ b/src/arch/micro_asm.py
@@ -26,6 +26,8 @@
#
# Authors: Gabe Black
+from __future__ import print_function
+
import os
import sys
import re
@@ -117,9 +119,9 @@ class Directive(Statement):
##########################################################################
def print_error(message):
- print
- print "*** %s" % message
- print
+ print()
+ print("*** %s" % message)
+ print()
def handle_statement(parser, container, statement):
if statement.is_microop:
@@ -153,7 +155,7 @@ def handle_statement(parser, container, statement):
statement.params, {}, parser.symbols)
except:
print_error("Error executing directive.")
- print container.directives
+ print(container.directives)
raise
else:
raise Exception, "Didn't recognize the type of statement", statement
diff --git a/src/arch/micro_asm_test.py b/src/arch/micro_asm_test.py
index b074ecb58..e5755f717 100755
--- a/src/arch/micro_asm_test.py
+++ b/src/arch/micro_asm_test.py
@@ -26,6 +26,8 @@
#
# Authors: Gabe Black
+from __future__ import print_function
+
from micro_asm import MicroAssembler, Combinational_Macroop, Rom_Macroop, Rom
class Bah(object):
@@ -58,7 +60,7 @@ class TestMacroop(Combinational_Macroop):
def untweak(self):
microops["bah"] = Bah
def print_debug(self, message):
- print message
+ print(message)
def __init__(self, name):
super(TestMacroop, self).__init__(name)
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 096aa635e..e02d36724 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -42,6 +42,8 @@
# Andreas Hansson
# Glenn Bergmans
+from __future__ import print_function
+
import sys
from m5.SimObject import *
@@ -200,8 +202,8 @@ class BaseCPU(MemObject):
[], "Interrupt Controller")
isa = VectorParam.RiscvISA([], "ISA instance")
else:
- print "Don't know what TLB to use for ISA %s" % \
- buildEnv['TARGET_ISA']
+ print("Don't know what TLB to use for ISA %s" %
+ buildEnv['TARGET_ISA'])
sys.exit(1)
max_insts_all_threads = Param.Counter(0,
@@ -260,8 +262,8 @@ class BaseCPU(MemObject):
self.interrupts = \
[RiscvInterrupts() for i in xrange(self.numThreads)]
else:
- print "Don't know what Interrupt Controller to use for ISA %s" % \
- buildEnv['TARGET_ISA']
+ print("Don't know what Interrupt Controller to use for ISA %s" %
+ buildEnv['TARGET_ISA'])
sys.exit(1)
def connectCachedPorts(self, bus):
diff --git a/src/cpu/minor/MinorCPU.py b/src/cpu/minor/MinorCPU.py
index 5954f7b1e..87a30497c 100644
--- a/src/cpu/minor/MinorCPU.py
+++ b/src/cpu/minor/MinorCPU.py
@@ -40,6 +40,8 @@
# Nathan Binkert
# Andrew Bardsley
+from __future__ import print_function
+
from m5.defines import buildEnv
from m5.params import *
from m5.proxy import *
@@ -275,5 +277,5 @@ class MinorCPU(BaseCPU):
numThreads = Parent.numThreads), "Branch Predictor")
def addCheckerCpu(self):
- print "Checker not yet supported by MinorCPU"
+ print("Checker not yet supported by MinorCPU")
exit(1)
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index 8507ab6ff..b8152f663 100644
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -38,6 +38,8 @@
#
# Authors: Kevin Lim
+from __future__ import print_function
+
from m5.defines import buildEnv
from m5.params import *
from m5.proxy import *
@@ -173,5 +175,5 @@ class DerivO3CPU(BaseCPU):
self.checker.cpu_id = self.cpu_id
else:
- print "ERROR: Checker only supported under ARM ISA!"
+ print("ERROR: Checker only supported under ARM ISA!")
exit(1)
diff --git a/src/cpu/simple/BaseSimpleCPU.py b/src/cpu/simple/BaseSimpleCPU.py
index 7298724ea..b40458482 100644
--- a/src/cpu/simple/BaseSimpleCPU.py
+++ b/src/cpu/simple/BaseSimpleCPU.py
@@ -26,6 +26,8 @@
#
# Authors: Gabe Black
+from __future__ import print_function
+
from m5.defines import buildEnv
from m5.params import *
from BaseCPU import BaseCPU
@@ -45,7 +47,7 @@ class BaseSimpleCPU(BaseCPU):
self.checker.itb = ArmTLB(size = self.itb.size)
self.checker.dtb = ArmTLB(size = self.dtb.size)
else:
- print "ERROR: Checker only supported under ARM ISA!"
+ print("ERROR: Checker only supported under ARM ISA!")
exit(1)
branchPred = Param.BranchPredictor(NULL, "Branch Predictor")
diff --git a/src/mem/ruby/SConscript b/src/mem/ruby/SConscript
index 5cae880bd..64e798fd5 100644
--- a/src/mem/ruby/SConscript
+++ b/src/mem/ruby/SConscript
@@ -28,6 +28,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import os
import sys
@@ -101,7 +103,7 @@ generated_dir = Dir('../protocol')
def MakeIncludeAction(target, source, env):
f = file(str(target[0]), 'w')
for s in source:
- print >>f, '#include "%s"' % str(s.abspath)
+ print('#include "%s"' % str(s.abspath), file=f)
f.close()
def MakeInclude(source):
diff --git a/src/mem/slicc/main.py b/src/mem/slicc/main.py
index 0b528d805..05a5cdb97 100644
--- a/src/mem/slicc/main.py
+++ b/src/mem/slicc/main.py
@@ -25,6 +25,8 @@
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+from __future__ import print_function
+
import os
import sys
@@ -45,7 +47,7 @@ def eprint(format, *args):
if args:
format = format % args
- print >>sys.stderr, format
+ print(format, file=sys.stderr)
def main(args=None):
import optparse
@@ -79,7 +81,7 @@ def main(args=None):
if opts.print_files:
for i in sorted(slicc.files()):
- print ' %s' % i
+ print(' %s' % i)
else:
output("Processing AST...")
slicc.process()
diff --git a/src/mem/slicc/util.py b/src/mem/slicc/util.py
index 83badf46d..3a0cf5f35 100644
--- a/src/mem/slicc/util.py
+++ b/src/mem/slicc/util.py
@@ -24,6 +24,8 @@
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+from __future__ import print_function
+
import os
import sys
@@ -66,7 +68,7 @@ class Location(object):
if args:
message = message % args
#raise Exception, "%s: Warning: %s" % (self, message)
- print >>sys.stderr, "%s: Warning: %s" % (self, message)
+ print("%s: Warning: %s" % (self, message), file=sys.stderr)
def error(self, message, *args):
if args:
diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 919c0e852..6e61961bd 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -43,6 +43,8 @@
# Andreas Hansson
# Andreas Sandberg
+from __future__ import print_function
+
import sys
from types import FunctionType, MethodType, ModuleType
from functools import wraps
@@ -768,8 +770,8 @@ module_init(py::module &m_internal)
try:
ptypes = [p.ptype for p in params]
except:
- print cls, p, p.ptype_str
- print params
+ print(cls, p, p.ptype_str)
+ print(params)
raise
class_path = cls._value_dict['cxx_class'].split('::')
@@ -962,7 +964,7 @@ class SimObject(object):
def enumerateParams(self, flags_dict = {},
cmd_line_str = "", access_str = ""):
if hasattr(self, "_paramEnumed"):
- print "Cycle detected enumerating params"
+ print("Cycle detected enumerating params")
else:
self._paramEnumed = True
# Scan the children first to pick up all the objects in this SimObj
@@ -1334,8 +1336,8 @@ class SimObject(object):
try:
value = value.unproxy(self)
except:
- print "Error in unproxying param '%s' of %s" % \
- (param, self.path())
+ print("Error in unproxying param '%s' of %s" %
+ (param, self.path()))
raise
setattr(self, param, value)
@@ -1349,30 +1351,31 @@ class SimObject(object):
port.unproxy(self)
def print_ini(self, ini_file):
- print >>ini_file, '[' + self.path() + ']' # .ini section header
+ print('[' + self.path() + ']', file=ini_file) # .ini section header
instanceDict[self.path()] = self
if hasattr(self, 'type'):
- print >>ini_file, 'type=%s' % self.type
+ print('type=%s' % self.type, file=ini_file)
if len(self._children.keys()):
- print >>ini_file, 'children=%s' % \
- ' '.join(self._children[n].get_name() \
- for n in sorted(self._children.keys()))
+ print('children=%s' %
+ ' '.join(self._children[n].get_name()
+ for n in sorted(self._children.keys())),
+ file=ini_file)
for param in sorted(self._params.keys()):
value = self._values.get(param)
if value != None:
- print >>ini_file, '%s=%s' % (param,
- self._values[param].ini_str())
+ print('%s=%s' % (param, self._values[param].ini_str()),
+ file=ini_file)
for port_name in sorted(self._ports.keys()):
port = self._port_refs.get(port_name, None)
if port != None:
- print >>ini_file, '%s=%s' % (port_name, port.ini_str())
+ print('%s=%s' % (port_name, port.ini_str()), file=ini_file)
- print >>ini_file # blank line between objects
+ print(file=ini_file) # blank line between objects
# generate a tree of dictionaries expressing all the parameters in the
# instantiated system for use by scripts that want to do power, thermal
diff --git a/src/python/m5/debug.py b/src/python/m5/debug.py
index 839c32d98..f7e34a728 100644
--- a/src/python/m5/debug.py
+++ b/src/python/m5/debug.py
@@ -26,6 +26,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
from UserDict import DictMixin
import _m5.debug
@@ -34,25 +36,25 @@ from _m5.debug import schedBreak, setRemoteGDBPort
from m5.util import printList
def help():
- print "Base Flags:"
+ print("Base Flags:")
for name in sorted(flags):
if name == 'All':
continue
flag = flags[name]
children = [c for c in flag.kids() ]
if not children:
- print " %s: %s" % (name, flag.desc())
- print
- print "Compound Flags:"
+ print(" %s: %s" % (name, flag.desc()))
+ print()
+ print("Compound Flags:")
for name in sorted(flags):
if name == 'All':
continue
flag = flags[name]
children = [c for c in flag.kids() ]
if children:
- print " %s: %s" % (name, flag.desc())
+ print(" %s: %s" % (name, flag.desc()))
printList([ c.name() for c in children ], indent=8)
- print
+ print()
class AllFlags(DictMixin):
def __init__(self):
diff --git a/src/python/m5/event.py b/src/python/m5/event.py
index 59d18b6fe..74863a953 100644
--- a/src/python/m5/event.py
+++ b/src/python/m5/event.py
@@ -40,6 +40,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import m5
import _m5.event
@@ -76,7 +78,7 @@ class ProgressEvent(Event):
self.eventq.schedule(self, m5.curTick() + self.period)
def __call__(self):
- print "Progress! Time now %fs" % (m5.curTick()/1e12)
+ print("Progress! Time now %fs" % (m5.curTick()/1e12))
self.eventq.schedule(self, m5.curTick() + self.period)
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index ad452886a..9d46d4331 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -38,6 +38,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import code
import datetime
import os
@@ -230,12 +232,12 @@ def main(*args):
# Print redirection notices here before doing any redirection
if options.redirect_stdout and not options.redirect_stderr:
- print "Redirecting stdout and stderr to", stdout_file
+ print("Redirecting stdout and stderr to", stdout_file)
else:
if options.redirect_stdout:
- print "Redirecting stdout to", stdout_file
+ print("Redirecting stdout to", stdout_file)
if options.redirect_stderr:
- print "Redirecting stderr to", stderr_file
+ print("Redirecting stderr to", stderr_file)
# Now redirect stdout/stderr as desired
if options.redirect_stdout:
@@ -252,28 +254,28 @@ def main(*args):
if options.build_info:
done = True
- print 'Build information:'
- print
- print 'compiled %s' % defines.compileDate;
- print 'build options:'
+ print('Build information:')
+ print()
+ print('compiled %s' % defines.compileDate)
+ print('build options:')
keys = defines.buildEnv.keys()
keys.sort()
for key in keys:
val = defines.buildEnv[key]
- print ' %s = %s' % (key, val)
- print
+ print(' %s = %s' % (key, val))
+ print()
if options.copyright:
done = True
- print info.COPYING
- print
+ print(info.COPYING)
+ print()
if options.readme:
done = True
- print 'Readme:'
- print
- print info.README
- print
+ print('Readme:')
+ print()
+ print(info.README)
+ print()
if options.debug_help:
done = True
@@ -283,23 +285,23 @@ def main(*args):
if options.list_sim_objects:
import SimObject
done = True
- print "SimObjects:"
+ print("SimObjects:")
objects = SimObject.allClasses.keys()
objects.sort()
for name in objects:
obj = SimObject.allClasses[name]
- print " %s" % obj
+ print(" %s" % obj)
params = obj._params.keys()
params.sort()
for pname in params:
param = obj._params[pname]
default = getattr(param, 'default', '')
- print " %s" % pname
+ print(" %s" % pname)
if default:
- print " default: %s" % default
- print " desc: %s" % param.desc
- print
- print
+ print(" default: %s" % default)
+ print(" desc: %s" % param.desc)
+ print()
+ print()
if done:
sys.exit(0)
@@ -310,26 +312,26 @@ def main(*args):
verbose = options.verbose - options.quiet
if verbose >= 0:
- print "gem5 Simulator System. http://gem5.org"
- print brief_copyright
- print
+ print("gem5 Simulator System. http://gem5.org")
+ print(brief_copyright)
+ print()
- print "gem5 compiled %s" % defines.compileDate;
+ print("gem5 compiled %s" % defines.compileDate)
- print "gem5 started %s" % \
- datetime.datetime.now().strftime("%b %e %Y %X")
- print "gem5 executing on %s, pid %d" % \
- (socket.gethostname(), os.getpid())
+ print("gem5 started %s" %
+ datetime.datetime.now().strftime("%b %e %Y %X"))
+ print("gem5 executing on %s, pid %d" %
+ (socket.gethostname(), os.getpid()))
# in Python 3 pipes.quote() is moved to shlex.quote()
import pipes
- print "command line:", " ".join(map(pipes.quote, sys.argv))
- print
+ print("command line:", " ".join(map(pipes.quote, sys.argv)))
+ print()
# check to make sure we can find the listed script
if not arguments or not os.path.isfile(arguments[0]):
if arguments and not os.path.isfile(arguments[0]):
- print "Script %s not found" % arguments[0]
+ print("Script %s not found" % arguments[0])
options.usage(2)
@@ -375,7 +377,7 @@ def main(*args):
off = True
if flag not in debug.flags:
- print >>sys.stderr, "invalid debug flag '%s'" % flag
+ print("invalid debug flag '%s'" % flag, file=sys.stderr)
sys.exit(1)
if off:
@@ -420,11 +422,11 @@ def main(*args):
try:
pdb.run(filecode, scope)
except SystemExit:
- print "The program exited via sys.exit(). Exit status: ",
- print sys.exc_info()[1]
+ print("The program exited via sys.exit(). Exit status: ", end=' ')
+ print(sys.exc_info()[1])
except:
traceback.print_exc()
- print "Uncaught exception. Entering post mortem debugging"
+ print("Uncaught exception. Entering post mortem debugging")
t = sys.exc_info()[2]
while t.tb_next is not None:
t = t.tb_next
@@ -441,9 +443,9 @@ if __name__ == '__main__':
options, arguments = parse_options()
- print 'opts:'
+ print('opts:')
pprint(options, indent=4)
- print
+ print()
- print 'args:'
+ print('args:')
pprint(arguments, indent=4)
diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index 11a55e558..483e632f5 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -59,6 +59,8 @@
#
#####################################################################
+from __future__ import print_function
+
import copy
import datetime
import re
@@ -311,7 +313,7 @@ class SimObjectVector(VectorParamValue):
cmd_line_str = "",
access_str = ""):
if hasattr(self, "_paramEnumed"):
- print "Cycle detected enumerating params at %s?!" % (cmd_line_str)
+ print("Cycle detected enumerating params at %s?!" % (cmd_line_str))
else:
x = 0
for vals in self:
@@ -1826,8 +1828,8 @@ class PortRef(object):
try:
realPeer = self.peer.unproxy(self.simobj)
except:
- print "Error in unproxying port '%s' of %s" % \
- (self.name, self.simobj.path())
+ print("Error in unproxying port '%s' of %s" %
+ (self.name, self.simobj.path()))
raise
self.connect(realPeer)
@@ -1856,9 +1858,9 @@ class PortRef(object):
connectPorts(self.simobj.getCCObject(), self.name, self.index,
peer.simobj.getCCObject(), peer.name, peer.index)
except:
- print "Error connecting port %s.%s to %s.%s" % \
+ print("Error connecting port %s.%s to %s.%s" %
(self.simobj.path(), self.name,
- peer.simobj.path(), peer.name)
+ peer.simobj.path(), peer.name))
raise
self.ccConnected = True
peer.ccConnected = True
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py
index c47dd2250..0e1a67e47 100644
--- a/src/python/m5/simulate.py
+++ b/src/python/m5/simulate.py
@@ -40,6 +40,8 @@
# Authors: Nathan Binkert
# Steve Reinhardt
+from __future__ import print_function
+
import atexit
import os
import sys
@@ -223,7 +225,7 @@ def checkpoint(dir):
drain()
memWriteback(root)
- print "Writing checkpoint"
+ print("Writing checkpoint")
_m5.core.serializeAll(dir)
def _changeMemoryMode(system, mode):
@@ -233,7 +235,7 @@ def _changeMemoryMode(system, mode):
if system.getMemoryMode() != mode:
system.setMemoryMode(mode)
else:
- print "System already in target mode. Memory mode unchanged."
+ print("System already in target mode. Memory mode unchanged.")
def switchCpus(system, cpuList, verbose=True):
"""Switch CPUs in a system.
@@ -248,7 +250,7 @@ def switchCpus(system, cpuList, verbose=True):
"""
if verbose:
- print "switching cpus"
+ print("switching cpus")
if not isinstance(cpuList, list):
raise RuntimeError, "Must pass a list to this function"
diff --git a/src/python/m5/ticks.py b/src/python/m5/ticks.py
index ce9459f2a..582c65cac 100644
--- a/src/python/m5/ticks.py
+++ b/src/python/m5/ticks.py
@@ -26,6 +26,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import sys
from m5.util import warn
@@ -39,7 +41,7 @@ def fixGlobalFrequency():
if not tps_fixed:
tps_fixed = True
_m5.core.setClockFrequency(int(tps))
- print "Global frequency set at %d ticks per second" % int(tps)
+ print("Global frequency set at %d ticks per second" % int(tps))
def setGlobalFrequency(ticksPerSecond):
from m5.util import convert
diff --git a/src/python/m5/util/__init__.py b/src/python/m5/util/__init__.py
index 573674879..2ad9c5627 100644
--- a/src/python/m5/util/__init__.py
+++ b/src/python/m5/util/__init__.py
@@ -39,6 +39,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import os
import re
import sys
@@ -57,26 +59,26 @@ from sorteddict import SortedDict
# ever happen regardless of what the user does (i.e., an acutal m5
# bug).
def panic(fmt, *args):
- print >>sys.stderr, 'panic:', fmt % args
+ print('panic:', fmt % args, file=sys.stderr)
sys.exit(1)
# fatal() should be called when the simulation cannot continue due to
# some condition that is the user's fault (bad configuration, invalid
# arguments, etc.) and not a simulator bug.
def fatal(fmt, *args):
- print >>sys.stderr, 'fatal:', fmt % args
+ print('fatal:', fmt % args, file=sys.stderr)
sys.exit(1)
# warn() should be called when the user should be warned about some condition
# that may or may not be the user's fault, but that they should be made aware
# of as it may affect the simulation or results.
def warn(fmt, *args):
- print >>sys.stderr, 'warn:', fmt % args
+ print('warn:', fmt % args, file=sys.stderr)
# inform() should be called when the user should be informed about some
# condition that they may be interested in.
def inform(fmt, *args):
- print >>sys.stdout, 'info:', fmt % args
+ print('info:', fmt % args, file=sys.stdout)
class Singleton(type):
def __call__(cls, *args, **kwargs):
@@ -166,14 +168,14 @@ def printList(items, indent=4):
line = ' ' * indent
for i,item in enumerate(items):
if len(line) + len(item) > 76:
- print line
+ print(line)
line = ' ' * indent
if i < len(items) - 1:
line += '%s, ' % item
else:
line += item
- print line
+ print(line)
def readCommand(cmd, **kwargs):
"""run the command cmd, read the results and return them
diff --git a/src/python/m5/util/attrdict.py b/src/python/m5/util/attrdict.py
index cb83e9e24..d444d5d99 100644
--- a/src/python/m5/util/attrdict.py
+++ b/src/python/m5/util/attrdict.py
@@ -26,6 +26,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
__all__ = [ 'attrdict', 'multiattrdict', 'optiondict' ]
class attrdict(dict):
@@ -77,24 +79,24 @@ if __name__ == '__main__':
x = attrdict()
x.y = 1
x['z'] = 2
- print x['y'], x.y
- print x['z'], x.z
- print dir(x)
- print x
+ print(x['y'], x.y)
+ print(x['z'], x.z)
+ print(dir(x))
+ print(x)
- print
+ print()
del x['y']
del x.z
- print dir(x)
+ print(dir(x))
print(x)
- print
- print "multiattrdict"
+ print()
+ print("multiattrdict")
x = multiattrdict()
x.x.x.x = 9
x.y.z = 9
- print x
- print x.y
- print x.y.z
- print x.z.z
+ print(x)
+ print(x.y)
+ print(x.y.z)
+ print(x.z.z)
diff --git a/src/python/m5/util/code_formatter.py b/src/python/m5/util/code_formatter.py
index 023e189cd..a11c9d3d0 100644
--- a/src/python/m5/util/code_formatter.py
+++ b/src/python/m5/util/code_formatter.py
@@ -24,6 +24,8 @@
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+from __future__ import print_function
+
import __builtin__
import inspect
import os
@@ -312,4 +314,4 @@ if __name__ == '__main__':
}
''', 1, 9)
- print f,
+ print(f, end=' ')
diff --git a/src/python/m5/util/jobfile.py b/src/python/m5/util/jobfile.py
index 9c59778e5..d8c09afd4 100644
--- a/src/python/m5/util/jobfile.py
+++ b/src/python/m5/util/jobfile.py
@@ -26,6 +26,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import sys
class Data(object):
@@ -69,12 +71,12 @@ class Data(object):
def printinfo(self):
if self.name:
- print 'name: %s' % self.name
+ print('name: %s' % self.name)
if self.desc:
- print 'desc: %s' % self.desc
+ print('desc: %s' % self.desc)
try:
if self.system:
- print 'system: %s' % self.system
+ print('system: %s' % self.system)
except AttributeError:
pass
@@ -84,8 +86,8 @@ class Data(object):
if isinstance(val, dict):
import pprint
val = pprint.pformat(val)
- print '%-20s = %s' % (key, val)
- print
+ print('%-20s = %s' % (key, val))
+ print()
def __contains__(self, attr):
if attr.startswith('_'):
@@ -186,10 +188,10 @@ class Job(Data):
def printinfo(self):
super(Job, self).printinfo()
if self._checkpoint:
- print 'checkpoint: %s' % self._checkpoint.name
- print 'config: %s' % self._config.name
- print 'groups: %s' % [ g.name for g in self._groups ]
- print 'options: %s' % [ o.name for o in self._options ]
+ print('checkpoint: %s' % self._checkpoint.name)
+ print('config: %s' % self._config.name)
+ print('groups: %s' % [ g.name for g in self._groups ])
+ print('options: %s' % [ o.name for o in self._options ])
super(Job, self).printverbose()
class SubOption(Data):
@@ -253,7 +255,7 @@ class Option(Data):
def printinfo(self):
super(Option, self).printinfo()
- print 'config: %s' % self._config.name
+ print('config: %s' % self._config.name)
super(Option, self).printverbose()
class Group(Data):
@@ -283,8 +285,8 @@ class Group(Data):
def printinfo(self):
super(Group, self).printinfo()
- print 'config: %s' % self._config.name
- print 'options: %s' % [ o.name for o in self._options ]
+ print('config: %s' % self._config.name)
+ print('options: %s' % [ o.name for o in self._options ])
super(Group, self).printverbose()
class Configuration(Data):
@@ -397,7 +399,7 @@ class Configuration(Data):
def printinfo(self):
super(Configuration, self).printinfo()
- print 'groups: %s' % [ g.name for g in self._groups ]
+ print('groups: %s' % [ g.name for g in self._groups ])
super(Configuration, self).printverbose()
def JobFile(jobfile):
@@ -466,7 +468,7 @@ def main(conf=None):
cpt = ''
if job._checkpoint:
cpt = job._checkpoint.name
- print job.name, cpt
+ print(job.name, cpt)
if __name__ == '__main__':
main()
diff --git a/src/python/m5/util/multidict.py b/src/python/m5/util/multidict.py
index b5cd700ef..d22b1cbbc 100644
--- a/src/python/m5/util/multidict.py
+++ b/src/python/m5/util/multidict.py
@@ -26,6 +26,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
__all__ = [ 'multidict' ]
class multidict(object):
@@ -116,10 +118,10 @@ class multidict(object):
return default
def _dump(self):
- print 'multidict dump'
+ print('multidict dump')
node = self
while isinstance(node, multidict):
- print ' ', node.local
+ print(' ', node.local)
node = node.parent
def _dumpkey(self, key):
@@ -129,7 +131,7 @@ class multidict(object):
if key in node.local:
values.append(node.local[key])
node = node.parent
- print key, values
+ print(key, values)
if __name__ == '__main__':
test1 = multidict()
@@ -150,33 +152,33 @@ if __name__ == '__main__':
test2.setdefault('f', multidict)
- print 'test1>', test1.items()
- print 'test2>', test2.items()
- #print test1['a']
- print test1['b']
- print test1['c']
- print test1['d']
- print test1['e']
+ print('test1>', test1.items())
+ print('test2>', test2.items())
+ #print(test1['a'])
+ print(test1['b'])
+ print(test1['c'])
+ print(test1['d'])
+ print(test1['e'])
- print test2['a']
- #print test2['b']
- print test2['c']
- print test2['d']
- print test2['e']
+ print(test2['a'])
+ #print(test2['b'])
+ print(test2['c'])
+ print(test2['d'])
+ print(test2['e'])
for key in test2.iterkeys():
- print key
+ print(key)
test2.get('g', 'foo')
#test2.get('b')
test2.get('b', 'bar')
test2.setdefault('b', 'blah')
- print test1
- print test2
- print `test2`
+ print(test1)
+ print(test2)
+ print(`test2`)
- print len(test2)
+ print(len(test2))
test3['a'] = [ 0, 1, 2, 3 ]
- print test4
+ print(test4)
diff --git a/src/python/m5/util/sorteddict.py b/src/python/m5/util/sorteddict.py
index ef32be3af..abe28376d 100644
--- a/src/python/m5/util/sorteddict.py
+++ b/src/python/m5/util/sorteddict.py
@@ -24,6 +24,8 @@
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+from __future__ import print_function
+
from bisect import bisect_left, bisect_right
class SortedDict(dict):
@@ -181,21 +183,21 @@ class SortedDict(dict):
if __name__ == '__main__':
def display(d):
- print d
- print d.keys()
- print list(d.iterkeys())
- print d.values()
- print list(d.itervalues())
- print d.items()
- print list(d.iteritems())
+ print(d)
+ print(d.keys())
+ print(list(d.iterkeys()))
+ print(d.values())
+ print(list(d.itervalues()))
+ print(d.items())
+ print(list(d.iteritems()))
d = SortedDict(x=24,e=5,j=4,b=2,z=26,d=4)
display(d)
- print 'popitem', d.popitem()
+ print('popitem', d.popitem())
display(d)
- print 'pop j'
+ print('pop j')
d.pop('j')
display(d)
@@ -212,9 +214,9 @@ if __name__ == '__main__':
d['y'] = 26
display(d)
- print `d`
+ print(`d`)
- print d.copy()
+ print(d.copy())
for k,v in d.itemrange('d', 'z', inclusive=True):
- print k,v
+ print(k, v)
diff --git a/src/python/m5/util/terminal.py b/src/python/m5/util/terminal.py
index 6bf85f14d..9dc5d9850 100644
--- a/src/python/m5/util/terminal.py
+++ b/src/python/m5/util/terminal.py
@@ -26,6 +26,8 @@
#
# Author: Steve Reinhardt
+from __future__ import print_function
+
import sys
# Intended usage example:
@@ -36,7 +38,7 @@ import sys
# from m5.util.terminal import no_termcap as termcap
# else:
# from m5.util.terminal import tty_termcap as termcap
-# print termcap.Blue + "This could be blue!" + termcap.Normal
+# print(termcap.Blue + "This could be blue!" + termcap.Normal)
# ANSI color names in index order
color_names = "Black Red Green Yellow Blue Magenta Cyan".split()
@@ -105,18 +107,18 @@ def get_termcap(use_colors = None):
def test_termcap(obj):
for c_name in color_names:
c_str = getattr(obj, c_name)
- print c_str + c_name + obj.Normal
+ print(c_str + c_name + obj.Normal)
for attr_name in capability_names:
if attr_name == 'Normal':
continue
attr_str = getattr(obj, attr_name)
- print attr_str + c_str + attr_name + " " + c_name + obj.Normal
- print obj.Bold + obj.Underline + \
- c_name + "Bold Underline " + c + obj.Normal
+ print(attr_str + c_str + attr_name + " " + c_name + obj.Normal)
+ print(obj.Bold + obj.Underline +
+ c_name + "Bold Underline " + c + obj.Normal)
if __name__ == '__main__':
- print "=== termcap enabled ==="
+ print("=== termcap enabled ===")
test_termcap(termcap)
- print termcap.Normal
- print "=== termcap disabled ==="
+ print(termcap.Normal)
+ print("=== termcap disabled ===")
test_termcap(no_termcap)
diff --git a/src/unittest/genini.py b/src/unittest/genini.py
index 19e6442de..5a4f3454b 100755
--- a/src/unittest/genini.py
+++ b/src/unittest/genini.py
@@ -27,6 +27,8 @@
#
# Authors: Nathan Binkert
+from __future__ import print_function
+
import getopt, os, os.path, sys
from os.path import join as joinpath, realpath
@@ -71,4 +73,4 @@ for arg in args:
if globals().has_key('root') and isinstance(root, Root):
instantiate(root)
else:
- print "Instantiation skipped: no root object found."
+ print("Instantiation skipped: no root object found.")