cpu: Initialize the O3 pipeline from startup()

The entire O3 pipeline used to be initialized from init(), which is
called before initState() or unserialize(). This causes the pipeline
to be initialized from an incorrect thread context. This doesn't
currently lead to correctness problems as instructions fetched from
the incorrect start PC will be squashed a few cycles after
initialization.

This patch will affect the regressions since the O3 CPU now issues its
first instruction fetch to the correct PC instead of 0x0.

10 files changed, 23 insertions, 17 deletions

diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 489656a7d..fdd9609a4 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -195,7 +195,7 @@ class DefaultCommit
     void setROB(ROB *rob_ptr);
 
     /** Initializes stage by sending back the number of free entries. */
-    void initStage();
+    void startupStage();
 
     /** Initializes the draining of commit. */
     bool drain();
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 351b4794d..bff5c5ae9 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2011 ARM Limited
+ * Copyright (c) 2010-2012 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -348,7 +348,7 @@ DefaultCommit<Impl>::setROB(ROB *rob_ptr)
 
 template <class Impl>
 void
-DefaultCommit<Impl>::initStage()
+DefaultCommit<Impl>::startupStage()
 {
     rob->setActiveThreads(activeThreads);
     rob->resetEntries();
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 2e972b765..0419a6173 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -679,17 +679,21 @@ FullO3CPU<Impl>::init()
     for (int tid = 0; tid < numThreads; ++tid)
         thread[tid]->noSquashFromTC = false;
 
-    // Initialize stages.
-    fetch.initStage();
-    iew.initStage();
-    rename.initStage();
-    commit.initStage();
-
     commit.setThreads(thread);
 }
 
 template <class Impl>
 void
+FullO3CPU<Impl>::startup()
+{
+    fetch.startupStage();
+    iew.startupStage();
+    rename.startupStage();
+    commit.startupStage();
+}
+
+template <class Impl>
+void
 FullO3CPU<Impl>::activateThread(ThreadID tid)
 {
     list<ThreadID>::iterator isActive =
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 06e1ea336..eda9d9e91 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -369,6 +369,8 @@ class FullO3CPU : public BaseO3CPU
     /** Initialize the CPU */
     void init();
 
+    void startup();
+
     /** Returns the Number of Active Threads in the CPU */
     int numActiveThreads()
     { return activeThreads.size(); }
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 42ea5cb71..702a45e15 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -215,7 +215,7 @@ class DefaultFetch
     void setFetchQueue(TimeBuffer<FetchStruct> *fq_ptr);
 
     /** Initialize stage. */
-    void initStage();
+    void startupStage();
 
     /** Tells the fetch stage that the Icache is set. */
     void setIcache();
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 9efe30309..87d2bc593 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -302,7 +302,7 @@ DefaultFetch<Impl>::setFetchQueue(TimeBuffer<FetchStruct> *fq_ptr)
 
 template<class Impl>
 void
-DefaultFetch<Impl>::initStage()
+DefaultFetch<Impl>::startupStage()
 {
     // Setup PC and nextPC with initial state.
     for (ThreadID tid = 0; tid < numThreads; tid++) {
diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh
index 0a519996d..dcc8ecf82 100644
--- a/src/cpu/o3/iew.hh
+++ b/src/cpu/o3/iew.hh
@@ -133,7 +133,7 @@ class DefaultIEW
     void regStats();
 
     /** Initializes stage; sends back the number of free IQ and LSQ entries. */
-    void initStage();
+    void startupStage();
 
     /** Sets main time buffer used for backwards communication. */
     void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh
index 60f4604a2..e25c8829b 100644
--- a/src/cpu/o3/iew_impl.hh
+++ b/src/cpu/o3/iew_impl.hh
@@ -283,7 +283,7 @@ DefaultIEW<Impl>::regStats()
 
 template<class Impl>
 void
-DefaultIEW<Impl>::initStage()
+DefaultIEW<Impl>::startupStage()
 {
     for (ThreadID tid = 0; tid < numThreads; tid++) {
         toRename->iewInfo[tid].usedIQ = true;
@@ -408,7 +408,7 @@ DefaultIEW<Impl>::takeOverFrom()
     ldstQueue.takeOverFrom();
     fuPool->takeOver();
 
-    initStage();
+    startupStage();
     cpu->activityThisCycle();
 
     for (ThreadID tid = 0; tid < numThreads; tid++) {
diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh
index a5c83dfea..0aa238c06 100644
--- a/src/cpu/o3/rename.hh
+++ b/src/cpu/o3/rename.hh
@@ -143,7 +143,7 @@ class DefaultRename
 
   public:
     /** Initializes variables for the stage. */
-    void initStage();
+    void startupStage();
 
     /** Sets pointer to list of active threads. */
     void setActiveThreads(std::list<ThreadID> *at_ptr);
diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh
index 592bc059f..4996cfcad 100644
--- a/src/cpu/o3/rename_impl.hh
+++ b/src/cpu/o3/rename_impl.hh
@@ -228,7 +228,7 @@ DefaultRename<Impl>::setDecodeQueue(TimeBuffer<DecodeStruct> *dq_ptr)
 
 template <class Impl>
 void
-DefaultRename<Impl>::initStage()
+DefaultRename<Impl>::startupStage()
 {
     // Grab the number of free entries directly from the stages.
     for (ThreadID tid = 0; tid < numThreads; tid++) {
@@ -317,7 +317,7 @@ void
 DefaultRename<Impl>::takeOverFrom()
 {
     _status = Inactive;
-    initStage();
+    startupStage();
 
     // Reset all state prior to taking over from the other CPU.
     for (ThreadID tid = 0; tid < numThreads; tid++) {