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authorKorey Sewell <ksewell@umich.edu>2010-04-10 23:31:36 -0400
committerKorey Sewell <ksewell@umich.edu>2010-04-10 23:31:36 -0400
commitb49511ae4843fc7af3b28d7dfdb18d4e474b81d3 (patch)
treee7a8e0fe0d96f8cee1a6bb809a43003dcd2701ea /src
parentd71f9712b3640239f70382baade7439ac783f9a1 (diff)
downloadgem5-b49511ae4843fc7af3b28d7dfdb18d4e474b81d3.tar.xz
inorder: timing for inst forwarding
when insts execute, they mark the time they finish to be used for subsequent isnts they may need forwarding of data. However, the regdepmap was using the wrong value to index into the destination operands of the instruction to be forwarded. Thus, in some cases, we are checking to see if the 3rd destination register for an instruction is executed at a certain time, when there is only 1 dest. register valid. Thus, we get a bad, uninitialized time value that will stall forwarding causing performance loss but still the correct execution.
Diffstat (limited to 'src')
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.cc15
-rw-r--r--src/cpu/inorder/reg_dep_map.cc20
-rw-r--r--src/cpu/inorder/reg_dep_map.hh2
-rw-r--r--src/cpu/inorder/resources/use_def.cc3
4 files changed, 30 insertions, 10 deletions
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index 1b55c90e0..83004fdb8 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -534,6 +534,10 @@ InOrderDynInst::setIntRegOperand(const StaticInst *si, int idx, IntReg val)
instResult[idx].type = Integer;
instResult[idx].val.integer = val;
instResult[idx].tick = curTick;
+
+ DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting Result Int Reg. %i "
+ "being set to %#x (result-tick:%i).\n",
+ threadNumber, seqNum, idx, val, instResult[idx].tick);
}
/** Sets a FP register. */
@@ -542,8 +546,11 @@ InOrderDynInst::setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
{
instResult[idx].val.dbl = val;
instResult[idx].type = Float;
-
instResult[idx].tick = curTick;
+
+ DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting Result Float Reg. %i "
+ "being set to %#x (result-tick:%i).\n",
+ threadNumber, seqNum, idx, val, instResult[idx].tick);
}
/** Sets a FP register as a integer. */
@@ -554,6 +561,10 @@ InOrderDynInst::setFloatRegOperandBits(const StaticInst *si, int idx,
instResult[idx].type = Integer;
instResult[idx].val.integer = val;
instResult[idx].tick = curTick;
+
+ DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting Result Float Reg. %i "
+ "being set to %#x (result-tick:%i).\n",
+ threadNumber, seqNum, idx, val, instResult[idx].tick);
}
/** Sets a misc. register. */
@@ -655,7 +666,7 @@ InOrderDynInst::write(T data, Addr addr, unsigned flags, uint64_t *res)
storeData = data;
DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting store data to %#x.\n",
- threadNumber, seqNum, memData);
+ threadNumber, seqNum, storeData);
return cpu->write(this, data, addr, flags, res);
}
diff --git a/src/cpu/inorder/reg_dep_map.cc b/src/cpu/inorder/reg_dep_map.cc
index 7fac0a905..cd1c3450c 100644
--- a/src/cpu/inorder/reg_dep_map.cc
+++ b/src/cpu/inorder/reg_dep_map.cc
@@ -161,7 +161,7 @@ RegDepMap::canRead(unsigned idx, DynInstPtr inst)
}
ThePipeline::DynInstPtr
-RegDepMap::canForward(unsigned reg_idx, unsigned src_idx, DynInstPtr inst)
+RegDepMap::canForward(unsigned reg_idx, DynInstPtr inst)
{
std::list<DynInstPtr>::iterator list_it = regMap[reg_idx].begin();
std::list<DynInstPtr>::iterator list_end = regMap[reg_idx].end();
@@ -176,13 +176,23 @@ RegDepMap::canForward(unsigned reg_idx, unsigned src_idx, DynInstPtr inst)
}
if (forward_inst) {
+ int dest_reg_idx = forward_inst->getDestIdxNum(reg_idx);
+ assert(dest_reg_idx != -1);
+
if (forward_inst->isExecuted() &&
- forward_inst->readResultTime(src_idx) < curTick) {
+ forward_inst->readResultTime(dest_reg_idx) < curTick) {
return forward_inst;
} else {
- DPRINTF(RegDepMap, "[sn:%i] Can't get value through forwarding, "
- " [sn:%i] has not been executed yet.\n",
- inst->seqNum, forward_inst->seqNum);
+ if (!forward_inst->isExecuted()) {
+ DPRINTF(RegDepMap, "[sn:%i] Can't get value through forwarding, "
+ " [sn:%i] has not been executed yet.\n",
+ inst->seqNum, forward_inst->seqNum);
+ } else if (forward_inst->readResultTime(dest_reg_idx) >= curTick) {
+ DPRINTF(RegDepMap, "[sn:%i] Can't get value through forwarding, "
+ " [sn:%i] executed on tick:%i.\n",
+ inst->seqNum, forward_inst->seqNum, forward_inst->readResultTime(dest_reg_idx));
+ }
+
return NULL;
}
} else {
diff --git a/src/cpu/inorder/reg_dep_map.hh b/src/cpu/inorder/reg_dep_map.hh
index cb9d35bf4..2e938a6b5 100644
--- a/src/cpu/inorder/reg_dep_map.hh
+++ b/src/cpu/inorder/reg_dep_map.hh
@@ -77,7 +77,7 @@ class RegDepMap
/** Is the current instruction able to get a forwarded value from another instruction
* for this destination register? */
- DynInstPtr canForward(unsigned reg_idx, unsigned src_idx, DynInstPtr inst);
+ DynInstPtr canForward(unsigned reg_idx, DynInstPtr inst);
/** find an instruction to forward/bypass a value from */
DynInstPtr findBypassInst(unsigned idx);
diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index 5fd6a4724..cf3883e47 100644
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -196,8 +196,7 @@ UseDefUnit::execute(int slot_idx)
} else {
// Look for forwarding opportunities
- DynInstPtr forward_inst = regDepMap[tid]->canForward(reg_idx,
- ud_idx,
+ DynInstPtr forward_inst = regDepMap[tid]->canForward(reg_idx,
inst);
if (forward_inst) {