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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:11 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:11 -0500 |
| commit | 5943f0fc84ba51d8341a97437b798225fd36da56 (patch) | |
| tree | 2ca94e6284f9f40b0e28d52df2ca02a25a36edc6 /src | |
| parent | ba33db8fd66fe0814a59d520df54f0bb3788ce1d (diff) | |
| download | gem5-5943f0fc84ba51d8341a97437b798225fd36da56.tar.xz | |
ARM: Ignore writing a bad mode to CPSR with MSR.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/insts/static_inst.hh | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh index c26053cef..33453bec6 100644 --- a/src/arch/arm/insts/static_inst.hh +++ b/src/arch/arm/insts/static_inst.hh @@ -177,7 +177,11 @@ class ArmStaticInst : public StaticInst if (bits(byteMask, 0)) { if (privileged) { bitMask = bitMask | mask(7, 6); - bitMask = bitMask | mask(5); + if (!badMode((OperatingMode)(val & mask(5)))) { + bitMask = bitMask | mask(5); + } else { + warn_once("Ignoring write of bad mode to CPSR.\n"); + } } if (affectState) bitMask = bitMask | (1 << 5); |