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authorDam Sunwoo <dam.sunwoo@arm.com>2010-08-23 11:18:39 -0500
committerDam Sunwoo <dam.sunwoo@arm.com>2010-08-23 11:18:39 -0500
commitcb76111a7e79c9b0364e49bdf34120f440e42746 (patch)
treee08131979e479ef0fe13fb8a7704d98a5d476faa /src
parent1d1837ee9855f06af963f96948c33623bf905e7d (diff)
downloadgem5-cb76111a7e79c9b0364e49bdf34120f440e42746.tar.xz
ARM: Use a stl queue for the table walker state
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/table_walker.cc24
-rw-r--r--src/arch/arm/table_walker.hh5
2 files changed, 16 insertions, 13 deletions
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 9bf067b81..468c19f75 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -43,12 +43,10 @@
#include "dev/io_device.hh"
#include "cpu/thread_context.hh"
-#define NUM_WALKERS 2 // 2 should be enough to handle crossing page boundaries
-
using namespace ArmISA;
TableWalker::TableWalker(const Params *p)
- : MemObject(p), stateQueue(NUM_WALKERS), port(NULL), tlb(NULL),
+ : MemObject(p), port(NULL), tlb(NULL),
currState(NULL), doL1DescEvent(this), doL2DescEvent(this)
{
sctlr = 0;
@@ -155,9 +153,10 @@ TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint8_t _cid, TLB::Mode _
if (currState->timing) {
port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
&doL1DescEvent, (uint8_t*)&currState->l1Desc.data, (Tick)0);
- DPRINTF(TLBVerbose, "Adding to walker fifo: %d free before adding\n",
- stateQueue.free_slots());
- stateQueue.add(*currState);
+ DPRINTF(TLBVerbose, "Adding to walker fifo: queue size before adding: %d\n",
+ stateQueue.size());
+ stateQueue.push_back(currState);
+ assert(stateQueue.size() < 5);
currState = NULL;
} else {
port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
@@ -567,9 +566,12 @@ TableWalker::doL2Descriptor()
void
TableWalker::doL1DescriptorWrapper()
{
- currState = stateQueue.peek();
+ currState = stateQueue.front();
currState->delayed = false;
+ DPRINTF(TLBVerbose, "L1 Desc object host addr: %p\n",&currState->l1Desc.data);
+ DPRINTF(TLBVerbose, "L1 Desc object data: %08x\n",currState->l1Desc.data);
+
DPRINTF(TLBVerbose, "calling doL1Descriptor for vaddr:%#x\n", currState->vaddr);
doL1Descriptor();
@@ -582,7 +584,7 @@ TableWalker::doL1DescriptorWrapper()
currState->tc = NULL;
currState->delayed = false;
- stateQueue.remove();
+ stateQueue.pop_front();
}
else if (!currState->delayed) {
DPRINTF(TLBVerbose, "calling translateTiming again\n");
@@ -593,7 +595,7 @@ TableWalker::doL1DescriptorWrapper()
currState->tc = NULL;
currState->delayed = false;
- stateQueue.remove();
+ stateQueue.pop_front();
}
currState = NULL;
}
@@ -601,7 +603,7 @@ TableWalker::doL1DescriptorWrapper()
void
TableWalker::doL2DescriptorWrapper()
{
- currState = stateQueue.peek();
+ currState = stateQueue.front();
assert(currState->delayed);
DPRINTF(TLBVerbose, "calling doL2Descriptor for vaddr:%#x\n",
@@ -623,7 +625,7 @@ TableWalker::doL2DescriptorWrapper()
currState->tc = NULL;
currState->delayed = false;
- stateQueue.remove();
+ stateQueue.pop_front();
currState = NULL;
}
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index 47fa9e376..12c839d54 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -40,6 +40,8 @@
#ifndef __ARCH_ARM_TABLE_WALKER_HH__
#define __ARCH_ARM_TABLE_WALKER_HH__
+#include <list>
+
#include "arch/arm/miscregs.hh"
#include "arch/arm/tlb.hh"
#include "mem/mem_object.hh"
@@ -48,7 +50,6 @@
#include "params/ArmTableWalker.hh"
#include "sim/faults.hh"
#include "sim/eventq.hh"
-#include "base/fifo_buffer.hh"
class DmaPort;
class ThreadContext;
@@ -301,7 +302,7 @@ class TableWalker : public MemObject
};
- FifoBuffer<WalkerState> stateQueue;
+ std::list<WalkerState *> stateQueue;
/** Port to issue translation requests from */
DmaPort *port;