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authorAli Saidi <saidi@eecs.umich.edu>2007-01-26 18:49:40 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-01-26 18:49:40 -0500
commitfd8a4ff5a8a9ea65e227f0b4000dfcda06d4764f (patch)
treece2a5d4e12142eab64231daab73953a15384b7c6 /src
parent8561c8366c7c9afd7e6b52b6e2385b3c1dde95a9 (diff)
parent63fdabf191b8ac1031fb25da61ab2526d4bb6d05 (diff)
downloadgem5-fd8a4ff5a8a9ea65e227f0b4000dfcda06d4764f.tar.xz
Merge zeep.pool:/z/saidi/work/m5.newmem
into zeep.pool:/z/saidi/work/m5.suncc --HG-- extra : convert_revision : 20f61a524a3b53fc0afcf53a24b5a1fe1d96f579
Diffstat (limited to 'src')
-rw-r--r--src/SConscript29
-rw-r--r--src/arch/sparc/isa/decoder.isa4
-rw-r--r--src/arch/sparc/isa/formats/basic.isa3
-rw-r--r--src/arch/sparc/isa/formats/integerop.isa6
-rw-r--r--src/arch/sparc/isa/includes.isa2
-rw-r--r--src/arch/sparc/isa_traits.hh2
-rw-r--r--src/arch/sparc/system.cc1
-rw-r--r--src/arch/sparc/tlb.cc4
-rw-r--r--src/arch/sparc/utility.hh2
-rw-r--r--src/base/compression/lzss_compression.cc6
-rw-r--r--src/base/compression/null_compression.hh2
-rw-r--r--src/base/cprintf.hh24
-rw-r--r--src/base/hashmap.hh2
-rw-r--r--src/base/hostinfo.cc1
-rw-r--r--src/base/loader/object_file.cc4
-rw-r--r--src/base/misc.hh45
-rw-r--r--src/base/pollevent.cc2
-rw-r--r--src/base/random.cc13
-rw-r--r--src/base/remote_gdb.cc5
-rw-r--r--src/base/statistics.hh5
-rw-r--r--src/base/stats/text.cc4
-rw-r--r--src/base/time.cc4
-rw-r--r--src/base/time.hh2
-rw-r--r--src/base/timebuf.hh5
-rw-r--r--src/base/trace.hh28
-rw-r--r--src/cpu/SConscript8
-rw-r--r--src/cpu/activity.cc6
-rw-r--r--src/cpu/exetrace.hh3
-rw-r--r--src/cpu/simple/base.hh3
-rw-r--r--src/dev/baddev.cc2
-rw-r--r--src/dev/ide_atareg.h2
-rw-r--r--src/dev/io_device.hh2
-rw-r--r--src/dev/pciconfigall.cc2
-rw-r--r--src/dev/pcidev.hh6
-rw-r--r--src/dev/platform.cc1
-rw-r--r--src/dev/sparc/mm_disk.cc5
-rw-r--r--src/dev/sparc/t1000.cc3
-rw-r--r--src/mem/cache/cache_impl.hh31
-rw-r--r--src/mem/cache/miss/blocking_buffer.cc9
-rw-r--r--src/mem/cache/miss/blocking_buffer.hh2
-rw-r--r--src/mem/cache/tags/iic.cc2
-rw-r--r--src/mem/cache/tags/lru.hh3
-rw-r--r--src/mem/cache/tags/split.hh4
-rw-r--r--src/mem/cache/tags/split_lifo.hh3
-rw-r--r--src/mem/cache/tags/split_lru.hh3
-rw-r--r--src/mem/dram.cc4
-rw-r--r--src/mem/packet.cc8
-rw-r--r--src/mem/physical.cc6
-rw-r--r--src/mem/port.cc3
-rw-r--r--src/mem/port.hh8
-rw-r--r--src/sim/byteswap.hh2
51 files changed, 206 insertions, 130 deletions
diff --git a/src/SConscript b/src/SConscript
index 229418703..a94682bc0 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -311,30 +311,41 @@ def makeEnv(label, objsfx, strip = False, **kwargs):
envList.append(newEnv)
# Debug binary
-# Solaris seems to have some issue with DWARF2 debugging information, it's ok
-# with stabs though
-if sys.platform == 'sunos5':
- debug_flag = '-gstabs+'
+ccflags = {}
+if env['GCC']:
+ if sys.platform == 'sunos5':
+ ccflags['debug'] = '-gstabs+'
+ else:
+ ccflags['debug'] = '-ggdb3'
+ ccflags['opt'] = '-g -O3'
+ ccflags['fast'] = '-O3'
+ ccflags['prof'] = '-O3 -g -pg'
+elif env['SUNCC']:
+ ccflags['debug'] = '-g0'
+ ccflags['opt'] = '-g -O'
+ ccflags['fast'] = '-fast'
+ ccflags['prof'] = '-fast -g -pg'
else:
- debug_flag = '-ggdb3'
+ print 'Unknown compiler, please fix compiler options'
+ Exit(1)
makeEnv('debug', '.do',
- CCFLAGS = Split('%s -O0' % debug_flag),
+ CCFLAGS = Split(ccflags['debug']),
CPPDEFINES = ['DEBUG', 'TRACING_ON=1'])
# Optimized binary
makeEnv('opt', '.o',
- CCFLAGS = Split('-g -O3'),
+ CCFLAGS = Split(ccflags['opt']),
CPPDEFINES = ['TRACING_ON=1'])
# "Fast" binary
makeEnv('fast', '.fo', strip = True,
- CCFLAGS = Split('-O3'),
+ CCFLAGS = Split(ccflags['fast']),
CPPDEFINES = ['NDEBUG', 'TRACING_ON=0'])
# Profiled binary
makeEnv('prof', '.po',
- CCFLAGS = Split('-O3 -g -pg'),
+ CCFLAGS = Split(ccflags['prof']),
CPPDEFINES = ['NDEBUG', 'TRACING_ON=0'],
LINKFLAGS = '-pg')
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index 425ebc9d0..eae195a87 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -691,8 +691,8 @@ decode OP default Unknown::unknown()
Fsr &= ~(0x1F);
}});
0x0B: Trap::fabsq({{fault = new FpDisabled;}});
- 0x29: fsqrts({{Frds.sf = sqrt(Frs2s.sf);}});
- 0x2A: fsqrtd({{Frd.df = sqrt(Frs2.df);}});
+ 0x29: fsqrts({{Frds.sf = std::sqrt(Frs2s.sf);}});
+ 0x2A: fsqrtd({{Frd.df = std::sqrt(Frs2.df);}});
0x2B: Trap::fsqrtq({{fault = new FpDisabled;}});
0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}});
0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}});
diff --git a/src/arch/sparc/isa/formats/basic.isa b/src/arch/sparc/isa/formats/basic.isa
index a4c05387b..9805c7c0b 100644
--- a/src/arch/sparc/isa/formats/basic.isa
+++ b/src/arch/sparc/isa/formats/basic.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -38,6 +38,7 @@ def template BasicExecPanic {{
Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
{
panic("Execute method called when it shouldn't!");
+ M5_DUMMY_RETURN
}
}};
diff --git a/src/arch/sparc/isa/formats/integerop.isa b/src/arch/sparc/isa/formats/integerop.isa
index 4f8ebebcc..9470fc55f 100644
--- a/src/arch/sparc/isa/formats/integerop.isa
+++ b/src/arch/sparc/isa/formats/integerop.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2006 The Regents of The University of Michigan
+// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
@@ -154,7 +154,7 @@ output decoder {{
bool IntOp::printPseudoOps(std::ostream &os, Addr pc,
const SymbolTable *symbab) const
{
- if(!strcmp(mnemonic, "or") && _srcRegIdx[0] == 0)
+ if(!std::strcmp(mnemonic, "or") && _srcRegIdx[0] == 0)
{
printMnemonic(os, "mov");
printSrcReg(os, 1);
@@ -168,7 +168,7 @@ output decoder {{
bool IntOpImm::printPseudoOps(std::ostream &os, Addr pc,
const SymbolTable *symbab) const
{
- if(!strcmp(mnemonic, "or"))
+ if(!std::strcmp(mnemonic, "or"))
{
if(_numSrcRegs > 0 && _srcRegIdx[0] == 0)
{
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index 0c112d481..5d90fbdd2 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -34,6 +34,7 @@
//
output header {{
+#include <cstring>
#include <sstream>
#include <iostream>
@@ -65,6 +66,7 @@ output exec {{
#endif
#include <limits>
+#include <cmath>
#include "arch/sparc/asi.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 8aa8ea7f3..062cc8dd3 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -59,7 +59,7 @@ namespace SparcISA
// These enumerate all the registers for dependence tracking.
enum DependenceTags {
FP_Base_DepTag = 33,
- Ctrl_Base_DepTag = 97,
+ Ctrl_Base_DepTag = 97
};
// semantically meaningful register indices
diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
index da83d86fc..800d47c15 100644
--- a/src/arch/sparc/system.cc
+++ b/src/arch/sparc/system.cc
@@ -195,6 +195,7 @@ bool
SparcSystem::breakpoint()
{
panic("Need to implement");
+ M5_DUMMY_RETURN
}
void
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index bf57c894f..6ed6f59b6 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -28,6 +28,8 @@
* Authors: Ali Saidi
*/
+#include <cstring>
+
#include "arch/sparc/asi.hh"
#include "arch/sparc/miscregfile.hh"
#include "arch/sparc/tlb.hh"
@@ -53,7 +55,7 @@ TLB::TLB(const std::string &name, int s)
fatal("SPARC T1 TLB registers don't support more than 64 TLB entries.");
tlb = new TlbEntry[size];
- memset(tlb, 0, sizeof(TlbEntry) * size);
+ std::memset(tlb, 0, sizeof(TlbEntry) * size);
for (int x = 0; x < size; x++)
freeList.push_back(&tlb[x]);
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 5c7fe343d..3c8bdcd01 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -50,7 +50,7 @@ namespace SparcISA
inline ExtMachInst
makeExtMI(MachInst inst, ThreadContext * xc) {
- ExtMachInst emi = (unsigned MachInst) inst;
+ ExtMachInst emi = (MachInst) inst;
//The I bit, bit 13, is used to figure out where the ASI
//should come from. Use that in the ExtMachInst. This is
//slightly redundant, but it removes the need to put a condition
diff --git a/src/base/compression/lzss_compression.cc b/src/base/compression/lzss_compression.cc
index eb35fb8f1..bd16d82c9 100644
--- a/src/base/compression/lzss_compression.cc
+++ b/src/base/compression/lzss_compression.cc
@@ -32,8 +32,8 @@
* LZSSCompression definitions.
*/
-#include <assert.h>
-
+#include <cassert>
+#include <cstring>
#include "base/compression/lzss_compression.hh"
#include "base/misc.hh" //for fatal
@@ -134,7 +134,7 @@ LZSSCompression::compress(uint8_t *dest, uint8_t *src, int size)
if (dest_index >= size) {
// Have expansion instead of compression, just copy.
- memcpy(dest,src,size);
+ std::memcpy(dest,src,size);
return size;
}
return dest_index;
diff --git a/src/base/compression/null_compression.hh b/src/base/compression/null_compression.hh
index ff110807a..798acb77a 100644
--- a/src/base/compression/null_compression.hh
+++ b/src/base/compression/null_compression.hh
@@ -50,11 +50,13 @@ class NullCompression : public CompressionAlgorithm
int uncompress(uint8_t * dest, uint8_t *src, int size)
{
fatal("Can't uncompress data");
+ M5_DUMMY_RETURN
}
int compress(uint8_t *dest, uint8_t *src, int size)
{
fatal("Can't compress data");
+ M5_DUMMY_RETURN
}
};
diff --git a/src/base/cprintf.hh b/src/base/cprintf.hh
index 9967b0578..dd2256e69 100644
--- a/src/base/cprintf.hh
+++ b/src/base/cprintf.hh
@@ -136,10 +136,10 @@ operator,(ArgList &alist, ArgListNull)
inline void
__cprintf(const std::string &format, ArgList &args)
{ args.dump(format); delete &args; }
-#define __cprintf__(format, args...) \
- cp::__cprintf(format, (*(new cp::ArgList), args))
-#define cprintf(args...) \
- __cprintf__(args, cp::ArgListNull())
+#define __cprintf__(format, ...) \
+ cp::__cprintf(format, (*(new cp::ArgList), __VA_ARGS__))
+#define cprintf(...) \
+ __cprintf__(__VA_ARGS__, cp::ArgListNull())
//
// ccprintf(stream, format, args, ...) prints to the specified stream
@@ -148,10 +148,10 @@ __cprintf(const std::string &format, ArgList &args)
inline void
__ccprintf(std::ostream &stream, const std::string &format, ArgList &args)
{ args.dump(stream, format); delete &args; }
-#define __ccprintf__(stream, format, args...) \
- cp::__ccprintf(stream, format, (*(new cp::ArgList), args))
-#define ccprintf(stream, args...) \
- __ccprintf__(stream, args, cp::ArgListNull())
+#define __ccprintf__(stream, format, ...) \
+ cp::__ccprintf(stream, format, (*(new cp::ArgList), __VA_ARGS__))
+#define ccprintf(stream, ...) \
+ __ccprintf__(stream, __VA_ARGS__, cp::ArgListNull())
//
// csprintf(format, args, ...) returns a string
@@ -160,10 +160,10 @@ __ccprintf(std::ostream &stream, const std::string &format, ArgList &args)
inline std::string
__csprintf(const std::string &format, ArgList &args)
{ std::string s = args.dumpToString(format); delete &args; return s; }
-#define __csprintf__(format, args...) \
- cp::__csprintf(format, (*(new cp::ArgList), args))
-#define csprintf(args...) \
- __csprintf__(args, cp::ArgListNull())
+#define __csprintf__(format, ...) \
+ cp::__csprintf(format, (*(new cp::ArgList), __VA_ARGS__))
+#define csprintf(...) \
+ __csprintf__(__VA_ARGS__, cp::ArgListNull())
}
diff --git a/src/base/hashmap.hh b/src/base/hashmap.hh
index 570cbc152..b78cc02e8 100644
--- a/src/base/hashmap.hh
+++ b/src/base/hashmap.hh
@@ -59,7 +59,7 @@ namespace m5 {
//
namespace __hash_namespace {
-#if !defined(__LP64__) && !defined(__alpha__)
+#if !defined(__LP64__) && !defined(__alpha__) && !defined(__SUNPRO_CC)
template<>
struct hash<uint64_t> {
size_t operator()(uint64_t r) const {
diff --git a/src/base/hostinfo.cc b/src/base/hostinfo.cc
index a7c93e712..7cc07c11e 100644
--- a/src/base/hostinfo.cc
+++ b/src/base/hostinfo.cc
@@ -33,6 +33,7 @@
#include <math.h>
#include <unistd.h>
+#include <stdio.h>
#include <cstdlib>
#include <cstring>
#include <string>
diff --git a/src/base/loader/object_file.cc b/src/base/loader/object_file.cc
index da5aa9552..7424b9305 100644
--- a/src/base/loader/object_file.cc
+++ b/src/base/loader/object_file.cc
@@ -101,7 +101,7 @@ ObjectFile::close()
}
if (fileData) {
- ::munmap(fileData, len);
+ ::munmap((char*)fileData, len);
fileData = NULL;
}
}
@@ -147,7 +147,7 @@ createObjectFile(const string &fname, bool raw)
// don't know what it is
close(fd);
- munmap(fileData, len);
+ munmap((char*)fileData, len);
return NULL;
}
diff --git a/src/base/misc.hh b/src/base/misc.hh
index 1c5720ce1..c12c2fe20 100644
--- a/src/base/misc.hh
+++ b/src/base/misc.hh
@@ -33,8 +33,13 @@
#define __MISC_HH__
#include <assert.h>
+#include "base/compiler.hh"
#include "base/cprintf.hh"
+#if defined(__SUNPRO_CC)
+#define __FUNCTION__ "how to fix me?"
+#endif
+
//
// This implements a cprintf based panic() function. panic() should
// be called when something happens that should never ever happen
@@ -43,12 +48,13 @@
//
//
void __panic(const std::string&, cp::ArgList &, const char*, const char*, int)
- __attribute__((noreturn));
-#define __panic__(format, args...) \
- __panic(format, (*(new cp::ArgList), args), \
- __FUNCTION__, __FILE__, __LINE__)
-#define panic(args...) \
- __panic__(args, cp::ArgListNull())
+ M5_ATTR_NORETURN;
+#define __panic__(format, ...) \
+ __panic(format, (*(new cp::ArgList), __VA_ARGS__), \
+ __FUNCTION__ , __FILE__, __LINE__)
+#define panic(...) \
+ __panic__(__VA_ARGS__, cp::ArgListNull())
+M5_PRAGMA_NORETURN(__panic)
//
// This implements a cprintf based fatal() function. fatal() should
@@ -59,32 +65,33 @@ void __panic(const std::string&, cp::ArgList &, const char*, const char*, int)
// panic() does.
//
void __fatal(const std::string&, cp::ArgList &, const char*, const char*, int)
- __attribute__((noreturn));
-#define __fatal__(format, args...) \
- __fatal(format, (*(new cp::ArgList), args), \
- __FUNCTION__, __FILE__, __LINE__)
-#define fatal(args...) \
- __fatal__(args, cp::ArgListNull())
+ M5_ATTR_NORETURN;
+#define __fatal__(format, ...) \
+ __fatal(format, (*(new cp::ArgList), __VA_ARGS__), \
+ __FUNCTION__ , __FILE__, __LINE__)
+#define fatal(...) \
+ __fatal__(__VA_ARGS__, cp::ArgListNull())
+M5_PRAGMA_NORETURN(__fatal)
//
// This implements a cprintf based warn
//
void __warn(const std::string&, cp::ArgList &, const char*, const char*, int);
-#define __warn__(format, args...) \
- __warn(format, (*(new cp::ArgList), args), \
- __FUNCTION__, __FILE__, __LINE__)
-#define warn(args...) \
- __warn__(args, cp::ArgListNull())
+#define __warn__(format, ...) \
+ __warn(format, (*(new cp::ArgList), __VA_ARGS__), \
+ __FUNCTION__ , __FILE__, __LINE__)
+#define warn(...) \
+ __warn__(__VA_ARGS__, cp::ArgListNull())
// Only print the warning message the first time it is seen. This
// doesn't check the warning string itself, it just only lets one
// warning come from the statement. So, even if the arguments change
// and that would have resulted in a different warning message,
// subsequent messages would still be supressed.
-#define warn_once(args...) do { \
+#define warn_once(...) do { \
static bool once = false; \
if (!once) { \
- __warn__(args, cp::ArgListNull()); \
+ __warn__(__VA_ARGS__, cp::ArgListNull()); \
once = true; \
} \
} while (0)
diff --git a/src/base/pollevent.cc b/src/base/pollevent.cc
index fd5b09d28..32724b74d 100644
--- a/src/base/pollevent.cc
+++ b/src/base/pollevent.cc
@@ -30,7 +30,7 @@
#include <sys/ioctl.h>
#include <sys/types.h>
-#if defined(__sun__)
+#if defined(__sun__) || defined(__SUNPRO_CC)
#include <sys/file.h>
#endif
diff --git a/src/base/random.cc b/src/base/random.cc
index 82c9e3566..0ccedcb00 100644
--- a/src/base/random.cc
+++ b/src/base/random.cc
@@ -29,12 +29,17 @@
* Ali Saidi
*/
+#if defined(__sun)
+#include <ieeefp.h>
+#endif
+#ifdef __SUNPRO_CC
+#include <stdlib.h>
+#include <math.h>
+#endif
+
#include <cstdlib>
#include <cmath>
-#if defined(__sun__)
-#include <ieeefp.h>
-#endif
#include "sim/param.hh"
#include "base/random.hh"
@@ -72,7 +77,7 @@ getLong()
double
m5round(double r)
{
-#if defined(__sun__)
+#if defined(__sun)
double val;
fp_rnd oldrnd = fpsetround(FP_RN);
val = rint(r);
diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc
index 59a9b87d5..2c0da48f0 100644
--- a/src/base/remote_gdb.cc
+++ b/src/base/remote_gdb.cc
@@ -610,7 +610,7 @@ BaseRemoteGDB::trap(int type)
uint64_t val;
size_t datalen, len;
char data[GDBPacketBufLen + 1];
- char buffer[gdbregs.bytes() * 2 + 256];
+ char *buffer;
const char *p;
char command, subcmd;
string var;
@@ -619,6 +619,8 @@ BaseRemoteGDB::trap(int type)
if (!attached)
return false;
+ buffer = (char*)malloc(gdbregs.bytes() * 2 + 256);
+
DPRINTF(GDBMisc, "trap: PC=%#x NPC=%#x\n",
context->readPC(), context->readNextPC());
@@ -916,6 +918,7 @@ BaseRemoteGDB::trap(int type)
}
out:
+ free(buffer);
return true;
}
diff --git a/src/base/statistics.hh b/src/base/statistics.hh
index 577ea5eab..d8e8b4c15 100644
--- a/src/base/statistics.hh
+++ b/src/base/statistics.hh
@@ -50,6 +50,9 @@
#include <algorithm>
#include <cassert>
+#ifdef __SUNPRO_CC
+#include <math.h>
+#endif
#include <cmath>
#include <functional>
#include <iosfwd>
@@ -1410,7 +1413,7 @@ struct DistStor
else if (val > params.max)
overflow += number;
else {
- int index = (int)floor((val - params.min) / params.bucket_size);
+ int index = (int)std::floor((val - params.min) / params.bucket_size);
assert(index < size(params));
cvec[index] += number;
}
diff --git a/src/base/stats/text.cc b/src/base/stats/text.cc
index c4448efc9..ae0d65537 100644
--- a/src/base/stats/text.cc
+++ b/src/base/stats/text.cc
@@ -32,6 +32,10 @@
#define _GLIBCPP_USE_C99 1
#endif
+#if defined(__sun)
+#include <math.h>
+#endif
+
#include <iostream>
#include <sstream>
#include <fstream>
diff --git a/src/base/time.cc b/src/base/time.cc
index cbc7256ee..76ba355b7 100644
--- a/src/base/time.cc
+++ b/src/base/time.cc
@@ -105,7 +105,11 @@ Time::date(string format) const
char buf[256];
if (format.empty()) {
+#ifdef __SUNPRO_CC
+ ctime_r(&sec, buf, 256);
+#else
ctime_r(&sec, buf);
+#endif
buf[24] = '\0';
return buf;
}
diff --git a/src/base/time.hh b/src/base/time.hh
index 7aa4c50db..f10cc5d6c 100644
--- a/src/base/time.hh
+++ b/src/base/time.hh
@@ -97,7 +97,7 @@ std::ostream &operator<<(std::ostream &out, const Time &time);
* @(#)time.h 8.2 (Berkeley) 7/10/94
*/
-#if defined(__sun__)
+#if defined(__sun)
#define timersub(tvp, uvp, vvp) \
do { \
(vvp)->tv_sec = (tvp)->tv_sec - (uvp)->tv_sec; \
diff --git a/src/base/timebuf.hh b/src/base/timebuf.hh
index 1d0de8278..348f7a673 100644
--- a/src/base/timebuf.hh
+++ b/src/base/timebuf.hh
@@ -33,6 +33,7 @@
#define __BASE_TIMEBUF_HH__
#include <cassert>
+#include <cstring>
#include <vector>
template <class T>
@@ -143,7 +144,7 @@ class TimeBuffer
char *ptr = data;
for (int i = 0; i < size; i++) {
index[i] = ptr;
- memset(ptr, 0, sizeof(T));
+ std::memset(ptr, 0, sizeof(T));
new (ptr) T;
ptr += sizeof(T);
}
@@ -171,7 +172,7 @@ class TimeBuffer
if (ptr >= size)
ptr -= size;
(reinterpret_cast<T *>(index[ptr]))->~T();
- memset(index[ptr], 0, sizeof(T));
+ std::memset(index[ptr], 0, sizeof(T));
new (index[ptr]) T;
}
diff --git a/src/base/trace.hh b/src/base/trace.hh
index 9b053990c..a46643159 100644
--- a/src/base/trace.hh
+++ b/src/base/trace.hh
@@ -186,39 +186,39 @@ do { \
Trace::dataDump(curTick, name(), data, count); \
} while (0)
-#define __dprintf(cycle, name, format, args...) \
- Trace::dprintf(format, (*(new cp::ArgList), args), cycle, name)
+#define __dprintf(cycle, name, format, ...) \
+ Trace::dprintf(format, (*(new cp::ArgList), __VA_ARGS__), cycle, name)
-#define DPRINTF(x, args...) \
+#define DPRINTF(x, ...) \
do { \
if (Trace::IsOn(Trace::x)) \
- __dprintf(curTick, name(), args, cp::ArgListNull()); \
+ __dprintf(curTick, name(), __VA_ARGS__, cp::ArgListNull()); \
} while (0)
-#define DPRINTFR(x, args...) \
+#define DPRINTFR(x, ...) \
do { \
if (Trace::IsOn(Trace::x)) \
- __dprintf((Tick)-1, std::string(), args, cp::ArgListNull()); \
+ __dprintf((Tick)-1, std::string(), __VA_ARGS__, cp::ArgListNull()); \
} while (0)
-#define DPRINTFN(args...) \
+#define DPRINTFN(...) \
do { \
- __dprintf(curTick, name(), args, cp::ArgListNull()); \
+ __dprintf(curTick, name(), __VA_ARGS__, cp::ArgListNull()); \
} while (0)
-#define DPRINTFNR(args...) \
+#define DPRINTFNR(...) \
do { \
- __dprintf((Tick)-1, string(), args, cp::ArgListNull()); \
+ __dprintf((Tick)-1, string(), __VA_ARGS__, cp::ArgListNull()); \
} while (0)
#else // !TRACING_ON
#define DTRACE(x) (false)
#define DCOUT(x) if (0) DebugOut()
-#define DPRINTF(x, args...) do {} while (0)
-#define DPRINTFR(args...) do {} while (0)
-#define DPRINTFN(args...) do {} while (0)
-#define DPRINTFNR(args...) do {} while (0)
+#define DPRINTF(x, ...) do {} while (0)
+#define DPRINTFR(...) do {} while (0)
+#define DPRINTFN(...) do {} while (0)
+#define DPRINTFNR(...) do {} while (0)
#define DDUMP(x, data, count) do {} while (0)
#endif // TRACING_ON
diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index 5771a7904..4d4b7574c 100644
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -54,18 +54,18 @@ execfile(models_db.srcnode().abspath)
exec_sig_template = '''
virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
-{ panic("initiateAcc not defined!"); };
+{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
virtual Fault completeAcc(Packet *pkt, %s *xc,
Trace::InstRecord *traceData) const
-{ panic("completeAcc not defined!"); };
+{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
'''
mem_ini_sig_template = '''
-virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); };
+virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
'''
mem_comp_sig_template = '''
-virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; };
+virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
'''
# Generate a temporary CPU list, including the CheckerCPU if
diff --git a/src/cpu/activity.cc b/src/cpu/activity.cc
index 9a0f6d98d..15e0556ad 100644
--- a/src/cpu/activity.cc
+++ b/src/cpu/activity.cc
@@ -28,6 +28,8 @@
* Authors: Kevin Lim
*/
+#include <cstring>
+
#include "base/timebuf.hh"
#include "cpu/activity.hh"
@@ -37,7 +39,7 @@ ActivityRecorder::ActivityRecorder(int num_stages, int longest_latency,
activityCount(activity), numStages(num_stages)
{
stageActive = new bool[numStages];
- memset(stageActive, 0, numStages);
+ std::memset(stageActive, 0, numStages);
}
void
@@ -114,7 +116,7 @@ void
ActivityRecorder::reset()
{
activityCount = 0;
- memset(stageActive, 0, numStages);
+ std::memset(stageActive, 0, numStages);
for (int i = 0; i < longestLatency + 1; ++i)
activityBuffer.advance();
}
diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh
index 6562e5265..a825f6a82 100644
--- a/src/cpu/exetrace.hh
+++ b/src/cpu/exetrace.hh
@@ -32,6 +32,7 @@
#ifndef __EXETRACE_HH__
#define __EXETRACE_HH__
+#include <cstring>
#include <fstream>
#include <vector>
@@ -169,7 +170,7 @@ InstRecord::setRegs(const IntRegFile &regs)
if (!iregs)
iregs = new iRegFile;
- memcpy(&iregs->regs, &regs, sizeof(IntRegFile));
+ std::memcpy(&iregs->regs, &regs, sizeof(IntRegFile));
regs_valid = true;
}
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index c39bfa9cd..31fd00977 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -186,7 +186,8 @@ class BaseSimpleCPU : public BaseCPU
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.
void setEA(Addr EA) { panic("BaseSimpleCPU::setEA() not implemented\n"); }
- Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n"); }
+ Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n");
+ M5_DUMMY_RETURN}
void prefetch(Addr addr, unsigned flags)
{
diff --git a/src/dev/baddev.cc b/src/dev/baddev.cc
index 6a7060455..a2d2650cb 100644
--- a/src/dev/baddev.cc
+++ b/src/dev/baddev.cc
@@ -56,12 +56,14 @@ Tick
BadDevice::read(PacketPtr pkt)
{
panic("Device %s not imlpmented\n", devname);
+ M5_DUMMY_RETURN
}
Tick
BadDevice::write(PacketPtr pkt)
{
panic("Device %s not imlpmented\n", devname);
+ M5_DUMMY_RETURN
}
BEGIN_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
diff --git a/src/dev/ide_atareg.h b/src/dev/ide_atareg.h
index df16d09d5..b9f1d9e0f 100644
--- a/src/dev/ide_atareg.h
+++ b/src/dev/ide_atareg.h
@@ -35,7 +35,7 @@
#if defined(linux)
#include <endian.h>
-#elif defined(__sun__)
+#elif defined(__sun)
#include <sys/isa_defs.h>
#else
#include <machine/endian.h>
diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh
index aa242d170..c56eba267 100644
--- a/src/dev/io_device.hh
+++ b/src/dev/io_device.hh
@@ -109,7 +109,7 @@ class DmaPort : public Port
virtual bool recvTiming(PacketPtr pkt);
virtual Tick recvAtomic(PacketPtr pkt)
- { panic("dma port shouldn't be used for pio access."); }
+ { panic("dma port shouldn't be used for pio access."); M5_DUMMY_RETURN }
virtual void recvFunctional(PacketPtr pkt)
{ panic("dma port shouldn't be used for pio access."); }
diff --git a/src/dev/pciconfigall.cc b/src/dev/pciconfigall.cc
index 39c8f0fa0..bd1855847 100644
--- a/src/dev/pciconfigall.cc
+++ b/src/dev/pciconfigall.cc
@@ -83,8 +83,10 @@ PciConfigAll::write(PacketPtr pkt)
{
assert(pkt->result == Packet::Unknown);
panic("Attempting to write to config space on non-existant device\n");
+ M5_DUMMY_RETURN
}
+
void
PciConfigAll::addressRanges(AddrRangeList &range_list)
{
diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh
index fbfdbb65c..56e3ffb4a 100644
--- a/src/dev/pcidev.hh
+++ b/src/dev/pcidev.hh
@@ -37,6 +37,8 @@
#ifndef __DEV_PCIDEV_HH__
#define __DEV_PCIDEV_HH__
+#include <cstring>
+
#include "dev/io_device.hh"
#include "dev/pcireg.h"
#include "dev/platform.hh"
@@ -62,8 +64,8 @@ class PciConfigData : public SimObject
PciConfigData(const std::string &name)
: SimObject(name)
{
- memset(config.data, 0, sizeof(config.data));
- memset(BARSize, 0, sizeof(BARSize));
+ std::memset(config.data, 0, sizeof(config.data));
+ std::memset(BARSize, 0, sizeof(BARSize));
}
/** The first 64 bytes */
diff --git a/src/dev/platform.cc b/src/dev/platform.cc
index 07288249c..b2b8695a7 100644
--- a/src/dev/platform.cc
+++ b/src/dev/platform.cc
@@ -62,6 +62,7 @@ Addr
Platform::pciToDma(Addr pciAddr) const
{
panic("No PCI dma support in platform.");
+ M5_DUMMY_RETURN
}
void
diff --git a/src/dev/sparc/mm_disk.cc b/src/dev/sparc/mm_disk.cc
index 9057c28be..018415f6c 100644
--- a/src/dev/sparc/mm_disk.cc
+++ b/src/dev/sparc/mm_disk.cc
@@ -33,6 +33,8 @@
* in legion. Any access is translated to an offset in the disk image.
*/
+#include <cstring>
+
#include "base/trace.hh"
#include "dev/sparc/mm_disk.hh"
#include "dev/platform.hh"
@@ -45,7 +47,7 @@
MmDisk::MmDisk(Params *p)
: BasicPioDevice(p), image(p->image), curSector((uint64_t)-1), dirty(false)
{
- memset(&bytes, 0, SectorSize);
+ std::memset(&bytes, 0, SectorSize);
pioSize = image->size() * SectorSize;
}
@@ -99,6 +101,7 @@ Tick
MmDisk::write(PacketPtr pkt)
{
panic("need to implement\n");
+ M5_DUMMY_RETURN
}
diff --git a/src/dev/sparc/t1000.cc b/src/dev/sparc/t1000.cc
index 4a8de77a5..233808631 100644
--- a/src/dev/sparc/t1000.cc
+++ b/src/dev/sparc/t1000.cc
@@ -57,6 +57,7 @@ Tick
T1000::intrFrequency()
{
panic("Need implementation\n");
+ M5_DUMMY_RETURN
}
void
@@ -89,6 +90,7 @@ Addr
T1000::pciToDma(Addr pciAddr) const
{
panic("Need implementation\n");
+ M5_DUMMY_RETURN
}
@@ -96,6 +98,7 @@ Addr
T1000::calcConfigAddr(int bus, int dev, int func)
{
panic("Need implementation\n");
+ M5_DUMMY_RETURN
}
void
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 9c41983fc..b8c896498 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -40,6 +40,7 @@
#include <cassert>
#include <iostream>
+#include <cstring>
#include <string>
#include "sim/host.hh"
@@ -125,7 +126,7 @@ Cache<TagStore,Coherence>::handleAccess(PacketPtr &pkt, int & lat,
assert(offset < blkSize);
assert(pkt->getSize() <= blkSize);
assert(offset+pkt->getSize() <= blkSize);
- memcpy(blk->data + offset, pkt->getPtr<uint8_t>(),
+ std::memcpy(blk->data + offset, pkt->getPtr<uint8_t>(),
pkt->getSize());
} else if (!(pkt->flags & SATISFIED)) {
pkt->flags |= SATISFIED;
@@ -133,7 +134,7 @@ Cache<TagStore,Coherence>::handleAccess(PacketPtr &pkt, int & lat,
assert(offset < blkSize);
assert(pkt->getSize() <= blkSize);
assert(offset + pkt->getSize() <=blkSize);
- memcpy(pkt->getPtr<uint8_t>(), blk->data + offset,
+ std::memcpy(pkt->getPtr<uint8_t>(), blk->data + offset,
pkt->getSize());
}
return blk;
@@ -176,7 +177,7 @@ Cache<TagStore,Coherence>::handleAccess(PacketPtr &pkt, int & lat,
if (blk->checkWrite(pkt->req)) {
write_data = true;
blk->status |= BlkDirty;
- memcpy(blk->data + offset, pkt->getPtr<uint8_t>(),
+ std::memcpy(blk->data + offset, pkt->getPtr<uint8_t>(),
pkt->getSize());
}
} else {
@@ -184,7 +185,7 @@ Cache<TagStore,Coherence>::handleAccess(PacketPtr &pkt, int & lat,
if (pkt->req->isLocked()) {
blk->trackLoadLocked(pkt->req);
}
- memcpy(pkt->getPtr<uint8_t>(), blk->data + offset,
+ std::memcpy(pkt->getPtr<uint8_t>(), blk->data + offset,
pkt->getSize());
}
@@ -228,7 +229,7 @@ Cache<TagStore,Coherence>::handleFill(BlkType *blk, PacketPtr &pkt,
if (pkt->isRead()) {
- memcpy(blk->data, pkt->getPtr<uint8_t>(), blkSize);
+ std::memcpy(blk->data, pkt->getPtr<uint8_t>(), blkSize);
}
blk->whenReady = pkt->finishTime;
@@ -249,14 +250,14 @@ Cache<TagStore,Coherence>::handleFill(BlkType *blk, PacketPtr &pkt,
if (target->isWrite()) {
if (blk->checkWrite(pkt->req)) {
blk->status |= BlkDirty;
- memcpy(blk->data + target->getOffset(blkSize),
+ std::memcpy(blk->data + target->getOffset(blkSize),
target->getPtr<uint8_t>(), target->getSize());
}
} else {
if (pkt->req->isLocked()) {
blk->trackLoadLocked(pkt->req);
}
- memcpy(target->getPtr<uint8_t>(),
+ std::memcpy(target->getPtr<uint8_t>(),
blk->data + target->getOffset(blkSize),
target->getSize());
}
@@ -285,7 +286,7 @@ Cache<TagStore,Coherence>::handleFill(BlkType *blk, MSHR * mshr,
blk = doReplacement(blk, pkt, new_state, writebacks);
if (pkt->isRead()) {
- memcpy(blk->data, pkt->getPtr<uint8_t>(), blkSize);
+ std::memcpy(blk->data, pkt->getPtr<uint8_t>(), blkSize);
}
blk->whenReady = pkt->finishTime;
@@ -337,14 +338,14 @@ Cache<TagStore,Coherence>::handleFill(BlkType *blk, MSHR * mshr,
if (target->isWrite()) {
if (blk->checkWrite(pkt->req)) {
blk->status |= BlkDirty;
- memcpy(blk->data + target->getOffset(blkSize),
+ std::memcpy(blk->data + target->getOffset(blkSize),
target->getPtr<uint8_t>(), target->getSize());
}
} else {
if (pkt->req->isLocked()) {
blk->trackLoadLocked(pkt->req);
}
- memcpy(target->getPtr<uint8_t>(),
+ std::memcpy(target->getPtr<uint8_t>(),
blk->data + target->getOffset(blkSize),
target->getSize());
}
@@ -384,7 +385,7 @@ Cache<TagStore,Coherence>::handleSnoop(BlkType *blk,
assert(offset < blkSize);
assert(pkt->getSize() <= blkSize);
assert(offset + pkt->getSize() <=blkSize);
- memcpy(pkt->getPtr<uint8_t>(), blk->data + offset, pkt->getSize());
+ std::memcpy(pkt->getPtr<uint8_t>(), blk->data + offset, pkt->getSize());
handleSnoop(blk, new_state);
}
@@ -431,7 +432,7 @@ Cache<TagStore,Coherence>::writebackBlk(BlkType *blk)
new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0);
PacketPtr writeback = new Packet(writebackReq, Packet::Writeback, -1);
writeback->allocate();
- memcpy(writeback->getPtr<uint8_t>(),blk->data,blkSize);
+ std::memcpy(writeback->getPtr<uint8_t>(),blk->data,blkSize);
blk->status &= ~BlkDirty;
return writeback;
@@ -463,7 +464,7 @@ Cache<TagStore,Coherence>::verifyData(BlkType *blk)
assert(blkSize == blk->size);
}
- retval = memcmp(tmp_data, blk->data, blkSize) == 0;
+ retval = std::memcmp(tmp_data, blk->data, blkSize) == 0;
delete [] tmp_data;
return retval;
}
@@ -664,7 +665,7 @@ Cache<TagStore,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr,
DPRINTF(Cache, "Block for blk addr %x moving from state "
"%i to %i\n", pkt->getAddr(), old_state, new_state);
//Set the state on the upgrade
- memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
+ std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
PacketList writebacks;
handleFill(blk, mshr, new_state, writebacks, pkt);
assert(writebacks.empty());
@@ -839,7 +840,7 @@ Cache<TagStore,Coherence>::snoop(PacketPtr &pkt)
assert(offset < blkSize);
assert(pkt->getSize() <= blkSize);
assert(offset + pkt->getSize() <=blkSize);
- memcpy(pkt->getPtr<uint8_t>(), mshr->pkt->getPtr<uint8_t>() + offset, pkt->getSize());
+ std::memcpy(pkt->getPtr<uint8_t>(), mshr->pkt->getPtr<uint8_t>() + offset, pkt->getSize());
respondToSnoop(pkt, curTick + hitLatency);
}
diff --git a/src/mem/cache/miss/blocking_buffer.cc b/src/mem/cache/miss/blocking_buffer.cc
index 4a431d82d..a1af88341 100644
--- a/src/mem/cache/miss/blocking_buffer.cc
+++ b/src/mem/cache/miss/blocking_buffer.cc
@@ -32,6 +32,7 @@
* @file
* Definitions of a simple buffer for a blocking cache.
*/
+#include <cstring>
#include "mem/cache/base_cache.hh"
#include "mem/cache/miss/blocking_buffer.hh"
@@ -60,7 +61,7 @@ BlockingBuffer::handleMiss(PacketPtr &pkt, int blk_size, Tick time)
wb.allocate(pkt->cmd, blk_addr, blk_size, pkt);
}
- memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), blk_size);
+ std::memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), blk_size);
cache->setBlocked(Blocked_NoWBBuffers);
cache->setMasterRequest(Request_WB, time);
@@ -147,7 +148,7 @@ BlockingBuffer::handleResponse(PacketPtr &pkt, Tick time)
PacketPtr target = ((MSHR*)(pkt->senderState))->getTarget();
((MSHR*)(pkt->senderState))->popTarget();
if (pkt->isRead()) {
- memcpy(target->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), target->getSize());
+ std::memcpy(target->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), target->getSize());
}
cache->respond(target, time);
assert(!((MSHR*)(pkt->senderState))->hasTargets());
@@ -191,7 +192,7 @@ BlockingBuffer::doWriteback(Addr addr,
PacketPtr pkt = new Packet(req, Packet::Writeback, -1);
pkt->allocate();
if (data) {
- memcpy(pkt->getPtr<uint8_t>(), data, size);
+ std::memcpy(pkt->getPtr<uint8_t>(), data, size);
}
if (compressed) {
@@ -217,7 +218,7 @@ BlockingBuffer::doWriteback(PacketPtr &pkt)
// Since allocate as buffer copies the request,
// need to copy data here.
- memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), pkt->getSize());
+ std::memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), pkt->getSize());
cache->setBlocked(Blocked_NoWBBuffers);
cache->setMasterRequest(Request_WB, curTick);
diff --git a/src/mem/cache/miss/blocking_buffer.hh b/src/mem/cache/miss/blocking_buffer.hh
index 205068a8c..24386a249 100644
--- a/src/mem/cache/miss/blocking_buffer.hh
+++ b/src/mem/cache/miss/blocking_buffer.hh
@@ -90,6 +90,7 @@ public:
PacketPtr &target)
{
fatal("Unimplemented");
+ M5_DUMMY_RETURN
}
/**
@@ -201,6 +202,7 @@ public:
MSHR* allocateTargetList(Addr addr)
{
fatal("Unimplemented");
+ M5_DUMMY_RETURN
}
};
diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc
index 38f9662ea..e547e112e 100644
--- a/src/mem/cache/tags/iic.cc
+++ b/src/mem/cache/tags/iic.cc
@@ -527,7 +527,7 @@ IIC::hash(Addr addr) const {
tag = extractTag(addr);
mask = hashSets-1; /* assumes iic_hash_size is a power of 2 */
x = tag & mask;
- y = (tag >> (int)(::log(hashSets)/::log(2))) & mask;
+ y = (tag >> (int)(::log((double)hashSets)/::log((double)2))) & mask;
assert (x < hashSets && y < hashSets);
return x ^ y;
#endif
diff --git a/src/mem/cache/tags/lru.hh b/src/mem/cache/tags/lru.hh
index 4b94adca6..75272544c 100644
--- a/src/mem/cache/tags/lru.hh
+++ b/src/mem/cache/tags/lru.hh
@@ -36,6 +36,7 @@
#ifndef __LRU_HH__
#define __LRU_HH__
+#include <cstring>
#include <list>
#include "mem/cache/cache_blk.hh" // base class
@@ -273,7 +274,7 @@ public:
*/
void readData(LRUBlk *blk, uint8_t *data)
{
- memcpy(data, blk->data, blk->size);
+ std::memcpy(data, blk->data, blk->size);
}
/**
diff --git a/src/mem/cache/tags/split.hh b/src/mem/cache/tags/split.hh
index e6ace0921..840b68940 100644
--- a/src/mem/cache/tags/split.hh
+++ b/src/mem/cache/tags/split.hh
@@ -36,6 +36,7 @@
#ifndef __SPLIT_HH__
#define __SPLIT_HH__
+#include <cstring>
#include <list>
#include "mem/cache/cache_blk.hh" // base class
@@ -234,6 +235,7 @@ class Split : public BaseTags
int extractSet(Addr addr) const
{
panic("should never call this!\n");
+ M5_DUMMY_RETURN
}
/**
@@ -281,7 +283,7 @@ class Split : public BaseTags
*/
void readData(SplitBlk *blk, uint8_t *data)
{
- memcpy(data, blk->data, blk->size);
+ std::memcpy(data, blk->data, blk->size);
}
/**
diff --git a/src/mem/cache/tags/split_lifo.hh b/src/mem/cache/tags/split_lifo.hh
index 9001cdb14..0f8adf18d 100644
--- a/src/mem/cache/tags/split_lifo.hh
+++ b/src/mem/cache/tags/split_lifo.hh
@@ -36,6 +36,7 @@
#ifndef __SPLIT_LIFO_HH__
#define __SPLIT_LIFO_HH__
+#include <cstring>
#include <list>
#include "mem/cache/cache_blk.hh" // base class
@@ -296,7 +297,7 @@ public:
*/
void readData(SplitBlk *blk, uint8_t *data)
{
- memcpy(data, blk->data, blk->size);
+ std::memcpy(data, blk->data, blk->size);
}
/**
diff --git a/src/mem/cache/tags/split_lru.hh b/src/mem/cache/tags/split_lru.hh
index e17a478d3..eb65445ea 100644
--- a/src/mem/cache/tags/split_lru.hh
+++ b/src/mem/cache/tags/split_lru.hh
@@ -36,6 +36,7 @@
#ifndef __SPLIT_LRU_HH__
#define __SPLIT_LRU_HH__
+#include <cstring>
#include <list>
#include "mem/cache/cache_blk.hh" // base class
@@ -279,7 +280,7 @@ public:
*/
void readData(SplitBlk *blk, uint8_t *data)
{
- memcpy(data, blk->data, blk->size);
+ std::memcpy(data, blk->data, blk->size);
}
/**
diff --git a/src/mem/dram.cc b/src/mem/dram.cc
index 873ca5b97..394c70db6 100644
--- a/src/mem/dram.cc
+++ b/src/mem/dram.cc
@@ -102,7 +102,7 @@ Kluwer Academic, pages 291-310, March, 2000.
#include "mem/dram.hh"
#include "sim/builder.hh"
-
+#include <stdlib.h>
#include <string>
extern int maxThreadsPerCPU;
@@ -203,7 +203,7 @@ DRAMMemory::DRAMMemory(Params *p)
last_bank = num_banks+1;
last_row = num_rows;
busy_until = new Tick[num_banks];
- memset(busy_until,0,sizeof(Tick)*num_banks); /* initiliaze */
+ std::memset(busy_until,0,sizeof(Tick)*num_banks); /* initiliaze */
}
diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index e2faf4527..44805236c 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -36,7 +36,7 @@
*/
#include <iostream>
-
+#include <cstring>
#include "base/misc.hh"
#include "base/trace.hh"
#include "mem/packet.hh"
@@ -183,7 +183,7 @@ fixPacket(PacketPtr func, PacketPtr timing)
if (func->isRead()) {
if (funcStart >= timingStart && funcEnd <= timingEnd) {
func->allocate();
- memcpy(func->getPtr<uint8_t>(), timing->getPtr<uint8_t>() +
+ std::memcpy(func->getPtr<uint8_t>(), timing->getPtr<uint8_t>() +
funcStart - timingStart, func->getSize());
func->result = Packet::Success;
func->flags |= SATISFIED;
@@ -199,11 +199,11 @@ fixPacket(PacketPtr func, PacketPtr timing)
}
} else if (func->isWrite()) {
if (funcStart >= timingStart) {
- memcpy(timing->getPtr<uint8_t>() + (funcStart - timingStart),
+ std::memcpy(timing->getPtr<uint8_t>() + (funcStart - timingStart),
func->getPtr<uint8_t>(),
(std::min(funcEnd, timingEnd) - funcStart) + 1);
} else { // timingStart > funcStart
- memcpy(timing->getPtr<uint8_t>(),
+ std::memcpy(timing->getPtr<uint8_t>(),
func->getPtr<uint8_t>() + (timingStart - funcStart),
(std::min(funcEnd, timingEnd) - timingStart) + 1);
}
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 7d616a4e5..eccd42bec 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -59,7 +59,7 @@ PhysicalMemory::PhysicalMemory(Params *p)
int map_flags = MAP_ANON | MAP_PRIVATE;
pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
- map_flags, -1, 0);
+ map_flags, -1, 0);
if (pmemAddr == (void *)MAP_FAILED) {
perror("mmap");
@@ -84,7 +84,7 @@ PhysicalMemory::init()
PhysicalMemory::~PhysicalMemory()
{
if (pmemAddr)
- munmap(pmemAddr, params()->addrRange.size());
+ munmap((char*)pmemAddr, params()->addrRange.size());
//Remove memPorts?
}
@@ -430,7 +430,7 @@ PhysicalMemory::unserialize(Checkpoint *cp, const string &section)
// unmap file that was mmaped in the constructor
// This is done here to make sure that gzip and open don't muck with our
// nice large space of memory before we reallocate it
- munmap(pmemAddr, params()->addrRange.size());
+ munmap((char*)pmemAddr, params()->addrRange.size());
pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
MAP_ANON | MAP_PRIVATE, -1, 0);
diff --git a/src/mem/port.cc b/src/mem/port.cc
index bbc98c160..da719bbd9 100644
--- a/src/mem/port.cc
+++ b/src/mem/port.cc
@@ -32,6 +32,7 @@
* @file
* Port object definitions.
*/
+#include <cstring>
#include "base/chunk_generator.hh"
#include "base/trace.hh"
@@ -78,7 +79,7 @@ Port::memsetBlob(Addr addr, uint8_t val, int size)
// quick and dirty...
uint8_t *buf = new uint8_t[size];
- memset(buf, val, size);
+ std::memset(buf, val, size);
blobHelper(addr, buf, size, Packet::WriteReq);
delete [] buf;
diff --git a/src/mem/port.hh b/src/mem/port.hh
index 75afc04e6..5e55225bf 100644
--- a/src/mem/port.hh
+++ b/src/mem/port.hh
@@ -159,7 +159,7 @@ class Port
this function to be called, a DMA interface doesn't really have a
block size, so it is defaulted to a panic.
*/
- virtual int deviceBlockSize() { panic("??"); }
+ virtual int deviceBlockSize() { panic("??"); M5_DUMMY_RETURN }
/** The peer port is requesting us to reply with a list of the ranges we
are responsible for.
@@ -261,8 +261,10 @@ class FunctionalPort : public Port
{}
protected:
- virtual bool recvTiming(PacketPtr pkt) { panic("FuncPort is UniDir"); }
- virtual Tick recvAtomic(PacketPtr pkt) { panic("FuncPort is UniDir"); }
+ virtual bool recvTiming(PacketPtr pkt) { panic("FuncPort is UniDir");
+ M5_DUMMY_RETURN }
+ virtual Tick recvAtomic(PacketPtr pkt) { panic("FuncPort is UniDir");
+ M5_DUMMY_RETURN }
virtual void recvFunctional(PacketPtr pkt) { panic("FuncPort is UniDir"); }
virtual void recvStatusChange(Status status) {}
diff --git a/src/sim/byteswap.hh b/src/sim/byteswap.hh
index 4ac1ee711..da427f1e1 100644
--- a/src/sim/byteswap.hh
+++ b/src/sim/byteswap.hh
@@ -47,7 +47,7 @@
// If one doesn't exist, we pretty much get what is listed below, so it all
// works out
#include <byteswap.h>
-#elif defined (__sun__)
+#elif defined (__sun)
#include <sys/isa_defs.h>
#else
#include <machine/endian.h>