types: clean up types, especially signed vs unsigned

72 files changed, 337 insertions, 334 deletions

diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 02497e282..adbebb346 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -351,7 +351,7 @@ MiscRegFile::setIpr(int idx, uint64_t val, ThreadContext *tc)
 
       case IPR_IPLR:
 #ifdef DEBUG
-        if (break_ipl != -1 && break_ipl == (val & 0x1f))
+        if (break_ipl != -1 && break_ipl == (int)(val & 0x1f))
             debug_break();
 #endif
 
diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh
index f8e0ad4ef..3200201db 100644
--- a/src/arch/alpha/interrupts.hh
+++ b/src/arch/alpha/interrupts.hh
@@ -139,14 +139,14 @@ class Interrupts : public SimObject
     Fault
     getInterrupt(ThreadContext *tc)
     {
-        int ipl = 0;
-        int summary = 0;
+        uint64_t ipl = 0;
+        uint64_t summary = 0;
 
         if (tc->readMiscRegNoEffect(IPR_ASTRR))
             panic("asynchronous traps not implemented\n");
 
         if (tc->readMiscRegNoEffect(IPR_SIRR)) {
-            for (int i = INTLEVEL_SOFTWARE_MIN;
+            for (uint64_t i = INTLEVEL_SOFTWARE_MIN;
                  i < INTLEVEL_SOFTWARE_MAX; i++) {
                 if (tc->readMiscRegNoEffect(IPR_SIRR) & (ULL(1) << i)) {
                     // See table 4-19 of 21164 hardware reference
@@ -158,7 +158,7 @@ class Interrupts : public SimObject
 
         uint64_t interrupts = intstatus;
         if (interrupts) {
-            for (int i = INTLEVEL_EXTERNAL_MIN;
+            for (uint64_t i = INTLEVEL_EXTERNAL_MIN;
                  i < INTLEVEL_EXTERNAL_MAX; i++) {
                 if (interrupts & (ULL(1) << i)) {
                     // See table 4-19 of 21164 hardware reference
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 278ce31e8..cb43fcb74 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -114,7 +114,7 @@ decode OPCODE default Unknown::unknown() {
 
             0x00: addl({{ Rc.sl = Ra.sl + Rb_or_imm.sl; }});
             0x40: addlv({{
-                uint32_t tmp  = Ra.sl + Rb_or_imm.sl;
+                int32_t tmp  = Ra.sl + Rb_or_imm.sl;
                 // signed overflow occurs when operands have same sign
                 // and sign of result does not match.
                 if (Ra.sl<31:> == Rb_or_imm.sl<31:> && tmp<31:> != Ra.sl<31:>)
@@ -138,7 +138,7 @@ decode OPCODE default Unknown::unknown() {
 
             0x09: subl({{ Rc.sl = Ra.sl - Rb_or_imm.sl; }});
             0x49: sublv({{
-                uint32_t tmp  = Ra.sl - Rb_or_imm.sl;
+                int32_t tmp  = Ra.sl - Rb_or_imm.sl;
                 // signed overflow detection is same as for add,
                 // except we need to look at the *complemented*
                 // sign bit of the subtrahend (Rb), i.e., if the initial
diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index f7114e5cc..c8d6f33f9 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -127,45 +127,47 @@ enum mode_type
 
 // Constants Related to the number of registers
 
-const int NumIntArchRegs = 32;
-const int NumPALShadowRegs = 8;
-const int NumFloatArchRegs = 32;
-// @todo: Figure out what this number really should be.
-const int NumMiscArchRegs = 77;
-
-const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs;
-const int NumFloatRegs = NumFloatArchRegs;
-const int NumMiscRegs = NumMiscArchRegs;
-
-const int TotalNumRegs =
-    NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs;
-
-const int TotalDataRegs = NumIntRegs + NumFloatRegs;
-
-// semantically meaningful register indices
-const int ZeroReg = 31;     // architecturally meaningful
-// the rest of these depend on the ABI
-const int StackPointerReg = 30;
-const int GlobalPointerReg = 29;
-const int ProcedureValueReg = 27;
-const int ReturnAddressReg = 26;
-const int ReturnValueReg = 0;
-const int FramePointerReg = 15;
-
-const int SyscallNumReg = 0;
-const int FirstArgumentReg = 16;
-const int SyscallPseudoReturnReg = 20;
-const int SyscallSuccessReg = 19;
-
-const int LogVMPageSize = 13;       // 8K bytes
-const int VMPageSize = (1 << LogVMPageSize);
-
-const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
-
-const int MachineBytes = 8;
-const int WordBytes = 4;
-const int HalfwordBytes = 2;
-const int ByteBytes = 1;
+enum {
+    NumIntArchRegs = 32,
+    NumPALShadowRegs = 8,
+    NumFloatArchRegs = 32,
+    // @todo: Figure out what this number really should be.
+    NumMiscArchRegs = 77,
+
+    NumIntRegs = NumIntArchRegs + NumPALShadowRegs,
+    NumFloatRegs = NumFloatArchRegs,
+    NumMiscRegs = NumMiscArchRegs,
+
+    TotalNumRegs =
+        NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs,
+
+    TotalDataRegs = NumIntRegs + NumFloatRegs,
+
+    // semantically meaningful register indices
+    ZeroReg = 31,     // architecturally meaningful
+    // the rest of these depend on the ABI
+    StackPointerReg = 30,
+    GlobalPointerReg = 29,
+    ProcedureValueReg = 27,
+    ReturnAddressReg = 26,
+    ReturnValueReg = 0,
+    FramePointerReg = 15,
+
+    SyscallNumReg = 0,
+    FirstArgumentReg = 16,
+    SyscallPseudoReturnReg = 20,
+    SyscallSuccessReg = 19,
+
+    LogVMPageSize = 13,       // 8K bytes
+    VMPageSize = (1 << LogVMPageSize),
+
+    BranchPredAddrShiftAmt = 2, // instructions are 4-byte aligned
+
+    MachineBytes = 8,
+    WordBytes = 4,
+    HalfwordBytes = 2,
+    ByteBytes = 1,
+};
 
 // return a no-op instruction... used for instruction fetch faults
 // Alpha UNOP (ldq_u r31,0(r0))
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index 93df459ae..6aad45da8 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -100,11 +100,11 @@ AlphaLiveProcess::argsInit(int intSize, int pageSize)
     int auxv_array_size = intSize * 2 * (auxv.size() + 1);
 
     int arg_data_size = 0;
-    for (int i = 0; i < argv.size(); ++i) {
+    for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
         arg_data_size += argv[i].size() + 1;
     }
     int env_data_size = 0;
-    for (int i = 0; i < envp.size(); ++i) {
+    for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
         env_data_size += envp[i].size() + 1;
     }
 
@@ -148,8 +148,7 @@ AlphaLiveProcess::argsInit(int intSize, int pageSize)
     copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
 
     //Copy the aux stuff
-    for(int x = 0; x < auxv.size(); x++)
-    {
+    for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
         initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
                 (uint8_t*)&(auxv[x].a_type), intSize);
         initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
diff --git a/src/arch/alpha/stacktrace.hh b/src/arch/alpha/stacktrace.hh
index db42c4399..c09ab3576 100644
--- a/src/arch/alpha/stacktrace.hh
+++ b/src/arch/alpha/stacktrace.hh
@@ -91,9 +91,11 @@ class StackTrace
   public:
     const std::vector<Addr> &getstack() const { return stack; }
 
-    static const int user = 1;
-    static const int console = 2;
-    static const int unknown = 3;
+    enum {
+        user = 1,
+        console = 2,
+        unknown = 3
+    };
 
 #if TRACING_ON
   private:
diff --git a/src/base/atomicio.cc b/src/base/atomicio.cc
index 3f3e6d6f0..13eeca05b 100644
--- a/src/base/atomicio.cc
+++ b/src/base/atomicio.cc
@@ -37,7 +37,7 @@ ssize_t
 atomic_read(int fd, void *s, size_t n)
 {
     char *p = reinterpret_cast<char *>(s);
-    ssize_t pos = 0;
+    size_t pos = 0;
 
     // Keep reading until we've gotten all of the data.
     while (n > pos) {
@@ -66,7 +66,7 @@ ssize_t
 atomic_write(int fd, const void *s, size_t n)
 {
     const char *p = reinterpret_cast<const char *>(s);
-    ssize_t pos = 0;
+    size_t pos = 0;
 
     // Keep writing until we've written all of the data
     while (n > pos) {
diff --git a/src/base/chunk_generator.hh b/src/base/chunk_generator.hh
index d2ae45d1e..bc71a0569 100644
--- a/src/base/chunk_generator.hh
+++ b/src/base/chunk_generator.hh
@@ -37,8 +37,9 @@
  */
 
 #include <algorithm>
+
 #include "base/intmath.hh"
-#include "arch/isa_traits.hh" // for Addr
+#include "base/types.hh"
 
 /**
  * This class takes an arbitrary memory region (address/length pair)
@@ -61,13 +62,13 @@ class ChunkGenerator
     /** The starting address of the next chunk (after the current one). */
     Addr nextAddr;
     /** The size of the current chunk (in bytes). */
-    int  curSize;
+    unsigned  curSize;
     /** The number of bytes remaining in the region after the current chunk. */
-    int  sizeLeft;
+    unsigned  sizeLeft;
     /** The start address so we can calculate offset in writing block. */
     const Addr startAddr;
     /** The maximum chunk size, e.g., the cache block size or page size. */
-    const int chunkSize;
+    const unsigned chunkSize;
 
   public:
     /**
@@ -77,7 +78,7 @@ class ChunkGenerator
      * @param _chunkSize The size/alignment of chunks into which
      *    the region should be decomposed.
      */
-    ChunkGenerator(Addr _startAddr, int totalSize, int _chunkSize)
+    ChunkGenerator(Addr _startAddr, unsigned totalSize, unsigned _chunkSize)
         : startAddr(_startAddr), chunkSize(_chunkSize)
     {
         // chunkSize must be a power of two
@@ -102,31 +103,33 @@ class ChunkGenerator
         }
 
         // how many bytes are left between curAddr and the end of this chunk?
-        int left_in_chunk = nextAddr - curAddr;
+        unsigned left_in_chunk = nextAddr - curAddr;
         curSize = std::min(totalSize, left_in_chunk);
         sizeLeft = totalSize - curSize;
     }
 
     /** Return starting address of current chunk. */
-    Addr addr() { return curAddr; }
+    Addr addr() const { return curAddr; }
     /** Return size in bytes of current chunk. */
-    int  size() { return curSize; }
+    unsigned size() const { return curSize; }
 
     /** Number of bytes we have already chunked up. */
-    int complete() { return curAddr - startAddr; }
+    unsigned complete() const { return curAddr - startAddr; }
+
     /**
      * Are we done?  That is, did the last call to next() advance
      * past the end of the region?
      * @return True if yes, false if more to go.
      */
-    bool done() { return (curSize == 0); }
+    bool done() const { return (curSize == 0); }
 
     /**
      * Advance generator to next chunk.
      * @return True if successful, false if unsuccessful
      * (because we were at the last chunk).
      */
-    bool next()
+    bool
+    next()
     {
         if (sizeLeft == 0) {
             curSize = 0;
diff --git a/src/base/crc.cc b/src/base/crc.cc
index d4b0de70e..6b04213c9 100644
--- a/src/base/crc.cc
+++ b/src/base/crc.cc
@@ -48,15 +48,12 @@
 uint32_t
 crc32le(const uint8_t *buf, size_t len)
 {
-    uint32_t c, crc, carry;
-    size_t i, j;
+    uint32_t crc = 0xffffffffU;      /* initial value */
 
-    crc = 0xffffffffU;      /* initial value */
-
-    for (i = 0; i < len; i++) {
-        c = buf[i];
-        for (j = 0; j < 8; j++) {
-            carry = ((crc & 0x01) ? 1 : 0) ^ (c & 0x01);
+    for (size_t i = 0; i < len; i++) {
+        uint32_t c = buf[i];
+        for (size_t j = 0; j < 8; j++) {
+            uint32_t carry = ((crc & 0x01) ? 1 : 0) ^ (c & 0x01);
             crc >>= 1;
             c >>= 1;
             if (carry)
@@ -64,7 +61,7 @@ crc32le(const uint8_t *buf, size_t len)
         }
     }
 
-    return (crc);
+    return crc;
 }
 #else
 uint32_t
@@ -76,33 +73,27 @@ crc32le(const uint8_t *buf, size_t len)
         0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c,
         0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
     };
-    uint32_t crc;
-    int i;
-
-    crc = 0xffffffffU;      /* initial value */
+    uint32_t crc = 0xffffffffU;      /* initial value */
 
-    for (i = 0; i < len; i++) {
+    for (size_t i = 0; i < len; i++) {
         crc ^= buf[i];
         crc = (crc >> 4) ^ crctab[crc & 0xf];
         crc = (crc >> 4) ^ crctab[crc & 0xf];
     }
 
-    return (crc);
+    return crc;
 }
 #endif
 
 uint32_t
 crc32be(const uint8_t *buf, size_t len)
 {
-    uint32_t c, crc, carry;
-    size_t i, j;
-
-    crc = 0xffffffffU;      /* initial value */
+    uint32_t crc = 0xffffffffU;      /* initial value */
 
-    for (i = 0; i < len; i++) {
-        c = buf[i];
-        for (j = 0; j < 8; j++) {
-            carry = ((crc & 0x80000000U) ? 1 : 0) ^ (c & 0x01);
+    for (size_t i = 0; i < len; i++) {
+        uint32_t c = buf[i];
+        for (size_t j = 0; j < 8; j++) {
+            uint32_t carry = ((crc & 0x80000000U) ? 1 : 0) ^ (c & 0x01);
             crc <<= 1;
             c >>= 1;
             if (carry)
diff --git a/src/base/fast_alloc.hh b/src/base/fast_alloc.hh
index aa8fff130..41f6f248c 100644
--- a/src/base/fast_alloc.hh
+++ b/src/base/fast_alloc.hh
@@ -101,7 +101,7 @@ class FastAlloc
     // this class.  There's no fundamental limit, but this limits the
     // size of the freeLists array.  Let's not make this really huge
     // like in Blizzard.
-    static const int Max_Alloc_Size = 512;
+    static const size_t Max_Alloc_Size = 512;
 
     // Alloc_Quantum is the difference in size between adjacent
     // buckets in the free list array.
diff --git a/src/base/loader/symtab.cc b/src/base/loader/symtab.cc
index d137477f4..7163260ec 100644
--- a/src/base/loader/symtab.cc
+++ b/src/base/loader/symtab.cc
@@ -80,7 +80,7 @@ SymbolTable::load(const string &filename)
         if (buffer.empty())
             continue;
 
-        int idx = buffer.find(',');
+        string::size_type idx = buffer.find(',');
         if (idx == string::npos)
             return false;
 
diff --git a/src/base/match.cc b/src/base/match.cc
index 994209864..08ba5f20e 100644
--- a/src/base/match.cc
+++ b/src/base/match.cc
@@ -56,7 +56,7 @@ ObjectMatch::setExpression(const vector<string> &expr)
         tokens.resize(0);
     } else {
         tokens.resize(expr.size());
-        for (int i = 0; i < expr.size(); ++i)
+        for (vector<string>::size_type i = 0; i < expr.size(); ++i)
             tokenize(tokens[i], expr[i], '.');
     }
 }
diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc
index 93d86447e..6c301b10e 100644
--- a/src/base/remote_gdb.cc
+++ b/src/base/remote_gdb.cc
@@ -148,7 +148,7 @@ void
 debugger()
 {
     static int current_debugger = -1;
-    if (current_debugger >= 0 && current_debugger < debuggers.size()) {
+    if (current_debugger >= 0 && current_debugger < (int)debuggers.size()) {
         BaseRemoteGDB *gdb = debuggers[current_debugger];
         if (!gdb->isattached())
             gdb->listener->accept();
@@ -632,7 +632,7 @@ BaseRemoteGDB::trap(int type)
     size_t datalen, len;
     char data[GDBPacketBufLen + 1];
     char *buffer;
-    int bufferSize;
+    size_t bufferSize;
     const char *p;
     char command, subcmd;
     string var;
@@ -812,7 +812,7 @@ BaseRemoteGDB::trap(int type)
             goto out;
 
           case GDBCont:
-            if (p - data < datalen) {
+            if (p - data < (ptrdiff_t)datalen) {
                 val = hex2i(&p);
                 context->setPC(val);
                 context->setNextPC(val + sizeof(MachInst));
@@ -831,7 +831,7 @@ BaseRemoteGDB::trap(int type)
             goto out;
 
           case GDBStep:
-            if (p - data < datalen) {
+            if (p - data < (ptrdiff_t)datalen) {
                 val = hex2i(&p);
                 context->setPC(val);
                 context->setNextPC(val + sizeof(MachInst));
diff --git a/src/base/sat_counter.cc b/src/base/sat_counter.cc
index 8980275eb..61815c112 100644
--- a/src/base/sat_counter.cc
+++ b/src/base/sat_counter.cc
@@ -66,7 +66,7 @@ SaturatingCounterPred::SaturatingCounterPred(string p_name,
     table = new unsigned[max_index + 1];
 
     //  Initialize with the right parameters & clear the counter
-    for (int i = 0; i <= max_index; ++i)
+    for (unsigned long i = 0; i <= max_index; ++i)
         table[i] = init_value;
 }
 
diff --git a/src/base/sat_counter.hh b/src/base/sat_counter.hh
index 38c4ec74f..963a39fc8 100644
--- a/src/base/sat_counter.hh
+++ b/src/base/sat_counter.hh
@@ -119,8 +119,10 @@ class SaturatingCounterPred : public GenericPredictor
                           unsigned _zero_change = 1, unsigned _one_change = 1,
                           unsigned _thresh = 1, unsigned _init_value = 0);
 
-    void clear() {
-        for (int i = 0; i <= max_index; ++i)
+    void
+    clear()
+    {
+        for (unsigned long i = 0; i <= max_index; ++i)
             table[i] = init_value;
     }
 
diff --git a/src/base/statistics.cc b/src/base/statistics.cc
index abe3b53bb..59013ed34 100644
--- a/src/base/statistics.cc
+++ b/src/base/statistics.cc
@@ -299,7 +299,7 @@ Formula::zero() const
 {
     VResult vec;
     result(vec);
-    for (off_t i = 0; i < vec.size(); ++i)
+    for (VResult::size_type i = 0; i < vec.size(); ++i)
         if (vec[i] != 0.0)
             return false;
     return true;
diff --git a/src/base/statistics.hh b/src/base/statistics.hh
index 52c0111d8..0f001dccb 100644
--- a/src/base/statistics.hh
+++ b/src/base/statistics.hh
@@ -1365,7 +1365,7 @@ class DistStor
         data.underflow = underflow;
         data.overflow = overflow;
 
-        int buckets = params->buckets;
+        size_type buckets = params->buckets;
         data.cvec.resize(buckets);
         for (off_type i = 0; i < buckets; ++i)
             data.cvec[i] = cvec[i];
diff --git a/src/base/timebuf.hh b/src/base/timebuf.hh
index 9f9fc32b5..b6f709d71 100644
--- a/src/base/timebuf.hh
+++ b/src/base/timebuf.hh
@@ -42,12 +42,12 @@ class TimeBuffer
   protected:
     int past;
     int future;
-    int size;
+    unsigned size;
     int _id;
 
     char *data;
     std::vector<char *> index;
-    int base;
+    unsigned base;
 
     void valid(int idx)
     {
@@ -138,12 +138,12 @@ class TimeBuffer
 
   public:
     TimeBuffer(int p, int f)
-        : past(p), future(f), size(past + future + 1),
+        : past(p), future(f), size(past + future + 1), 
           data(new char[size * sizeof(T)]), index(size), base(0)
     {
         assert(past >= 0 && future >= 0);
         char *ptr = data;
-        for (int i = 0; i < size; i++) {
+        for (unsigned i = 0; i < size; i++) {
             index[i] = ptr;
             std::memset(ptr, 0, sizeof(T));
             new (ptr) T;
@@ -160,7 +160,7 @@ class TimeBuffer
 
     ~TimeBuffer()
     {
-        for (int i = 0; i < size; ++i)
+        for (unsigned i = 0; i < size; ++i)
             (reinterpret_cast<T *>(index[i]))->~T();
         delete [] data;
     }
@@ -182,7 +182,7 @@ class TimeBuffer
             base = 0;
 
         int ptr = base + future;
-        if (ptr >= size)
+        if (ptr >= (int)size)
             ptr -= size;
         (reinterpret_cast<T *>(index[ptr]))->~T();
         std::memset(index[ptr], 0, sizeof(T));
@@ -195,7 +195,7 @@ class TimeBuffer
         valid(idx);
 
         int vector_index = idx + base;
-        if (vector_index >= size) {
+        if (vector_index >= (int)size) {
             vector_index -= size;
         } else if (vector_index < 0) {
             vector_index += size;
@@ -210,7 +210,7 @@ class TimeBuffer
         valid(idx);
 
         int vector_index = idx + base;
-        if (vector_index >= size) {
+        if (vector_index >= (int)size) {
             vector_index -= size;
         } else if (vector_index < 0) {
             vector_index += size;
@@ -231,7 +231,7 @@ class TimeBuffer
         return wire(this, 0);
     }
 
-    int getSize()
+    unsigned getSize()
     {
         return size;
     }
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 24483bf25..3d7d713e8 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -184,7 +184,7 @@ InOrderCPU::InOrderCPU(Params *params)
     // Resize for Multithreading CPUs
     thread.resize(numThreads);
 
-    int active_threads = params->workload.size();
+    ThreadID active_threads = params->workload.size();
 
     if (active_threads > MaxThreads) {
         panic("Workload Size too large. Increase the 'MaxThreads'"
@@ -204,7 +204,7 @@ InOrderCPU::InOrderCPU(Params *params)
     }
 
     for (ThreadID tid = 0; tid < numThreads; ++tid) {
-        if (tid < params->workload.size()) {
+        if (tid < (ThreadID)params->workload.size()) {
             DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n",
                     tid, this->thread[tid]);
             this->thread[tid] =
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index faf37382f..794d81def 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -623,7 +623,7 @@ class InOrderCPU : public BaseCPU
     {
         Counter total(0);
 
-        for (ThreadID tid = 0; tid < thread.size(); tid++)
+        for (ThreadID tid = 0; tid < (ThreadID)thread.size(); tid++)
             total += thread[tid]->numInst;
 
         return total;
diff --git a/src/cpu/inorder/pipeline_traits.hh b/src/cpu/inorder/pipeline_traits.hh
index 5012553b0..3c28894e7 100644
--- a/src/cpu/inorder/pipeline_traits.hh
+++ b/src/cpu/inorder/pipeline_traits.hh
@@ -49,7 +49,7 @@ class InOrderDynInst;
 namespace ThePipeline {
     // Pipeline Constants
     const unsigned NumStages = 5;
-    const unsigned MaxThreads = 8;
+    const ThreadID MaxThreads = 8;
     const unsigned StageWidth = 1;
     const unsigned BackEndStartStage = 2;
 
diff --git a/src/cpu/memtest/memtest.cc b/src/cpu/memtest/memtest.cc
index 3c57f85b7..fccb8435f 100644
--- a/src/cpu/memtest/memtest.cc
+++ b/src/cpu/memtest/memtest.cc
@@ -217,7 +217,7 @@ MemTest::completeRequest(PacketPtr pkt)
         numReads++;
         numReadsStat++;
 
-        if (numReads == nextProgressMessage) {
+        if (numReads == (uint64_t)nextProgressMessage) {
             ccprintf(cerr, "%s: completed %d read accesses @%d\n",
                      name(), numReads, curTick);
             nextProgressMessage += progressInterval;
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index ba1205010..25fa64071 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -488,7 +488,7 @@ OzoneCPU<Impl>::copySrcTranslate(Addr src)
     return NoFault;
 #if 0
     static bool no_warn = true;
-    int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
+    unsigned blk_size = dcacheInterface ? dcacheInterface->getBlockSize() : 64;
     // Only support block sizes of 64 atm.
     assert(blk_size == 64);
     int offset = src & (blk_size - 1);
@@ -527,7 +527,7 @@ OzoneCPU<Impl>::copy(Addr dest)
     return NoFault;
 #if 0
     static bool no_warn = true;
-    int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
+    unsigned blk_size = dcacheInterface ? dcacheInterface->getBlockSize() : 64;
     // Only support block sizes of 64 atm.
     assert(blk_size == 64);
     uint8_t data[blk_size];
diff --git a/src/cpu/pred/2bit_local.cc b/src/cpu/pred/2bit_local.cc
index 65925fe79..a70d65296 100644
--- a/src/cpu/pred/2bit_local.cc
+++ b/src/cpu/pred/2bit_local.cc
@@ -58,7 +58,7 @@ LocalBP::LocalBP(unsigned _localPredictorSize,
     // Setup the array of counters for the local predictor.
     localCtrs.resize(localPredictorSets);
 
-    for (int i = 0; i < localPredictorSets; ++i)
+    for (unsigned i = 0; i < localPredictorSets; ++i)
         localCtrs[i].setBits(_localCtrBits);
 
     DPRINTF(Fetch, "Branch predictor: local predictor size: %i\n",
@@ -73,7 +73,7 @@ LocalBP::LocalBP(unsigned _localPredictorSize,
 void
 LocalBP::reset()
 {
-    for (int i = 0; i < localPredictorSets; ++i) {
+    for (unsigned i = 0; i < localPredictorSets; ++i) {
         localCtrs[i].reset();
     }
 }
diff --git a/src/cpu/pred/btb.cc b/src/cpu/pred/btb.cc
index 81676aceb..c6a5e23f9 100644
--- a/src/cpu/pred/btb.cc
+++ b/src/cpu/pred/btb.cc
@@ -47,7 +47,7 @@ DefaultBTB::DefaultBTB(unsigned _numEntries,
 
     btb.resize(numEntries);
 
-    for (int i = 0; i < numEntries; ++i) {
+    for (unsigned i = 0; i < numEntries; ++i) {
         btb[i].valid = false;
     }
 
@@ -61,7 +61,7 @@ DefaultBTB::DefaultBTB(unsigned _numEntries,
 void
 DefaultBTB::reset()
 {
-    for (int i = 0; i < numEntries; ++i) {
+    for (unsigned i = 0; i < numEntries; ++i) {
         btb[i].valid = false;
     }
 }
diff --git a/src/cpu/pred/ras.cc b/src/cpu/pred/ras.cc
index 5af188749..6373e5de3 100644
--- a/src/cpu/pred/ras.cc
+++ b/src/cpu/pred/ras.cc
@@ -39,7 +39,7 @@ ReturnAddrStack::init(unsigned _numEntries)
 
      addrStack.resize(numEntries);
 
-     for (int i = 0; i < numEntries; ++i)
+     for (unsigned i = 0; i < numEntries; ++i)
          addrStack[i] = 0;
 }
 
@@ -48,7 +48,7 @@ ReturnAddrStack::reset()
 {
     usedEntries = 0;
     tos = 0;
-    for (int i = 0; i < numEntries; ++i)
+    for (unsigned i = 0; i < numEntries; ++i)
         addrStack[i] = 0;
 }
 
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 2ec56c0f2..bab4b8b51 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -61,7 +61,7 @@ AtomicSimpleCPU::TickEvent::description() const
 }
 
 Port *
-AtomicSimpleCPU::getPort(const std::string &if_name, int idx)
+AtomicSimpleCPU::getPort(const string &if_name, int idx)
 {
     if (if_name == "dcache_port")
         return &dcachePort;
@@ -302,7 +302,7 @@ AtomicSimpleCPU::read(Addr addr, T &data, unsigned flags)
     }
 
     //The block size of our peer.
-    int blockSize = dcachePort.peerBlockSize();
+    unsigned blockSize = dcachePort.peerBlockSize();
     //The size of the data we're trying to read.
     int dataSize = sizeof(T);
 
@@ -444,7 +444,7 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
     }
 
     //The block size of our peer.
-    int blockSize = dcachePort.peerBlockSize();
+    unsigned blockSize = dcachePort.peerBlockSize();
     //The size of the data we're trying to read.
     int dataSize = sizeof(T);
 
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 61d034f31..279fb98b7 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -209,7 +209,8 @@ BaseSimpleCPU::copySrcTranslate(Addr src)
 {
 #if 0
     static bool no_warn = true;
-    int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
+    unsigned blk_size =
+        (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
     // Only support block sizes of 64 atm.
     assert(blk_size == 64);
     int offset = src & (blk_size - 1);
@@ -247,7 +248,8 @@ BaseSimpleCPU::copy(Addr dest)
 {
 #if 0
     static bool no_warn = true;
-    int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
+    unsigned blk_size =
+        (dcacheInterface) ? dcacheInterface->getBlockSize() : 64;
     // Only support block sizes of 64 atm.
     assert(blk_size == 64);
     uint8_t data[blk_size];
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 6666f6f9d..672fd9414 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -439,7 +439,7 @@ TimingSimpleCPU::read(Addr addr, T &data, unsigned flags)
     const int asid = 0;
     const ThreadID tid = 0;
     const Addr pc = thread->readPC();
-    int block_size = dcachePort.peerBlockSize();
+    unsigned block_size = dcachePort.peerBlockSize();
     int data_size = sizeof(T);
 
     RequestPtr req  = new Request(asid, addr, data_size,
@@ -557,7 +557,7 @@ TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
     const int asid = 0;
     const ThreadID tid = 0;
     const Addr pc = thread->readPC();
-    int block_size = dcachePort.peerBlockSize();
+    unsigned block_size = dcachePort.peerBlockSize();
     int data_size = sizeof(T);
 
     RequestPtr req = new Request(asid, addr, data_size,
diff --git a/src/dev/disk_image.cc b/src/dev/disk_image.cc
index 792a31204..aa8c98732 100644
--- a/src/dev/disk_image.cc
+++ b/src/dev/disk_image.cc
@@ -151,8 +151,8 @@ RawDiskImageParams::create()
 //
 // Copy on Write Disk image
 //
-const int CowDiskImage::VersionMajor = 1;
-const int CowDiskImage::VersionMinor = 0;
+const uint32_t CowDiskImage::VersionMajor = 1;
+const uint32_t CowDiskImage::VersionMinor = 0;
 
 class CowDiskCallback : public Callback
 {
diff --git a/src/dev/disk_image.hh b/src/dev/disk_image.hh
index 3918209fc..a5c70ec82 100644
--- a/src/dev/disk_image.hh
+++ b/src/dev/disk_image.hh
@@ -102,8 +102,8 @@ class RawDiskImage : public DiskImage
 class CowDiskImage : public DiskImage
 {
   public:
-    static const int VersionMajor;
-    static const int VersionMinor;
+    static const uint32_t VersionMajor;
+    static const uint32_t VersionMinor;
 
   protected:
     struct Sector {
diff --git a/src/dev/etherdump.hh b/src/dev/etherdump.hh
index 18a5d2c44..cf4213b27 100644
--- a/src/dev/etherdump.hh
+++ b/src/dev/etherdump.hh
@@ -47,7 +47,7 @@ class EtherDump : public SimObject
 {
   private:
     std::ostream *stream;
-    const int maxlen;
+    const unsigned maxlen;
     void dumpPacket(EthPacketPtr &packet);
     void init();
 
diff --git a/src/dev/etherpkt.hh b/src/dev/etherpkt.hh
index b7d33887b..c71d9cc30 100644
--- a/src/dev/etherpkt.hh
+++ b/src/dev/etherpkt.hh
@@ -58,14 +58,14 @@ class EthPacketData : public RefCounted
     /*
      * Length of the current packet
      */
-    int length;
+    unsigned length;
 
   public:
     EthPacketData()
         : data(NULL), length(0)
     { }
 
-    explicit EthPacketData(size_t size)
+    explicit EthPacketData(unsigned size)
         : data(new uint8_t[size]), length(0)
     { }
 
diff --git a/src/dev/ethertap.hh b/src/dev/ethertap.hh
index ac287cecb..94957b2ce 100644
--- a/src/dev/ethertap.hh
+++ b/src/dev/ethertap.hh
@@ -65,8 +65,8 @@ class EtherTap : public EtherObject
     int socket;
     char *buffer;
     int buflen;
-    int32_t buffer_offset;
-    int32_t data_len;
+    uint32_t buffer_offset;
+    uint32_t data_len;
 
     EtherDump *dump;
 
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index 37e253051..743de8a83 100644
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -1095,9 +1095,9 @@ void
 IGbE::DescCache<T>::reset()
 {
     DPRINTF(EthernetDesc, "Reseting descriptor cache\n");
-    for (int x = 0; x < usedCache.size(); x++)
+    for (CacheType::size_type x = 0; x < usedCache.size(); x++)
         delete usedCache[x];
-    for (int x = 0; x < unusedCache.size(); x++)
+    for (CacheType::size_type x = 0; x < unusedCache.size(); x++)
         delete unusedCache[x];
 
     usedCache.clear();
@@ -1117,16 +1117,16 @@ IGbE::DescCache<T>::serialize(std::ostream &os)
     SERIALIZE_SCALAR(moreToWb);
     SERIALIZE_SCALAR(wbAlignment);
 
-    int usedCacheSize = usedCache.size();
+    CacheType::size_type usedCacheSize = usedCache.size();
     SERIALIZE_SCALAR(usedCacheSize);
-    for(int x = 0; x < usedCacheSize; x++) {
+    for (CacheType::size_type x = 0; x < usedCacheSize; x++) {
         arrayParamOut(os, csprintf("usedCache_%d", x),
                       (uint8_t*)usedCache[x],sizeof(T));
     }
 
-    int unusedCacheSize = unusedCache.size();
+    CacheType::size_type unusedCacheSize = unusedCache.size();
     SERIALIZE_SCALAR(unusedCacheSize);
-    for(int x = 0; x < unusedCacheSize; x++) {
+    for(CacheType::size_type x = 0; x < unusedCacheSize; x++) {
         arrayParamOut(os, csprintf("unusedCache_%d", x),
                       (uint8_t*)unusedCache[x],sizeof(T));
     }
@@ -1152,19 +1152,19 @@ IGbE::DescCache<T>::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(moreToWb);
     UNSERIALIZE_SCALAR(wbAlignment);
 
-    int usedCacheSize;
+    CacheType::size_type usedCacheSize;
     UNSERIALIZE_SCALAR(usedCacheSize);
     T *temp;
-    for(int x = 0; x < usedCacheSize; x++) {
+    for(CacheType::size_type x = 0; x < usedCacheSize; x++) {
         temp = new T;
         arrayParamIn(cp, section, csprintf("usedCache_%d", x),
                      (uint8_t*)temp,sizeof(T));
         usedCache.push_back(temp);
     }
 
-    int unusedCacheSize;
+    CacheType::size_type unusedCacheSize;
     UNSERIALIZE_SCALAR(unusedCacheSize);
-    for(int x = 0; x < unusedCacheSize; x++) {
+    for(CacheType::size_type x = 0; x < unusedCacheSize; x++) {
         temp = new T;
         arrayParamIn(cp, section, csprintf("unusedCache_%d", x),
                      (uint8_t*)temp,sizeof(T));
@@ -1221,7 +1221,7 @@ IGbE::RxDescCache::writePacket(EthPacketPtr packet, int pkt_offset)
 
     pktPtr = packet;
     pktDone = false;
-    int buf_len, hdr_len;
+    unsigned buf_len, hdr_len;
 
     RxDesc *desc = unusedCache.front();
     switch (igbe->regs.srrctl.desctype()) {
@@ -1648,20 +1648,16 @@ IGbE::TxDescCache::headerComplete()
     igbe->checkDrain();
 }
 
-int
+unsigned
 IGbE::TxDescCache::getPacketSize(EthPacketPtr p)
 {
-    TxDesc *desc;
-
-
     if (!unusedCache.size())
-        return -1;
+        return 0;
  
     DPRINTF(EthernetDesc, "Starting processing of descriptor\n");
 
     assert(!useTso || tsoLoadedHeader);
-    desc = unusedCache.front();
-
+    TxDesc *desc = unusedCache.front();
 
     if (useTso) {
         DPRINTF(EthernetDesc, "getPacket(): TxDescriptor data "
@@ -1680,7 +1676,8 @@ IGbE::TxDescCache::getPacketSize(EthPacketPtr p)
         else
             tsoCopyBytes =  std::min(tsoMss,
                                      TxdOp::getLen(desc) - tsoDescBytesUsed); 
-        Addr pkt_size = tsoCopyBytes + (tsoPktHasHeader ? 0 : tsoHeaderLen); 
+        unsigned pkt_size =
+            tsoCopyBytes + (tsoPktHasHeader ? 0 : tsoHeaderLen); 
         DPRINTF(EthernetDesc, "TSO: Next packet is %d bytes\n", pkt_size);
         return pkt_size;
     }
@@ -2175,8 +2172,7 @@ IGbE::txStateMachine()
             return;
         }
 
-        int size;
-        size = txDescCache.getPacketSize(txPacket);
+        unsigned size = txDescCache.getPacketSize(txPacket);
         if (size > 0 && txFifo.avail() > size) {
             anRq("TXS", "TX FIFO Q");
             anBegin("TXS", "DMA Packet");
@@ -2184,7 +2180,7 @@ IGbE::txStateMachine()
                     "beginning DMA of next packet\n", size);
             txFifo.reserve(size);
             txDescCache.getPacketData(txPacket);
-        } else if (size <= 0) {
+        } else if (size == 0) {
             DPRINTF(EthernetSM, "TXS: getPacketSize returned: %d\n", size);
             DPRINTF(EthernetSM,
                     "TXS: No packets to get, writing back used descriptors\n");
diff --git a/src/dev/i8254xGBe.hh b/src/dev/i8254xGBe.hh
index 5ae90eebc..f7f7d9a2a 100644
--- a/src/dev/i8254xGBe.hh
+++ b/src/dev/i8254xGBe.hh
@@ -86,7 +86,7 @@ class IGbE : public EtherDevice
     bool rxDmaPacket;
 
     // Number of bytes copied from current RX packet
-    int pktOffset;
+    unsigned pktOffset;
 
     // Delays in managaging descriptors
     Tick fetchDelay, wbDelay;
@@ -224,8 +224,9 @@ class IGbE : public EtherDevice
         virtual void actionAfterWb() {}
         virtual void fetchAfterWb() = 0;
 
-        std::deque<T*> usedCache;
-        std::deque<T*> unusedCache;
+        typedef std::deque<T *> CacheType;
+        CacheType usedCache;
+        CacheType unusedCache;
 
         T *fetchBuf;
         T *wbBuf;
@@ -301,9 +302,10 @@ class IGbE : public EtherDevice
         /* Return the number of descriptors left in the ring, so the device has
          * a way to figure out if it needs to interrupt.
          */
-        int descLeft() const
+        unsigned
+        descLeft() const
         {
-            int left = unusedCache.size();
+            unsigned left = unusedCache.size();
             if (cachePnt > descTail())
                 left += (descLen() - cachePnt + descTail());
             else
@@ -314,10 +316,10 @@ class IGbE : public EtherDevice
 
         /* Return the number of descriptors used and not written back.
          */
-        int descUsed() const { return usedCache.size(); }
+        unsigned descUsed() const { return usedCache.size(); }
 
         /* Return the number of cache unused descriptors we have. */
-        int descUnused() const {return unusedCache.size(); }
+        unsigned descUnused() const { return unusedCache.size(); }
 
         /* Get into a state where the descriptor address/head/etc colud be
          * changed */
@@ -354,7 +356,7 @@ class IGbE : public EtherDevice
 
         /** Bytes of packet that have been copied, so we know when to
             set EOP */
-        int bytesCopied;
+        unsigned bytesCopied;
 
       public:
         RxDescCache(IGbE *i, std::string n, int s);
@@ -442,15 +444,19 @@ class IGbE : public EtherDevice
          * return the size the of the packet to reserve space in tx fifo.
          * @return size of the packet
          */
-        int getPacketSize(EthPacketPtr p);
+        unsigned getPacketSize(EthPacketPtr p);
         void getPacketData(EthPacketPtr p);
         void processContextDesc();
 
         /** Return the number of dsecriptors in a cache block for threshold
          * operations.
          */
-        int descInBlock(int num_desc) { return num_desc / 
-                igbe->cacheBlockSize() / sizeof(iGbReg::TxDesc); }
+        unsigned
+        descInBlock(unsigned num_desc)
+        {
+            return num_desc / igbe->cacheBlockSize() / sizeof(iGbReg::TxDesc);
+        }
+
         /** Ask if the packet has been transfered so the state machine can give
          * it to the fifo.
          * @return packet available in descriptor cache
@@ -548,9 +554,4 @@ class IGbEInt : public EtherInt
     virtual void sendDone() { dev->ethTxDone(); }
 };
 
-
-
-
-
 #endif //__DEV_I8254XGBE_HH__
-
diff --git a/src/dev/i8254xGBe_defs.hh b/src/dev/i8254xGBe_defs.hh
index 4634dd9a3..4de347b99 100644
--- a/src/dev/i8254xGBe_defs.hh
+++ b/src/dev/i8254xGBe_defs.hh
@@ -481,7 +481,7 @@ struct Regs {
         ADD_FIELD32(pmcf,23,1);  // pass mac control  frames
         ADD_FIELD32(bsex,25,1);  // buffer size extension
         ADD_FIELD32(secrc,26,1); // strip ethernet crc from incoming packet
-        int descSize()
+        unsigned descSize()
         {
             switch(bsize()) {
                 case 0: return bsex() == 0 ? 2048 : -1;
@@ -559,8 +559,8 @@ struct Regs {
         ADD_FIELD32(hdrlen, 8, 8); // guess based on header, not documented
         ADD_FIELD32(desctype, 25,3); // type of descriptor 000 legacy, 001 adv,
                                      //101 hdr split
-        int bufLen() { return pktlen() << 10; }
-        int hdrLen() { return hdrlen() << 6; }
+        unsigned bufLen() { return pktlen() << 10; }
+        unsigned hdrLen() { return hdrlen() << 6; }
     };
     SRRCTL srrctl;
 
diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh
index 70af6093d..54128e48f 100644
--- a/src/dev/io_device.hh
+++ b/src/dev/io_device.hh
@@ -152,7 +152,7 @@ class DmaPort : public Port
 
     bool dmaPending() { return pendingCount > 0; }
 
-    int cacheBlockSize() { return peerBlockSize(); }
+    unsigned cacheBlockSize() const { return peerBlockSize(); }
     unsigned int drain(Event *de);
 };
 
@@ -284,7 +284,7 @@ class DmaDevice : public PioDevice
 
     virtual unsigned int drain(Event *de);
 
-    int cacheBlockSize() { return dmaPort->cacheBlockSize(); }
+    unsigned cacheBlockSize() const { return dmaPort->cacheBlockSize(); }
 
     virtual Port *getPort(const std::string &if_name, int idx = -1)
     {
diff --git a/src/dev/pktfifo.cc b/src/dev/pktfifo.cc
index 97d6c04af..e5d67d5ec 100644
--- a/src/dev/pktfifo.cc
+++ b/src/dev/pktfifo.cc
@@ -34,7 +34,7 @@
 using namespace std;
 
 bool
-PacketFifo::copyout(void *dest, int offset, int len)
+PacketFifo::copyout(void *dest, unsigned offset, unsigned len)
 {
     char *data = (char *)dest;
     if (offset + len >= size())
@@ -52,7 +52,7 @@ PacketFifo::copyout(void *dest, int offset, int len)
         if (i == end)
             panic("invalid fifo");
 
-        int size = min(pkt->length - offset, len);
+        unsigned size = min(pkt->length - offset, len);
         memcpy(data, pkt->data, size);
         offset = 0;
         len -= size;
diff --git a/src/dev/pktfifo.hh b/src/dev/pktfifo.hh
index 6ded248be..b548627e0 100644
--- a/src/dev/pktfifo.hh
+++ b/src/dev/pktfifo.hh
@@ -44,7 +44,7 @@ struct PacketFifoEntry
 {
     EthPacketPtr packet;
     uint64_t number;
-    int slack;
+    unsigned slack;
     int priv;
 
     PacketFifoEntry()
@@ -85,24 +85,25 @@ class PacketFifo
   protected:
     std::list<PacketFifoEntry> fifo;
     uint64_t _counter;
-    int _maxsize;
-    int _size;
-    int _reserved;
+    unsigned _maxsize;
+    unsigned _size;
+    unsigned _reserved;
 
   public:
     explicit PacketFifo(int max)
         : _counter(0), _maxsize(max), _size(0), _reserved(0) {}
     virtual ~PacketFifo() {}
 
-    int packets() const { return fifo.size(); }
-    int maxsize() const { return _maxsize; }
-    int size() const { return _size; }
-    int reserved() const { return _reserved; }
-    int avail() const { return _maxsize - _size - _reserved; }
+    unsigned packets() const { return fifo.size(); }
+    unsigned maxsize() const { return _maxsize; }
+    unsigned size() const { return _size; }
+    unsigned reserved() const { return _reserved; }
+    unsigned avail() const { return _maxsize - _size - _reserved; }
     bool empty() const { return size() <= 0; }
     bool full() const { return avail() <= 0; }
 
-    int reserve(int len = 0)
+    unsigned
+    reserve(unsigned len = 0)
     {
         _reserved += len;
         assert(avail() >= 0);
@@ -169,7 +170,7 @@ class PacketFifo
         fifo.erase(i);
     }
 
-    bool copyout(void *dest, int offset, int len);
+    bool copyout(void *dest, unsigned offset, unsigned len);
 
     int countPacketsBefore(iterator i)
     {
@@ -188,7 +189,7 @@ class PacketFifo
 
     void check()
     {
-        int total = 0;
+        unsigned total = 0;
         for (iterator i = begin(); i != end(); ++i)
             total += i->packet->length + i->slack;
 
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index ae01e2930..133f70b0b 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -1032,8 +1032,8 @@ Device::rxKick()
 
         rxDmaAddr = params()->platform->pciToDma(
                 Regs::get_RxData_Addr(vnic->RxData));
-        rxDmaLen = min<int>(Regs::get_RxData_Len(vnic->RxData),
-                            vnic->rxPacketBytes);
+        rxDmaLen = min<unsigned>(Regs::get_RxData_Len(vnic->RxData),
+                                 vnic->rxPacketBytes);
 
         /*
          * if we're doing zero/delay copy and we're below the fifo
diff --git a/src/dev/sinic.hh b/src/dev/sinic.hh
index cd8412ef4..d2124d8ce 100644
--- a/src/dev/sinic.hh
+++ b/src/dev/sinic.hh
@@ -142,8 +142,8 @@ class Device : public Base
         uint64_t TxDone;
 
         PacketFifo::iterator rxIndex;
-        int rxPacketOffset;
-        int rxPacketBytes;
+        unsigned rxPacketOffset;
+        unsigned rxPacketBytes;
         uint64_t rxDoneData;
 
         Counter rxUnique;
@@ -155,7 +155,7 @@ class Device : public Base
         { }
     };
     typedef std::vector<VirtualReg> VirtualRegs;
-    typedef std::list<int> VirtualList;
+    typedef std::list<unsigned> VirtualList;
     Counter rxUnique;
     Counter txUnique;
     VirtualRegs virtualRegs;
@@ -180,7 +180,7 @@ class Device : public Base
     bool rxLow;
     Addr rxDmaAddr;
     uint8_t *rxDmaData;
-    int rxDmaLen;
+    unsigned rxDmaLen;
 
     TxState txState;
     PacketFifo txFifo;
diff --git a/src/kern/linux/linux.cc b/src/kern/linux/linux.cc
index b14e3c709..abe7c0b75 100644
--- a/src/kern/linux/linux.cc
+++ b/src/kern/linux/linux.cc
@@ -43,7 +43,7 @@ Linux::openSpecialFile(std::string path, LiveProcess *process, ThreadContext *tc
         std::string data = Linux::procMeminfo(process, tc);
         FILE *f = tmpfile();
         int fd = fileno(f);
-        int ret M5_VAR_USED = fwrite(data.c_str(), 1, data.size(), f);
+        size_t ret M5_VAR_USED = fwrite(data.c_str(), 1, data.size(), f);
         assert(ret == data.size());
         rewind(f);
         return fd;
diff --git a/src/mem/bus.cc b/src/mem/bus.cc
index b9cdff242..001c37a24 100644
--- a/src/mem/bus.cc
+++ b/src/mem/bus.cc
@@ -593,27 +593,27 @@ Bus::addressRanges(AddrRangeList &resp, bool &snoop, int id)
     }
 }
 
-int
+unsigned
 Bus::findBlockSize(int id)
 {
     if (cachedBlockSizeValid)
         return cachedBlockSize;
 
-    int max_bs = -1;
+    unsigned max_bs = 0;
 
     PortIter p_end = portMap.end();
     for (PortIter p_iter = portMap.begin(); p_iter != p_end; p_iter++) {
-        int tmp_bs = interfaces[p_iter->second]->peerBlockSize();
+        unsigned tmp_bs = interfaces[p_iter->second]->peerBlockSize();
         if (tmp_bs > max_bs)
             max_bs = tmp_bs;
     }
     SnoopIter s_end = snoopPorts.end();
     for (SnoopIter s_iter = snoopPorts.begin(); s_iter != s_end; s_iter++) {
-        int tmp_bs = (*s_iter)->peerBlockSize();
+        unsigned tmp_bs = (*s_iter)->peerBlockSize();
         if (tmp_bs > max_bs)
             max_bs = tmp_bs;
     }
-    if (max_bs <= 0)
+    if (max_bs == 0)
         max_bs = defaultBlockSize;
 
     if (max_bs != 64)
diff --git a/src/mem/bus.hh b/src/mem/bus.hh
index 4de42b538..97a65c8a9 100644
--- a/src/mem/bus.hh
+++ b/src/mem/bus.hh
@@ -119,7 +119,7 @@ class Bus : public MemObject
         // Ask the bus to ask everyone on the bus what their block size is and
         // take the max of it. This might need to be changed a bit if we ever
         // support multiple block sizes.
-        virtual int deviceBlockSize()
+        virtual unsigned deviceBlockSize() const
         { return bus->findBlockSize(id); }
 
     };
@@ -259,7 +259,7 @@ class Bus : public MemObject
      * @param id id of the busport that made the request
      * @return the max of all the sizes
      */
-    int findBlockSize(int id);
+    unsigned findBlockSize(int id);
 
     BusFreeEvent busIdle;
 
@@ -308,8 +308,8 @@ class Bus : public MemObject
     /** Has the user specified their own default responder? */
     bool responderSet;
 
-    int defaultBlockSize;
-    int cachedBlockSize;
+    unsigned defaultBlockSize;
+    unsigned cachedBlockSize;
     bool cachedBlockSizeValid;
 
    // Cache for the peer port interfaces
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 29fa97544..fe1f580bd 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -85,8 +85,8 @@ BaseCache::CachePort::checkFunctional(PacketPtr pkt)
 }
 
 
-int
-BaseCache::CachePort::deviceBlockSize()
+unsigned
+BaseCache::CachePort::deviceBlockSize() const
 {
     return cache->getBlockSize();
 }
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index b77427c90..24f993383 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -104,7 +104,7 @@ class BaseCache : public MemObject
 
         virtual void recvStatusChange(Status status);
 
-        virtual int deviceBlockSize();
+        virtual unsigned deviceBlockSize() const;
 
         bool recvRetryCommon();
 
@@ -180,7 +180,7 @@ class BaseCache : public MemObject
     }
 
     /** Block size of this cache */
-    const int blkSize;
+    const unsigned blkSize;
 
     /**
      * The latency of a hit in this device.
@@ -372,7 +372,8 @@ class BaseCache : public MemObject
      * Query block size of a cache.
      * @return  The block size
      */
-    int getBlockSize() const
+    unsigned
+    getBlockSize() const
     {
         return blkSize;
     }
diff --git a/src/mem/cache/blk.hh b/src/mem/cache/blk.hh
index ab15355bd..369de6d11 100644
--- a/src/mem/cache/blk.hh
+++ b/src/mem/cache/blk.hh
@@ -157,7 +157,7 @@ class CacheBlk
      */
     bool isWritable() const
     {
-        const int needed_bits = BlkWritable | BlkValid;
+        const State needed_bits = BlkWritable | BlkValid;
         return (status & needed_bits) == needed_bits;
     }
 
@@ -169,7 +169,7 @@ class CacheBlk
      */
     bool isReadable() const
     {
-        const int needed_bits = BlkReadable | BlkValid;
+        const State needed_bits = BlkReadable | BlkValid;
         return (status & needed_bits) == needed_bits;
     }
 
diff --git a/src/mem/cache/mshr.hh b/src/mem/cache/mshr.hh
index 13395d314..26eef2cac 100644
--- a/src/mem/cache/mshr.hh
+++ b/src/mem/cache/mshr.hh
@@ -140,7 +140,7 @@ class MSHR : public Packet::SenderState, public Printable
     /** Thread number of the miss. */
     ThreadID threadNum;
     /** The number of currently allocated targets. */
-    short ntargets;
+    unsigned short ntargets;
 
 
     /** Data buffer (if needed).  Currently used only for pending
diff --git a/src/mem/cache/prefetch/base.hh b/src/mem/cache/prefetch/base.hh
index fc027cb3b..b5f33a455 100644
--- a/src/mem/cache/prefetch/base.hh
+++ b/src/mem/cache/prefetch/base.hh
@@ -54,7 +54,7 @@ class BasePrefetcher
     // PARAMETERS
 
     /** The number of MSHRs in the Prefetch Queue. */
-    const int size;
+    const unsigned size;
 
     /** Pointr to the parent cache. */
     BaseCache* cache;
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 0e0121f67..122e6e14b 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -42,7 +42,7 @@
 
 using namespace std;
 
-FALRU::FALRU(int _blkSize, int _size, int hit_latency)
+FALRU::FALRU(unsigned _blkSize, unsigned _size, unsigned hit_latency)
     : blkSize(_blkSize), size(_size),
       numBlks(size/blkSize), hitLatency(hit_latency)
 {
@@ -78,10 +78,10 @@ FALRU::FALRU(int _blkSize, int _size, int hit_latency)
     tail->next = NULL;
     tail->inCache = 0;
 
-    int index = (1 << 17) / blkSize;
-    int j = 0;
+    unsigned index = (1 << 17) / blkSize;
+    unsigned j = 0;
     int flags = cacheMask;
-    for (int i = 1; i < numBlks-1; i++) {
+    for (unsigned i = 1; i < numBlks - 1; i++) {
         blks[i].inCache = flags;
         if (i == index - 1){
             cacheBoundaries[j] = &(blks[i]);
@@ -118,7 +118,7 @@ FALRU::regStats(const string &name)
         .desc("The number of accesses to the FA LRU cache.")
         ;
 
-    for (int i = 0; i < numCaches+1; ++i) {
+    for (unsigned i = 0; i <= numCaches; ++i) {
         stringstream size_str;
         if (i < 3){
             size_str << (1<<(i+7)) <<"K";
@@ -164,7 +164,7 @@ FALRU::accessBlock(Addr addr, int &lat, int *inCache)
     if (blk && blk->isValid()) {
         assert(blk->tag == blkAddr);
         tmp_in_cache = blk->inCache;
-        for (int i = 0; i < numCaches; i++) {
+        for (unsigned i = 0; i < numCaches; i++) {
             if (1<<i & blk->inCache) {
                 hits[i]++;
             } else {
@@ -177,7 +177,7 @@ FALRU::accessBlock(Addr addr, int &lat, int *inCache)
         }
     } else {
         blk = NULL;
-        for (int i = 0; i < numCaches+1; ++i) {
+        for (unsigned i = 0; i <= numCaches; ++i) {
             misses[i]++;
         }
     }
@@ -236,7 +236,7 @@ void
 FALRU::moveToHead(FALRUBlk *blk)
 {
     int updateMask = blk->inCache ^ cacheMask;
-    for (int i = 0; i < numCaches; i++){
+    for (unsigned i = 0; i < numCaches; i++){
         if ((1<<i) & updateMask) {
             cacheBoundaries[i]->inCache &= ~(1<<i);
             cacheBoundaries[i] = cacheBoundaries[i]->prev;
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index 23d09d709..4e6bccc1d 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -78,22 +78,23 @@ class FALRU : public BaseTags
     typedef FALRUBlk BlkType;
     /** Typedef a list of pointers to the local block type. */
     typedef std::list<FALRUBlk*> BlkList;
+
   protected:
     /** The block size of the cache. */
-    const int blkSize;
+    const unsigned blkSize;
     /** The size of the cache. */
-    const int size;
+    const unsigned size;
     /** The number of blocks in the cache. */
-    const int numBlks; // calculated internally
+    const unsigned numBlks; // calculated internally
     /** The hit latency of the cache. */
-    const int hitLatency;
+    const unsigned hitLatency;
 
     /** Array of pointers to blocks at the cache size  boundaries. */
     FALRUBlk **cacheBoundaries;
     /** A mask for the FALRUBlk::inCache bits. */
     int cacheMask;
     /** The number of different size caches being tracked. */
-    int numCaches;
+    unsigned numCaches;
 
     /** The cache blocks. */
     FALRUBlk *blks;
@@ -156,7 +157,7 @@ public:
      * @param size The size of the cache.
      * @param hit_latency The hit latency of the cache.
      */
-    FALRU(int blkSize, int size, int hit_latency);
+    FALRU(unsigned blkSize, unsigned size, unsigned hit_latency);
 
     /**
      * Register the stats for this object.
@@ -214,7 +215,8 @@ public:
      * Return the block size of this cache.
      * @return The block size.
      */
-    int getBlockSize()
+    unsigned
+    getBlockSize() const
     {
         return blkSize;
     }
@@ -223,7 +225,8 @@ public:
      * Return the subblock size of this cache, always the block size.
      * @return The block size.
      */
-    int getSubBlockSize()
+    unsigned
+    getSubBlockSize() const
     {
         return blkSize;
     }
diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc
index 7bc2543c5..b9ba5256b 100644
--- a/src/mem/cache/tags/iic.cc
+++ b/src/mem/cache/tags/iic.cc
@@ -66,8 +66,6 @@ IIC::IIC(IIC::Params &params) :
     tagNull(numTags),
     primaryBound(hashSets * assoc)
 {
-    int i;
-
     // Check parameters
     if (blkSize < 4 || !isPowerOf2(blkSize)) {
         fatal("Block size must be at least 4 and a power of 2");
@@ -104,10 +102,10 @@ IIC::IIC(IIC::Params &params) :
     // Allocate storage for both internal data and block fast access data.
     // We allocate it as one large chunk to reduce overhead and to make
     // deletion easier.
-    int data_index = 0;
+    unsigned data_index = 0;
     dataStore = new uint8_t[(numBlocks + numTags) * blkSize];
     dataBlks = new uint8_t*[numBlocks];
-    for (i = 0; i < numBlocks; ++i) {
+    for (unsigned i = 0; i < numBlocks; ++i) {
         dataBlks[i] = &dataStore[data_index];
         freeDataBlock(i);
         data_index += subSize;
@@ -118,15 +116,15 @@ IIC::IIC(IIC::Params &params) :
     // allocate and init tag store
     tagStore = new IICTag[numTags];
 
-    int blkIndex = 0;
+    unsigned blkIndex = 0;
     // allocate and init sets
     sets = new IICSet[hashSets];
-    for (i = 0; i < hashSets; ++i) {
+    for (unsigned i = 0; i < hashSets; ++i) {
         sets[i].assoc = assoc;
         sets[i].tags = new IICTag*[assoc];
         sets[i].chain_ptr = tagNull;
 
-        for (int j = 0; j < assoc; ++j) {
+        for (unsigned j = 0; j < assoc; ++j) {
             IICTag *tag = &tagStore[blkIndex++];
             tag->chain_ptr = tagNull;
             tag->data_ptr.resize(numSub);
@@ -142,7 +140,7 @@ IIC::IIC(IIC::Params &params) :
 
     assert(blkIndex == primaryBound);
 
-    for (i = primaryBound; i < tagNull; i++) {
+    for (unsigned i = primaryBound; i < tagNull; i++) {
         tagStore[i].chain_ptr = i+1;
         //setup data ptrs to subblocks
         tagStore[i].data_ptr.resize(numSub);
@@ -305,7 +303,7 @@ IIC::findVictim(Addr addr, PacketList &writebacks)
     unsigned long *tmp_data = new unsigned long[numSub];
 
     // Get a enough subblocks for a full cache line
-    for (int i = 0; i < numSub; ++i){
+    for (unsigned i = 0; i < numSub; ++i){
         tmp_data[i] = getFreeDataBlock(writebacks);
         assert(dataReferenceCount[tmp_data[i]]==0);
     }
@@ -313,7 +311,7 @@ IIC::findVictim(Addr addr, PacketList &writebacks)
     tag_ptr = getFreeTag(set, writebacks);
 
     tag_ptr->set = set;
-    for (int i=0; i< numSub; ++i) {
+    for (unsigned i = 0; i < numSub; ++i) {
         tag_ptr->data_ptr[i] = tmp_data[i];
         dataReferenceCount[tag_ptr->data_ptr[i]]++;
     }
@@ -636,7 +634,7 @@ IIC::invalidateBlk(IIC::BlkType *tag_ptr)
 void
 IIC::cleanupRefs()
 {
-    for (int i = 0; i < numTags; ++i) {
+    for (unsigned i = 0; i < numTags; ++i) {
         if (tagStore[i].isValid()) {
             totalRefs += tagStore[i].refCount;
             ++sampledRefs;
diff --git a/src/mem/cache/tags/iic.hh b/src/mem/cache/tags/iic.hh
index 45c8ee801..994f7b8f7 100644
--- a/src/mem/cache/tags/iic.hh
+++ b/src/mem/cache/tags/iic.hh
@@ -167,46 +167,47 @@ class IIC : public BaseTags
     typedef IICTag BlkType;
     /** Typedef for list of pointers to the local block type. */
     typedef std::list<IICTag*> BlkList;
+
   protected:
     /** The number of set in the primary table. */
-    const int hashSets;
+    const unsigned hashSets;
     /** The block size in bytes. */
-    const int blkSize;
+    const unsigned blkSize;
     /** The associativity of the primary table. */
-    const int assoc;
+    const unsigned assoc;
     /** The base hit latency. */
-    const int hitLatency;
+    const unsigned hitLatency;
     /** The subblock size, used for compression. */
-    const int subSize;
+    const unsigned subSize;
 
     /** The number of subblocks */
-    const int numSub;
+    const unsigned numSub;
     /** The number of bytes used by data pointers */
-    const int trivialSize;
+    const unsigned trivialSize;
 
     /** The amount to shift address to get the tag. */
-    const int tagShift;
+    const unsigned tagShift;
     /** The mask to get block offset bits. */
     const unsigned blkMask;
 
     /** The amount to shift to get the subblock number. */
-    const int subShift;
+    const unsigned subShift;
     /** The mask to get the correct subblock number. */
     const unsigned subMask;
 
     /** The latency of a hash lookup. */
-    const int hashDelay;
+    const unsigned hashDelay;
     /** The number of data blocks. */
-    const int numBlocks;
+    const unsigned numBlocks;
     /** The total number of tags in primary and secondary. */
-    const int numTags;
+    const unsigned numTags;
     /** The number of tags in the secondary tag store. */
-    const int numSecondary;
+    const unsigned numSecondary;
 
     /** The Null tag pointer. */
-    const int tagNull;
+    const unsigned tagNull;
     /** The last tag in the primary table. */
-    const int primaryBound;
+    const unsigned primaryBound;
 
     /** All of the tags */
     IICTag *tagStore;
@@ -271,21 +272,21 @@ class IIC : public BaseTags
     class Params {
       public:
         /** The size in bytes of the cache. */
-        int size;
+        unsigned size;
         /** The number of sets in the primary table. */
-        int numSets;
+        unsigned numSets;
         /** The block size in bytes. */
-        int blkSize;
+        unsigned blkSize;
         /** The associativity of the primary table. */
-        int assoc;
+        unsigned assoc;
         /** The number of cycles for each hash lookup. */
-        int hashDelay;
+        unsigned hashDelay;
         /** The number of cycles to read the data. */
-        int hitLatency;
+        unsigned hitLatency;
         /** The replacement policy. */
         Repl *rp;
         /** The subblock size in bytes. */
-        int subblockSize;
+        unsigned subblockSize;
     };
 
     /**
@@ -322,7 +323,8 @@ class IIC : public BaseTags
      * Return the block size.
      * @return The block size.
      */
-    int getBlockSize()
+    unsigned
+    getBlockSize() const
     {
         return blkSize;
     }
@@ -331,7 +333,8 @@ class IIC : public BaseTags
      * Return the subblock size.
      * @return The subblock size.
      */
-    int getSubBlockSize()
+    unsigned
+    getSubBlockSize() const
     {
         return subSize;
     }
diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc
index ff353ff6a..9371f193a 100644
--- a/src/mem/cache/tags/lru.cc
+++ b/src/mem/cache/tags/lru.cc
@@ -80,8 +80,10 @@ CacheSet::moveToHead(LRUBlk *blk)
 
 
 // create and initialize a LRU/MRU cache structure
-LRU::LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency) :
-    numSets(_numSets), blkSize(_blkSize), assoc(_assoc), hitLatency(_hit_latency)
+LRU::LRU(unsigned _numSets, unsigned _blkSize, unsigned _assoc,
+         unsigned _hit_latency)
+    : numSets(_numSets), blkSize(_blkSize), assoc(_assoc),
+      hitLatency(_hit_latency)
 {
     // Check parameters
     if (blkSize < 4 || !isPowerOf2(blkSize)) {
@@ -97,9 +99,6 @@ LRU::LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency) :
         fatal("access latency must be greater than zero");
     }
 
-    LRUBlk  *blk;
-    int i, j, blkIndex;
-
     blkMask = blkSize - 1;
     setShift = floorLog2(blkSize);
     setMask = numSets - 1;
@@ -113,16 +112,16 @@ LRU::LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency) :
     // allocate data storage in one big chunk
     dataBlks = new uint8_t[numSets*assoc*blkSize];
 
-    blkIndex = 0;       // index into blks array
-    for (i = 0; i < numSets; ++i) {
+    unsigned blkIndex = 0;       // index into blks array
+    for (unsigned i = 0; i < numSets; ++i) {
         sets[i].assoc = assoc;
 
         sets[i].blks = new LRUBlk*[assoc];
 
         // link in the data blocks
-        for (j = 0; j < assoc; ++j) {
+        for (unsigned j = 0; j < assoc; ++j) {
             // locate next cache block
-            blk = &blks[blkIndex];
+            LRUBlk *blk = &blks[blkIndex];
             blk->data = &dataBlks[blkSize*blkIndex];
             ++blkIndex;
 
@@ -233,7 +232,7 @@ LRU::invalidateBlk(LRU::BlkType *blk)
 void
 LRU::cleanupRefs()
 {
-    for (int i = 0; i < numSets*assoc; ++i) {
+    for (unsigned i = 0; i < numSets*assoc; ++i) {
         if (blks[i].isValid()) {
             totalRefs += blks[i].refCount;
             ++sampledRefs;
diff --git a/src/mem/cache/tags/lru.hh b/src/mem/cache/tags/lru.hh
index 466095ec9..2874d8f1f 100644
--- a/src/mem/cache/tags/lru.hh
+++ b/src/mem/cache/tags/lru.hh
@@ -92,15 +92,16 @@ class LRU : public BaseTags
     typedef LRUBlk BlkType;
     /** Typedef for a list of pointers to the local block class. */
     typedef std::list<LRUBlk*> BlkList;
+
   protected:
     /** The number of sets in the cache. */
-    const int numSets;
+    const unsigned numSets;
     /** The number of bytes in a block. */
-    const int blkSize;
+    const unsigned blkSize;
     /** The associativity of the cache. */
-    const int assoc;
+    const unsigned assoc;
     /** The hit latency. */
-    const int hitLatency;
+    const unsigned hitLatency;
 
     /** The cache sets. */
     CacheSet *sets;
@@ -127,7 +128,8 @@ public:
      * @param _assoc The associativity of the cache.
      * @param _hit_latency The latency in cycles for a hit.
      */
-    LRU(int _numSets, int _blkSize,     int _assoc, int _hit_latency);
+    LRU(unsigned _numSets, unsigned _blkSize, unsigned _assoc,
+        unsigned _hit_latency);
 
     /**
      * Destructor
@@ -138,7 +140,8 @@ public:
      * Return the block size.
      * @return the block size.
      */
-    int getBlockSize()
+    unsigned
+    getBlockSize() const
     {
         return blkSize;
     }
@@ -148,7 +151,8 @@ public:
      * size.
      * @return The block size.
      */
-    int getSubBlockSize()
+    unsigned
+    getSubBlockSize() const
     {
         return blkSize;
     }
diff --git a/src/mem/gems_common/ioutil/confio.cc b/src/mem/gems_common/ioutil/confio.cc
index db2bf0a35..a701473a7 100644
--- a/src/mem/gems_common/ioutil/confio.cc
+++ b/src/mem/gems_common/ioutil/confio.cc
@@ -156,7 +156,7 @@ void fprintAttr( FILE *fp, attr_value_t attr )
 
   case Sim_Val_List:
     fprintf(fp, "(");
-    for (uint32 i = 0; i < attr.u.list.size; i++) {
+    for (int i = 0; i < attr.u.list.size; i++) {
       fprintAttr(fp, attr.u.list.vector[i]);
       if (i != attr.u.list.size -1) {
         fprintf(fp, ", ");
@@ -188,7 +188,7 @@ void freeAttribute( attr_value_t *attr )
     break;
 
   case Sim_Val_List:
-    for (uint32 i = 0; i < attr->u.list.size; i++) {
+    for (int i = 0; i < attr->u.list.size; i++) {
       freeAttribute( &(attr->u.list.vector[i]) );
     }
     free( attr->u.list.vector );
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 672b00e3c..07c086cd5 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -257,7 +257,7 @@ class Packet : public FastAlloc, public Printable
     Addr addr;
 
     /// The size of the request or transfer.
-    int size;
+    unsigned size;
 
     /**
      * Device address (e.g., bus ID) of the source of the
@@ -450,7 +450,7 @@ class Packet : public FastAlloc, public Printable
     void setDest(NodeID _dest) { dest = _dest; flags.set(VALID_DST); }
 
     Addr getAddr() const { assert(flags.isSet(VALID_ADDR)); return addr; }
-    int getSize() const  { assert(flags.isSet(VALID_SIZE)); return size; }
+    unsigned getSize() const  { assert(flags.isSet(VALID_SIZE)); return size; }
     Addr getOffset(int blkSize) const { return getAddr() & (Addr)(blkSize - 1); }
 
     /**
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index bdcbbfec3..bf35932a6 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -189,7 +189,7 @@ PageTable::serialize(std::ostream &os)
 {
     paramOut(os, "ptable.size", pTable.size());
 
-    int count = 0;
+    PTable::size_type count = 0;
 
     PTableItr iter = pTable.begin();
     PTableItr end = pTable.end();
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index a49c12a5c..e6150c548 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -106,8 +106,8 @@ PhysicalMemory::new_page()
     return return_addr;
 }
 
-int
-PhysicalMemory::deviceBlockSize()
+unsigned
+PhysicalMemory::deviceBlockSize() const
 {
     //Can accept anysize request
     return 0;
@@ -360,8 +360,8 @@ PhysicalMemory::getPort(const std::string &if_name, int idx)
         panic("PhysicalMemory::getPort: unknown port %s requested", if_name);
     }
 
-    if (idx >= ports.size()) {
-        ports.resize(idx+1);
+    if (idx >= (int)ports.size()) {
+        ports.resize(idx + 1);
     }
 
     if (ports[idx] != NULL) {
@@ -407,8 +407,8 @@ PhysicalMemory::getAddressRanges(AddrRangeList &resp, bool &snoop)
     resp.push_back(RangeSize(start(), params()->range.size()));
 }
 
-int
-PhysicalMemory::MemoryPort::deviceBlockSize()
+unsigned
+PhysicalMemory::MemoryPort::deviceBlockSize() const
 {
     return memory->deviceBlockSize();
 }
@@ -474,7 +474,7 @@ PhysicalMemory::serialize(ostream &os)
                 filename);
 
     if (gzwrite(compressedMem, pmemAddr, params()->range.size()) !=
-        params()->range.size()) {
+        (int)params()->range.size()) {
         fatal("Write failed on physical memory checkpoint file '%s'\n",
               filename);
     }
@@ -495,7 +495,7 @@ PhysicalMemory::unserialize(Checkpoint *cp, const string &section)
     long *pmem_current;
     uint64_t curSize;
     uint32_t bytesRead;
-    const int chunkSize = 16384;
+    const uint32_t chunkSize = 16384;
 
     string filename;
 
@@ -545,7 +545,7 @@ PhysicalMemory::unserialize(Checkpoint *cp, const string &section)
 
         assert(bytesRead % sizeof(long) == 0);
 
-        for (int x = 0; x < bytesRead/sizeof(long); x++)
+        for (uint32_t x = 0; x < bytesRead / sizeof(long); x++)
         {
              if (*(tempPage+x) != 0) {
                  pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
diff --git a/src/mem/physical.hh b/src/mem/physical.hh
index f027168a4..dae6b42af 100644
--- a/src/mem/physical.hh
+++ b/src/mem/physical.hh
@@ -70,7 +70,7 @@ class PhysicalMemory : public MemObject
         virtual void getDeviceAddressRanges(AddrRangeList &resp,
                                             bool &snoop);
 
-        virtual int deviceBlockSize();
+        virtual unsigned deviceBlockSize() const;
     };
 
     int numPorts;
@@ -168,7 +168,7 @@ class PhysicalMemory : public MemObject
     }
 
   public:
-    int deviceBlockSize();
+    unsigned deviceBlockSize() const;
     void getAddressRanges(AddrRangeList &resp, bool &snoop);
     virtual Port *getPort(const std::string &if_name, int idx = -1);
     void virtual init();
diff --git a/src/mem/port.cc b/src/mem/port.cc
index a666c968b..4d44d486d 100644
--- a/src/mem/port.cc
+++ b/src/mem/port.cc
@@ -42,7 +42,7 @@
 class DefaultPeerPort : public Port
 {
   protected:
-    void blowUp()
+    void blowUp() const
     {
         fatal("%s: Unconnected port!", peer->name());
     }
@@ -74,7 +74,8 @@ class DefaultPeerPort : public Port
         blowUp();
     }
 
-    int deviceBlockSize()
+    unsigned
+    deviceBlockSize() const
     {
         blowUp();
         return 0;
diff --git a/src/mem/port.hh b/src/mem/port.hh
index e738cfc63..bb74bf497 100644
--- a/src/mem/port.hh
+++ b/src/mem/port.hh
@@ -161,7 +161,7 @@ class Port : public EventManager
         this function to be called, so it just returns 0. Anytthing that is
         concerned with the size should just ignore that.
     */
-    virtual int deviceBlockSize() { return 0; }
+    virtual unsigned deviceBlockSize() const { return 0; }
 
     /** The peer port is requesting us to reply with a list of the ranges we
         are responsible for.
@@ -214,7 +214,7 @@ class Port : public EventManager
     /** Called by the associated device if it wishes to find out the blocksize
         of the device on attached to the peer port.
     */
-    int peerBlockSize() { return peer->deviceBlockSize(); }
+    unsigned peerBlockSize() const { return peer->deviceBlockSize(); }
 
     /** Called by the associated device if it wishes to find out the address
         ranges connected to the peer ports devices.
diff --git a/src/mem/rubymem.cc b/src/mem/rubymem.cc
index 3f121f7af..83bac2fd5 100644
--- a/src/mem/rubymem.cc
+++ b/src/mem/rubymem.cc
@@ -153,7 +153,7 @@ RubyMemory::getPort(const std::string &if_name, int idx)
         panic("RubyMemory::getPort: unknown port %s requested", if_name);
     }
 
-    if (idx >= ports.size()) {
+    if (idx >= (int)ports.size()) {
         ports.resize(idx+1);
     }
 
diff --git a/src/sim/init.cc b/src/sim/init.cc
index 1e90f1568..8057c9369 100644
--- a/src/sim/init.cc
+++ b/src/sim/init.cc
@@ -118,7 +118,7 @@ getCode(const EmbeddedPyModule *pymod)
         pymod->zlen);
     if (ret != Z_OK)
         panic("Could not uncompress code: %s\n", zError(ret));
-    assert(unzlen == pymod->mlen);
+    assert(unzlen == (uLongf)pymod->mlen);
 
     return PyMarshal_ReadObjectFromString((char *)marshalled, pymod->mlen);
 }
diff --git a/src/sim/process.cc b/src/sim/process.cc
index c45844a51..c12101069 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -575,11 +575,11 @@ LiveProcess::argsInit(int intSize, int pageSize)
     int argv_array_size = intSize * (argv.size() + 1);
     int envp_array_size = intSize * (envp.size() + 1);
     int arg_data_size = 0;
-    for (int i = 0; i < argv.size(); ++i) {
+    for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
         arg_data_size += argv[i].size() + 1;
     }
     int env_data_size = 0;
-    for (int i = 0; i < envp.size(); ++i) {
+    for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
         env_data_size += envp[i].size() + 1;
     }
 
diff --git a/src/sim/process_impl.hh b/src/sim/process_impl.hh
index a3519fe39..9d12113d0 100644
--- a/src/sim/process_impl.hh
+++ b/src/sim/process_impl.hh
@@ -55,7 +55,7 @@ copyStringArray(std::vector<std::string> &strings,
         TranslatingPort* memPort)
 {
     AddrType data_ptr_swap;
-    for (int i = 0; i < strings.size(); ++i) {
+    for (std::vector<std::string>::size_type i = 0; i < strings.size(); ++i) {
         data_ptr_swap = htog(data_ptr);
         memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap,
                 sizeof(AddrType));
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index b5582578a..6182150d4 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -178,7 +178,7 @@ loadsymbol(ThreadContext *tc)
         if (buffer.empty())
             continue;
 
-        int idx = buffer.find(' ');
+        string::size_type idx = buffer.find(' ');
         if (idx == string::npos)
             continue;
 
diff --git a/src/sim/serialize.cc b/src/sim/serialize.cc
index f73fc93a3..5ae9128e5 100644
--- a/src/sim/serialize.cc
+++ b/src/sim/serialize.cc
@@ -182,11 +182,11 @@ template <class T>
 void
 arrayParamOut(ostream &os, const string &name, const vector<T> &param)
 {
-    int size = param.size();
+    typename vector<T>::size_type size = param.size();
     os << name << "=";
     if (size > 0)
         showParam(os, param[0]);
-    for (int i = 1; i < size; ++i) {
+    for (typename vector<T>::size_type i = 1; i < size; ++i) {
         os << " ";
         showParam(os, param[i]);
     }
@@ -207,12 +207,12 @@ paramIn(Checkpoint *cp, const string &section, const string &name, T &param)
 
 template <class T>
 void
-arrayParamOut(ostream &os, const string &name, const T *param, int size)
+arrayParamOut(ostream &os, const string &name, const T *param, unsigned size)
 {
     os << name << "=";
     if (size > 0)
         showParam(os, param[0]);
-    for (int i = 1; i < size; ++i) {
+    for (unsigned i = 1; i < size; ++i) {
         os << " ";
         showParam(os, param[i]);
     }
@@ -223,7 +223,7 @@ arrayParamOut(ostream &os, const string &name, const T *param, int size)
 template <class T>
 void
 arrayParamIn(Checkpoint *cp, const string &section, const string &name,
-             T *param, int size)
+             T *param, unsigned size)
 {
     string str;
     if (!cp->find(section, name, str)) {
@@ -244,7 +244,7 @@ arrayParamIn(Checkpoint *cp, const string &section, const string &name,
         fatal("Array size mismatch on %s:%s'\n", section, name);
     }
 
-    for (int i = 0; i < tokens.size(); i++) {
+    for (vector<string>::size_type i = 0; i < tokens.size(); i++) {
         // need to parse into local variable to handle vector<bool>,
         // for which operator[] returns a special reference class
         // that's not the same as 'bool&', (since it's a packed
@@ -286,7 +286,7 @@ arrayParamIn(Checkpoint *cp, const string &section,
 
     param.resize(tokens.size());
 
-    for (int i = 0; i < tokens.size(); i++) {
+    for (vector<string>::size_type i = 0; i < tokens.size(); i++) {
         // need to parse into local variable to handle vector<bool>,
         // for which operator[] returns a special reference class
         // that's not the same as 'bool&', (since it's a packed
@@ -306,8 +306,6 @@ arrayParamIn(Checkpoint *cp, const string &section,
     }
 }
 
-
-
 void
 objParamIn(Checkpoint *cp, const string &section,
            const string &name, SimObject * &param)
@@ -326,10 +324,10 @@ paramIn(Checkpoint *cp, const string &section,                          \
         const string &name, type & param);                              \
 template void                                                           \
 arrayParamOut(ostream &os, const string &name,                          \
-              type const *param, int size);                             \
+              type const *param, unsigned size);                        \
 template void                                                           \
 arrayParamIn(Checkpoint *cp, const string &section,                     \
-             const string &name, type *param, int size);                \
+             const string &name, type *param, unsigned size);           \
 template void                                                           \
 arrayParamOut(ostream &os, const string &name,                          \
               const vector<type> &param);                               \
diff --git a/src/sim/serialize.hh b/src/sim/serialize.hh
index 0069f5614..08240c0c0 100644
--- a/src/sim/serialize.hh
+++ b/src/sim/serialize.hh
@@ -59,7 +59,7 @@ void paramIn(Checkpoint *cp, const std::string &section,
 
 template <class T>
 void arrayParamOut(std::ostream &os, const std::string &name,
-                   const T *param, int size);
+                   const T *param, unsigned size);
 
 template <class T>
 void arrayParamOut(std::ostream &os, const std::string &name,
@@ -67,7 +67,7 @@ void arrayParamOut(std::ostream &os, const std::string &name,
 
 template <class T>
 void arrayParamIn(Checkpoint *cp, const std::string &section,
-                  const std::string &name, T *param, int size);
+                  const std::string &name, T *param, unsigned size);
 
 template <class T>
 void arrayParamIn(Checkpoint *cp, const std::string &section,
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index 0d5bf1723..5f2ebd428 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -899,8 +899,7 @@ writevFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
     uint64_t tiov_base = process->getSyscallArg(tc, 1);
     size_t count = process->getSyscallArg(tc, 2);
     struct iovec hiov[count];
-    for (int i = 0; i < count; ++i)
-    {
+    for (size_t i = 0; i < count; ++i) {
         typename OS::tgt_iovec tiov;
 
         p->readBlob(tiov_base + i*sizeof(typename OS::tgt_iovec),
@@ -913,10 +912,8 @@ writevFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
 
     int result = writev(process->sim_fd(fd), hiov, count);
 
-    for (int i = 0; i < count; ++i)
-    {
+    for (size_t i = 0; i < count; ++i)
         delete [] (char *)hiov[i].iov_base;
-    }
 
     if (result < 0)
         return -errno;
diff --git a/src/sim/system.hh b/src/sim/system.hh
index ab88160e2..aa89866bd 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -96,7 +96,7 @@ class System : public SimObject
 
     int numContexts()
     {
-        assert(_numContexts == threadContexts.size());
+        assert(_numContexts == (int)threadContexts.size());
         return _numContexts;
     }