diff options
| author | Gabe Black <gabeblack@google.com> | 2014-11-17 00:19:07 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2014-11-17 00:19:07 -0800 |
| commit | 7739c24fbeac2979e36de29d8079fb19ed766999 (patch) | |
| tree | 737fd3dae95e056b3dea987fcd2a7ce8616553f8 /src | |
| parent | 79e7ca307e0bb05a967652a54206d96d023c9231 (diff) | |
| download | gem5-7739c24fbeac2979e36de29d8079fb19ed766999.tar.xz | |
x86: APIC: Only set deliveryStatus if our IPI is going somewhere.
Otherwise the IPI which isn't sent will never arrive, and the deliveryStatus
bit will never be cleared.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/interrupts.cc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc index 045b09516..171e8a1c5 100644 --- a/src/arch/x86/interrupts.cc +++ b/src/arch/x86/interrupts.cc @@ -491,8 +491,6 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val) } low = val; InterruptCommandRegHigh high = regs[APIC_INTERRUPT_COMMAND_HIGH]; - // Record that an IPI is being sent. - low.deliveryStatus = 1; TriggerIntMessage message = 0; message.destination = high.destination; message.vector = low.vector; @@ -500,9 +498,6 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val) message.destMode = low.destMode; message.level = low.level; message.trigger = low.trigger; - bool timing(sys->isTimingMode()); - // Be careful no updates of the delivery status bit get lost. - regs[APIC_INTERRUPT_COMMAND_LOW] = low; ApicList apics; int numContexts = sys->numContexts(); switch (low.destShorthand) { @@ -558,8 +553,13 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val) } break; } - pendingIPIs += apics.size(); - intMasterPort.sendMessage(apics, message, timing); + // Record that an IPI is being sent if one actually is. + if (apics.size()) { + low.deliveryStatus = 1; + pendingIPIs += apics.size(); + } + regs[APIC_INTERRUPT_COMMAND_LOW] = low; + intMasterPort.sendMessage(apics, message, sys->isTimingMode()); newVal = regs[APIC_INTERRUPT_COMMAND_LOW]; } break; |