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authorGabe Black <gblack@eecs.umich.edu>2008-10-11 02:16:11 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-11 02:16:11 -0700
commitbc2217eefc8db831b72dfdcae7ecc9bd95a31c3c (patch)
treec4ef2e5783840b9dd8b2e76c19daaf77a2b90a8a /src
parenta6600fdd8885f9765c859935a5c97d9017653745 (diff)
downloadgem5-bc2217eefc8db831b72dfdcae7ecc9bd95a31c3c.tar.xz
X86: Change I8254 and PCSpeaker devices from subdevices to SimObjects and eliminate subdevices.
--HG-- rename : src/dev/x86/south_bridge/i8254.cc => src/dev/x86/i8254.cc rename : src/dev/x86/south_bridge/i8254.hh => src/dev/x86/i8254.hh rename : src/dev/x86/south_bridge/speaker.cc => src/dev/x86/speaker.cc rename : src/dev/x86/south_bridge/speaker.hh => src/dev/x86/speaker.hh
Diffstat (limited to 'src')
-rw-r--r--src/dev/x86/I8254.py37
-rw-r--r--src/dev/x86/PC.py11
-rw-r--r--src/dev/x86/PcSpeaker.py37
-rw-r--r--src/dev/x86/SConscript7
-rw-r--r--src/dev/x86/i8254.cc (renamed from src/dev/x86/south_bridge/i8254.cc)47
-rw-r--r--src/dev/x86/i8254.hh (renamed from src/dev/x86/south_bridge/i8254.hh)66
-rw-r--r--src/dev/x86/pc.cc5
-rw-r--r--src/dev/x86/pc.hh4
-rw-r--r--src/dev/x86/south_bridge/SConscript6
-rw-r--r--src/dev/x86/south_bridge/SouthBridge.py38
-rw-r--r--src/dev/x86/south_bridge/south_bridge.cc44
-rw-r--r--src/dev/x86/south_bridge/south_bridge.hh41
-rw-r--r--src/dev/x86/south_bridge/sub_device.hh79
-rw-r--r--src/dev/x86/speaker.cc (renamed from src/dev/x86/south_bridge/speaker.cc)21
-rw-r--r--src/dev/x86/speaker.hh (renamed from src/dev/x86/south_bridge/speaker.hh)35
15 files changed, 244 insertions, 234 deletions
diff --git a/src/dev/x86/I8254.py b/src/dev/x86/I8254.py
new file mode 100644
index 000000000..d67d04e86
--- /dev/null
+++ b/src/dev/x86/I8254.py
@@ -0,0 +1,37 @@
+# Copyright (c) 2008 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from m5.proxy import *
+from Device import BasicPioDevice
+
+class I8254(BasicPioDevice):
+ type = 'I8254'
+ cxx_class = 'X86ISA::I8254'
+ pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+ int_pin = Param.X86IntPin('Pin to signal timer interrupts to')
diff --git a/src/dev/x86/PC.py b/src/dev/x86/PC.py
index e14c4cc9c..28a722be9 100644
--- a/src/dev/x86/PC.py
+++ b/src/dev/x86/PC.py
@@ -29,10 +29,8 @@
from m5.params import *
from m5.proxy import *
-from Cmos import Cmos
from Device import IsaFake
from Pci import PciConfigAll
-from I8259 import I8259
from Platform import Platform
from SouthBridge import SouthBridge
from Terminal import Terminal
@@ -49,10 +47,6 @@ class PC(Platform):
pciconfig = PciConfigAll()
south_bridge = SouthBridge()
- pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
- pic2 = I8259(pio_addr=x86IOAddress(0xA0),
- mode='I8259Slave', output=pic1.pin(2))
- cmos = Cmos(pio_addr=x86IOAddress(0x70), int_pin=pic2.pin(0))
# "Non-existant" port used for timing purposes by the linux kernel
i_dont_exist = IsaFake(pio_addr=x86IOAddress(0x80), pio_size=1)
@@ -68,10 +62,7 @@ class PC(Platform):
com_1.terminal = terminal
def attachIO(self, bus):
- self.south_bridge.pio = bus.port
- self.cmos.pio = bus.port
- self.pic1.pio = bus.port
- self.pic2.pio = bus.port
+ self.south_bridge.attachIO(bus)
self.i_dont_exist.pio = bus.port
self.behind_pci.pio = bus.port
self.com_1.pio = bus.port
diff --git a/src/dev/x86/PcSpeaker.py b/src/dev/x86/PcSpeaker.py
new file mode 100644
index 000000000..7ca62ec1e
--- /dev/null
+++ b/src/dev/x86/PcSpeaker.py
@@ -0,0 +1,37 @@
+# Copyright (c) 2008 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+from m5.params import *
+from m5.proxy import *
+from Device import BasicPioDevice
+
+class PcSpeaker(BasicPioDevice):
+ type = 'PcSpeaker'
+ cxx_class = 'X86ISA::Speaker'
+ pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+ i8254 = Param.I8254('Timer that drives the speaker')
diff --git a/src/dev/x86/SConscript b/src/dev/x86/SConscript
index 71e5a9528..0e2bf0be6 100644
--- a/src/dev/x86/SConscript
+++ b/src/dev/x86/SConscript
@@ -42,5 +42,12 @@ if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
Source('i8259.cc')
TraceFlag('I8259', 'Accesses to the I8259 PIC devices')
+ SimObject('I8254.py')
+ Source('i8254.cc')
+
+ SimObject('PcSpeaker.py')
+ Source('speaker.cc')
+ TraceFlag('PcSpeaker')
+
SimObject('X86IntPin.py')
Source('intdev.cc')
diff --git a/src/dev/x86/south_bridge/i8254.cc b/src/dev/x86/i8254.cc
index c9c0d625a..cc7c48980 100644
--- a/src/dev/x86/south_bridge/i8254.cc
+++ b/src/dev/x86/i8254.cc
@@ -28,28 +28,20 @@
* Authors: Gabe Black
*/
-#include "dev/x86/south_bridge/i8254.hh"
+#include "dev/x86/i8254.hh"
+#include "mem/packet.hh"
#include "mem/packet_access.hh"
Tick
X86ISA::I8254::read(PacketPtr pkt)
{
assert(pkt->getSize() == 1);
- switch(pkt->getAddr() - addrRange.start)
- {
- case 0x0:
- pkt->set(pit.readCounter(0));
- break;
- case 0x1:
- pkt->set(pit.readCounter(1));
- break;
- case 0x2:
- pkt->set(pit.readCounter(2));
- break;
- case 0x3:
+ Addr offset = pkt->getAddr() - pioAddr;
+ if (offset < 3) {
+ pkt->set(pit.readCounter(offset));
+ } else if (offset == 3) {
pkt->set(uint8_t(-1));
- break;
- default:
+ } else {
panic("Read from undefined i8254 register.\n");
}
return latency;
@@ -59,22 +51,19 @@ Tick
X86ISA::I8254::write(PacketPtr pkt)
{
assert(pkt->getSize() == 1);
- switch(pkt->getAddr() - addrRange.start)
- {
- case 0x0:
- pit.writeCounter(0, pkt->get<uint8_t>());
- break;
- case 0x1:
- pit.writeCounter(1, pkt->get<uint8_t>());
- break;
- case 0x2:
- pit.writeCounter(2, pkt->get<uint8_t>());
- break;
- case 0x3:
+ Addr offset = pkt->getAddr() - pioAddr;
+ if (offset < 3) {
+ pit.writeCounter(offset, pkt->get<uint8_t>());
+ } else if (offset == 3) {
pit.writeControl(pkt->get<uint8_t>());
- break;
- default:
+ } else {
panic("Write to undefined i8254 register.\n");
}
return latency;
}
+
+X86ISA::I8254 *
+I8254Params::create()
+{
+ return new X86ISA::I8254(this);
+}
diff --git a/src/dev/x86/south_bridge/i8254.hh b/src/dev/x86/i8254.hh
index b6dd388a7..9528013c8 100644
--- a/src/dev/x86/south_bridge/i8254.hh
+++ b/src/dev/x86/i8254.hh
@@ -28,37 +28,67 @@
* Authors: Gabe Black
*/
-#ifndef __DEV_X86_SOUTH_BRIDGE_I8254_HH__
-#define __DEV_X86_SOUTH_BRIDGE_I8254_HH__
+#ifndef __DEV_X86_I8254_HH__
+#define __DEV_X86_I8254_HH__
-#include "arch/x86/x86_traits.hh"
-#include "base/range.hh"
#include "dev/intel_8254_timer.hh"
-#include "dev/x86/south_bridge/sub_device.hh"
-
-#include <string>
+#include "dev/io_device.hh"
+#include "params/I8254.hh"
namespace X86ISA
{
-class I8254 : public SubDevice
+class IntPin;
+
+class I8254 : public BasicPioDevice
{
- public:
+ protected:
+ Tick latency;
Intel8254Timer pit;
- I8254(EventManager *em, const std::string &name) : pit(em, name)
- {}
- I8254(EventManager *em, const std::string &name, Tick _latency) :
- SubDevice(_latency), pit(em, name)
- {}
- I8254(EventManager *em, const std::string &name,
- Addr start, Addr size, Tick _latency) :
- SubDevice(start, size, _latency), pit(em, name)
- {}
+ IntPin *intPin;
+
+ public:
+ typedef I8254Params Params;
+
+ const Params *
+ params() const
+ {
+ return dynamic_cast<const Params *>(_params);
+ }
+ I8254(Params *p) : BasicPioDevice(p), latency(p->pio_latency),
+ pit(this, p->name), intPin(p->int_pin)
+ {
+ pioSize = 4;
+ }
Tick read(PacketPtr pkt);
Tick write(PacketPtr pkt);
+
+ bool
+ outputHigh(unsigned int num)
+ {
+ return pit.outputHigh(num);
+ }
+
+ uint8_t
+ readCounter(unsigned int num)
+ {
+ return pit.readCounter(num);
+ }
+
+ void
+ writeCounter(unsigned int num, const uint8_t data)
+ {
+ pit.writeCounter(num, data);
+ }
+
+ void
+ writeControl(uint8_t val)
+ {
+ pit.writeControl(val);
+ }
};
}; // namespace X86ISA
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index 3de28bce5..0cfd2b0f9 100644
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -37,10 +37,11 @@
#include <vector>
#include "arch/x86/x86_traits.hh"
-#include "dev/intel_8254_timer.hh"
#include "cpu/intr_control.hh"
#include "dev/terminal.hh"
+#include "dev/x86/i8254.hh"
#include "dev/x86/pc.hh"
+#include "dev/x86/south_bridge/south_bridge.hh"
#include "sim/system.hh"
using namespace std;
@@ -58,7 +59,7 @@ void
PC::init()
{
assert(southBridge);
- Intel8254Timer & timer = southBridge->pit.pit;
+ I8254 & timer = *southBridge->pit;
//Timer 0, mode 2, no bcd, 16 bit count
timer.writeControl(0x34);
//Timer 0, latch command
diff --git a/src/dev/x86/pc.hh b/src/dev/x86/pc.hh
index 3a042fc46..418a2e830 100644
--- a/src/dev/x86/pc.hh
+++ b/src/dev/x86/pc.hh
@@ -38,18 +38,18 @@
#define __DEV_PC_HH__
#include "dev/platform.hh"
-#include "dev/x86/south_bridge/south_bridge.hh"
#include "params/PC.hh"
class IdeController;
class System;
+class SouthBridge;
class PC : public Platform
{
public:
/** Pointer to the system */
System *system;
- SouthBridge * southBridge;
+ SouthBridge *southBridge;
public:
typedef PCParams Params;
diff --git a/src/dev/x86/south_bridge/SConscript b/src/dev/x86/south_bridge/SConscript
index c4e31bb8c..639298ca1 100644
--- a/src/dev/x86/south_bridge/SConscript
+++ b/src/dev/x86/south_bridge/SConscript
@@ -34,9 +34,3 @@ if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
# Main device
SimObject('SouthBridge.py')
Source('south_bridge.cc')
-
- # Sub devices
- Source('i8254.cc')
- Source('speaker.cc')
-
- TraceFlag('PCSpeaker')
diff --git a/src/dev/x86/south_bridge/SouthBridge.py b/src/dev/x86/south_bridge/SouthBridge.py
index bec3c4223..2f4b8438a 100644
--- a/src/dev/x86/south_bridge/SouthBridge.py
+++ b/src/dev/x86/south_bridge/SouthBridge.py
@@ -28,8 +28,42 @@
from m5.params import *
from m5.proxy import *
-from Device import PioDevice
+from Cmos import Cmos
+from I8254 import I8254
+from I8259 import I8259
+from PcSpeaker import PcSpeaker
+from m5.SimObject import SimObject
-class SouthBridge(PioDevice):
+def x86IOAddress(port):
+ IO_address_space_base = 0x8000000000000000
+ return IO_address_space_base + port;
+
+class SouthBridge(SimObject):
type = 'SouthBridge'
pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+ platform = Param.Platform(Parent.any, "Platform this device is part of")
+
+ _pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
+ _pic2 = I8259(pio_addr=x86IOAddress(0xA0), mode='I8259Slave')
+ _cmos = Cmos(pio_addr=x86IOAddress(0x70))
+ _pit = I8254(pio_addr=x86IOAddress(0x40))
+ _speaker = PcSpeaker(pio_addr=x86IOAddress(0x61))
+
+ pic1 = Param.I8259(_pic1, "Master PIC")
+ pic2 = Param.I8259(_pic2, "Slave PIC")
+ cmos = Param.Cmos(_cmos, "CMOS memory and real time clock device")
+ pit = Param.I8254(_pit, "Programmable interval timer")
+ speaker = Param.PcSpeaker(_speaker, "PC speaker")
+
+ def attachIO(self, bus):
+ # Make internal connections
+ self.pic2.output = self.pic1.pin(2)
+ self.cmos.int_pin = self.pic2.pin(0)
+ self.pit.int_pin = self.pic1.pin(0)
+ self.speaker.i8254 = self.pit
+ # Connect to the bus
+ self.cmos.pio = bus.port
+ self.pic1.pio = bus.port
+ self.pic2.pio = bus.port
+ self.pit.pio = bus.port
+ self.speaker.pio = bus.port
diff --git a/src/dev/x86/south_bridge/south_bridge.cc b/src/dev/x86/south_bridge/south_bridge.cc
index 0e9a63a74..12f4657b0 100644
--- a/src/dev/x86/south_bridge/south_bridge.cc
+++ b/src/dev/x86/south_bridge/south_bridge.cc
@@ -28,51 +28,17 @@
* Authors: Gabe Black
*/
-#include "arch/x86/x86_traits.hh"
-#include "base/range.hh"
+#include <assert.h>
+
#include "dev/x86/pc.hh"
#include "dev/x86/south_bridge/south_bridge.hh"
using namespace X86ISA;
-void
-SouthBridge::addDevice(X86ISA::SubDevice & sub)
-{
- rangeList.push_back(sub.addrRange);
- rangeMap.insert(sub.addrRange, &sub);
-}
-
-void
-SouthBridge::addressRanges(AddrRangeList &range_list)
-{
- range_list = rangeList;
-}
-
-Tick
-SouthBridge::read(PacketPtr pkt)
+SouthBridge::SouthBridge(const Params *p) : SimObject(p),
+ platform(p->platform), pit(p->pit), pic1(p->pic1), pic2(p->pic2),
+ cmos(p->cmos), speaker(p->speaker)
{
- RangeMapIt sub =
- rangeMap.find(RangeSize(pkt->getAddr(), 1));
- assert(sub != rangeMap.end());
- return sub->second->read(pkt);
-}
-
-Tick
-SouthBridge::write(PacketPtr pkt)
-{
- RangeMapIt sub =
- rangeMap.find(RangeSize(pkt->getAddr(), 1));
- assert(sub != rangeMap.end());
- return sub->second->write(pkt);
-}
-
-SouthBridge::SouthBridge(const Params *p) : PioDevice(p),
- pit(this, p->name + ".pit", 0x40, 4, p->pio_latency),
- speaker(&pit, 0x61, 1, p->pio_latency)
-{
- addDevice(pit);
- addDevice(speaker);
-
// Let the platform know where we are
PC * pc = dynamic_cast<PC *>(platform);
assert(pc);
diff --git a/src/dev/x86/south_bridge/south_bridge.hh b/src/dev/x86/south_bridge/south_bridge.hh
index 171589cf3..9e7963a7b 100644
--- a/src/dev/x86/south_bridge/south_bridge.hh
+++ b/src/dev/x86/south_bridge/south_bridge.hh
@@ -31,39 +31,30 @@
#ifndef __DEV_X86_SOUTH_BRIDGE_SOUTH_BRIDGE_HH__
#define __DEV_X86_SOUTH_BRIDGE_SOUTH_BRIDGE_HH__
-#include "base/range_map.hh"
-#include "dev/io_device.hh"
-#include "dev/x86/south_bridge/i8254.hh"
-#include "dev/x86/south_bridge/speaker.hh"
-#include "dev/x86/south_bridge/sub_device.hh"
+#include "sim/sim_object.hh"
#include "params/SouthBridge.hh"
-class SouthBridge : public PioDevice
+namespace X86ISA
{
- protected:
- AddrRangeList rangeList;
-
- typedef range_map<Addr, X86ISA::SubDevice *> RangeMap;
- typedef RangeMap::iterator RangeMapIt;
- RangeMap rangeMap;
-
+ class I8254;
+ class I8259;
+ class Cmos;
+ class Speaker;
+}
- void addDevice(X86ISA::SubDevice &);
+class SouthBridge : public SimObject
+{
+ protected:
+ Platform * platform;
public:
- // I8254 Programmable Interval Timer
- X86ISA::I8254 pit;
-
- // PC speaker
- X86ISA::Speaker speaker;
+ X86ISA::I8254 * pit;
+ X86ISA::I8259 * pic1;
+ X86ISA::I8259 * pic2;
+ X86ISA::Cmos * cmos;
+ X86ISA::Speaker * speaker;
public:
-
- void addressRanges(AddrRangeList &range_list);
-
- Tick read(PacketPtr pkt);
- Tick write(PacketPtr pkt);
-
typedef SouthBridgeParams Params;
SouthBridge(const Params *p);
diff --git a/src/dev/x86/south_bridge/sub_device.hh b/src/dev/x86/south_bridge/sub_device.hh
deleted file mode 100644
index 3cc51bdd9..000000000
--- a/src/dev/x86/south_bridge/sub_device.hh
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2004-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __DEV_X86_SOUTH_BRIDGE_SUB_DEVICE_HH__
-#define __DEV_X86_SOUTH_BRIDGE_SUB_DEVICE_HH__
-
-#include "arch/x86/x86_traits.hh"
-#include "base/range.hh"
-#include "mem/packet.hh"
-
-namespace X86ISA
-{
-
-class SubDevice
-{
- public:
-
- Range<Addr> addrRange;
- Tick latency;
-
- virtual
- ~SubDevice()
- {}
-
- SubDevice()
- {}
- SubDevice(Tick _latency) : latency(_latency)
- {}
- SubDevice(Addr start, Addr size, Tick _latency) :
- addrRange(RangeSize(x86IOAddress(start), size)), latency(_latency)
- {}
-
- virtual Tick
- read(PacketPtr pkt)
- {
- assert(pkt->getSize() <= 4);
- pkt->allocate();
- const uint32_t neg1 = -1;
- pkt->setData((uint8_t *)(&neg1));
- return latency;
- }
-
- virtual Tick
- write(PacketPtr pkt)
- {
- return latency;
- }
-};
-
-}; // namespace X86ISA
-
-#endif //__DEV_X86_SOUTH_BRIDGE_SUB_DEVICE_HH__
diff --git a/src/dev/x86/south_bridge/speaker.cc b/src/dev/x86/speaker.cc
index 59a86c634..25014d0c6 100644
--- a/src/dev/x86/south_bridge/speaker.cc
+++ b/src/dev/x86/speaker.cc
@@ -30,17 +30,18 @@
#include "base/bitunion.hh"
#include "base/trace.hh"
-#include "dev/x86/south_bridge/i8254.hh"
-#include "dev/x86/south_bridge/speaker.hh"
+#include "dev/x86/i8254.hh"
+#include "dev/x86/speaker.hh"
+#include "mem/packet.hh"
#include "mem/packet_access.hh"
Tick
X86ISA::Speaker::read(PacketPtr pkt)
{
- assert(pkt->getAddr() == addrRange.start);
+ assert(pkt->getAddr() == pioAddr);
assert(pkt->getSize() == 1);
- controlVal.timer = timer->pit.outputHigh(2) ? 1 : 0;
- DPRINTF(PCSpeaker,
+ controlVal.timer = timer->outputHigh(2) ? 1 : 0;
+ DPRINTF(PcSpeaker,
"Reading from speaker device: gate %s, speaker %s, output %s.\n",
controlVal.gate ? "on" : "off",
controlVal.speaker ? "on" : "off",
@@ -52,7 +53,7 @@ X86ISA::Speaker::read(PacketPtr pkt)
Tick
X86ISA::Speaker::write(PacketPtr pkt)
{
- assert(pkt->getAddr() == addrRange.start);
+ assert(pkt->getAddr() == pioAddr);
assert(pkt->getSize() == 1);
SpeakerControl val = pkt->get<uint8_t>();
controlVal.gate = val.gate;
@@ -64,7 +65,13 @@ X86ISA::Speaker::write(PacketPtr pkt)
//speaker. Since M5 can't make noise, it's value doesn't actually do
//anything.
controlVal.speaker = val.speaker;
- DPRINTF(PCSpeaker, "Writing to speaker device: gate %s, speaker %s.\n",
+ DPRINTF(PcSpeaker, "Writing to speaker device: gate %s, speaker %s.\n",
controlVal.gate ? "on" : "off", controlVal.speaker ? "on" : "off");
return latency;
}
+
+X86ISA::Speaker *
+PcSpeakerParams::create()
+{
+ return new X86ISA::Speaker(this);
+}
diff --git a/src/dev/x86/south_bridge/speaker.hh b/src/dev/x86/speaker.hh
index 2385b80cc..7d28d6cf7 100644
--- a/src/dev/x86/south_bridge/speaker.hh
+++ b/src/dev/x86/speaker.hh
@@ -28,21 +28,22 @@
* Authors: Gabe Black
*/
-#ifndef __DEV_X86_SOUTH_BRIDGE_SPEAKER_HH__
-#define __DEV_X86_SOUTH_BRIDGE_SPEAKER_HH__
+#ifndef __DEV_X86_SPEAKER_HH__
+#define __DEV_X86_SPEAKER_HH__
-#include "arch/x86/x86_traits.hh"
-#include "base/range.hh"
-#include "dev/x86/south_bridge/sub_device.hh"
+#include "base/bitunion.hh"
+#include "params/PcSpeaker.hh"
namespace X86ISA
{
class I8254;
-class Speaker : public SubDevice
+class Speaker : public BasicPioDevice
{
protected:
+ Tick latency;
+
BitUnion8(SpeakerControl)
Bitfield<0> gate;
Bitfield<1> speaker;
@@ -54,15 +55,19 @@ class Speaker : public SubDevice
I8254 * timer;
public:
+ typedef PcSpeakerParams Params;
+
+ const Params *
+ params() const
+ {
+ return dynamic_cast<const Params *>(_params);
+ }
- Speaker(I8254 * _timer) : timer(_timer)
- {}
- Speaker(I8254 * _timer, Tick _latency) :
- SubDevice(_latency), timer(_timer)
- {}
- Speaker(I8254 * _timer, Addr start, Addr size, Tick _latency) :
- SubDevice(start, size, _latency), timer(_timer)
- {}
+ Speaker(Params *p) : BasicPioDevice(p),
+ latency(p->pio_latency), timer(p->i8254)
+ {
+ pioSize = 1;
+ }
Tick read(PacketPtr pkt);
@@ -71,4 +76,4 @@ class Speaker : public SubDevice
}; // namespace X86ISA
-#endif //__DEV_X86_SOUTH_BRIDGE_SPEAKER_HH__
+#endif //__DEV_X86_SPEAKER_HH__