diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2009-08-17 20:04:02 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-08-17 20:04:02 -0700 |
| commit | e2759fe69c6b450a46624a9f97af74a330b41383 (patch) | |
| tree | 28fd95b83463c2e312b51e96dfbe9317aa592d37 /src | |
| parent | e678df6263ba9cc9e47e6705e276830d3decb15d (diff) | |
| download | gem5-e2759fe69c6b450a46624a9f97af74a330b41383.tar.xz | |
X86: Add a media integer min microop.
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/isa/microops/mediaop.isa | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa index a933d0204..b3ff5cde2 100644 --- a/src/arch/x86/isa/microops/mediaop.isa +++ b/src/arch/x86/isa/microops/mediaop.isa @@ -530,6 +530,44 @@ let {{ FpDestReg.uqw = result; ''' + class Mmini(MediaOp): + code = ''' + + assert(srcSize == destSize); + int size = srcSize; + int sizeBits = size * 8; + int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size); + uint64_t result = FpDestReg.uqw; + + for (int i = 0; i < items; i++) { + int hiIndex = (i + 1) * sizeBits - 1; + int loIndex = (i + 0) * sizeBits; + uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex); + int64_t arg1 = arg1Bits | + (0 - (arg1Bits & (1 << (sizeBits - 1)))); + uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex); + int64_t arg2 = arg2Bits | + (0 - (arg2Bits & (1 << (sizeBits - 1)))); + uint64_t resBits; + + if (ext & 0x2) { + if (arg1 < arg2) { + resBits = arg1Bits; + } else { + resBits = arg2Bits; + } + } else { + if (arg1Bits < arg2Bits) { + resBits = arg1Bits; + } else { + resBits = arg2Bits; + } + } + result = insertBits(result, hiIndex, loIndex, resBits); + } + FpDestReg.uqw = result; + ''' + class Msqrt(MediaOp): def __init__(self, dest, src, \ size = None, destSize = None, srcSize = None, ext = None): |