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authorAli Saidi <Ali.Saidi@ARM.com>2012-05-10 18:04:27 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2012-05-10 18:04:27 -0500
commit4f66bcdd2e2cf983f66fe745eaa27698e90d0d60 (patch)
treec4efa628413252b7bad0188db83af6096ae2a1e8 /src
parent5ecaf30219d8a846f2747d4d67503c21c6e13333 (diff)
downloadgem5-4f66bcdd2e2cf983f66fe745eaa27698e90d0d60.tar.xz
gem5: fix some iterator use and erase bugs
Diffstat (limited to 'src')
-rw-r--r--src/cpu/pc_event.cc9
-rw-r--r--src/mem/cache/prefetch/base.cc10
2 files changed, 13 insertions, 6 deletions
diff --git a/src/cpu/pc_event.cc b/src/cpu/pc_event.cc
index 9cf63f7d3..2b54ee5fb 100644
--- a/src/cpu/pc_event.cc
+++ b/src/cpu/pc_event.cc
@@ -56,13 +56,18 @@ PCEventQueue::remove(PCEvent *event)
{
int removed = 0;
range_t range = equal_range(event);
- for (iterator i = range.first; i != range.second; ++i) {
+ iterator i = range.first;
+ while (i != range.second &&
+ i != pc_map.end()) {
if (*i == event) {
DPRINTF(PCEvent, "PC based event removed at %#x: %s\n",
event->pc(), event->descr());
- pc_map.erase(i);
+ i = pc_map.erase(i);
++removed;
+ } else {
+ i++;
}
+
}
return removed > 0;
diff --git a/src/mem/cache/prefetch/base.cc b/src/mem/cache/prefetch/base.cc
index 4d1f7c81c..f3ac5f046 100644
--- a/src/mem/cache/prefetch/base.cc
+++ b/src/mem/cache/prefetch/base.cc
@@ -182,7 +182,7 @@ BasePrefetcher::notify(PacketPtr &pkt, Tick time)
pfRemovedMSHR++;
delete (*iter)->req;
delete (*iter);
- pf.erase(iter);
+ iter = pf.erase(iter);
if (pf.empty())
cache->deassertMemSideBusRequest(BaseCache::Request_PF);
}
@@ -194,15 +194,17 @@ BasePrefetcher::notify(PacketPtr &pkt, Tick time)
// Needed for serial calculators like GHB
if (serialSquash) {
iter = pf.end();
- iter--;
+ if (iter != pf.begin())
+ iter--;
while (!pf.empty() && ((*iter)->time >= time)) {
pfSquashed++;
DPRINTF(HWPrefetch, "Squashing old prefetch addr: 0x%x\n",
(*iter)->getAddr());
delete (*iter)->req;
delete (*iter);
- pf.erase(iter);
- iter--;
+ iter = pf.erase(iter);
+ if (iter != pf.begin())
+ iter--;
}
if (pf.empty())
cache->deassertMemSideBusRequest(BaseCache::Request_PF);