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author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-17 15:35:34 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-17 15:35:34 -0700 |
commit | c4004482a536f412f5aa8416aa6ca39d8075a89c (patch) | |
tree | 0935d82f659424079bcf32343ba494ab04dfae38 /src | |
parent | a6757095c35cfdc491396cd97a32c19aacaffe2e (diff) | |
download | gem5-c4004482a536f412f5aa8416aa6ca39d8075a89c.tar.xz |
Make "test" set some condition codes.
It still needs to zero the overflow and carry flags to be correct.
--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/isa/insts/compare_and_test/test.py | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/x86/isa/insts/compare_and_test/test.py b/src/arch/x86/isa/insts/compare_and_test/test.py index 89d406912..1d2364f0f 100644 --- a/src/arch/x86/isa/insts/compare_and_test/test.py +++ b/src/arch/x86/isa/insts/compare_and_test/test.py @@ -57,26 +57,26 @@ microcode = ''' def macroop TEST_M_R { ld t1, ds, [scale, index, base], disp - and t0, t1, reg + and t0, t1, reg, flags=(SF, ZF, PF) }; def macroop TEST_P_R { rdip t7 ld t1, ds, [scale, index, base], disp - and t0, t1, reg + and t0, t1, reg, flags=(SF, ZF, PF) }; def macroop TEST_R_R { - and t0, reg, regm + and t0, reg, regm, flags=(SF, ZF, PF) }; def macroop TEST_M_I { ld t1, ds, [scale, index, base], disp limm t2, imm - and t0, t1, t2 + and t0, t1, t2, flags=(SF, ZF, PF) }; def macroop TEST_P_I @@ -84,12 +84,12 @@ def macroop TEST_P_I rdip t7 ld t1, ds, [scale, index, base], disp limm t2, imm - and t0, t1, t2 + and t0, t1, t2, flags=(SF, ZF, PF) }; def macroop TEST_R_I { limm t1, imm - and t0, reg, t1 + and t0, reg, t1, flags=(SF, ZF, PF) }; ''' |